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NZhan1's avatar
NZhan1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

partial reconfig process, when program the pr rbf to fpga through JTAG, it failed

Hi partial reconfig process, when program the pr rbf to fpga through JTAG, it failed as the figure. how to locate the error?
Rakhi_T_Intel's avatar
Rakhi_T_Intel
Icon for New Contributor rankNew Contributor
6 years ago

The USB-Blaster™ II download cable has a default clock frequency for TCK (JTAG) of 24MHz. The frequency may be changed to lower frequencies where signal integrity and timing does not allow operation at 24MHz