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fpgaBeginner's avatar
fpgaBeginner
Icon for New Contributor rankNew Contributor
2 years ago

On my fpga, 'or' is 'and' and vice versa

Hello, I recently bought an ALTERA Cyclone IV EP4CE6 FPGA and tried to create the first project. When key_1 and key_2 were clamped, led_1 should have been lit.

But led_1 is lit when key_1 is clamped when key_2 is not pressed.

library IEEE; use IEEE.STD_LOGIC_1164.all;
entity led_test is
port(key_1, key_2: in STD_LOGIC;
led_1: out STD_LOGIC);
end;
architecture synth of led_test is
begin
led_1 <= key_1 and key_2;
end;
if I write led_1 <= key_1 or key_2; then all led_1 lights up only when both buttons (key_1 and key_2) are pressed, if only one of them is pressed, then led_1 does not light
What am I doing wrong? Could this be a problem with the fpga?

3 Replies

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago
    Hi, I presume the FPGA is fine. But you don't consider that switches and LEDs of your board are apparently implementing inverted logic. Closing the switch applies '0' to the input, LED is lighted with output '0'.
  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Let me know if there is any update from previous reply.


  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


    p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 5/5 survey