"Match PLL Compensation Clock" assignment doesn't work

I extracted the command from my PLL design built in Quartus version 18.1. You should see the clock name "~outclk_wire[0]". set_instance_assignment -name MATCH_PLL_COMPENSATION_CLOCK ON -to "pll_150out:pll_150out_inst|pll_150out_0002:pll_150out_inst|altera_pll:altera_pll_i|outclk_wire[0]" Another way to find its clock output name is from Fitter report. Go to Fitter>Resource section>Global & other fast signals> find that corresponding PLL's signal suffix with "outclk_wire"