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RLee42's avatar
RLee42
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

"Match PLL Compensation Clock" assignment doesn't work

Hi, ​ When I used Quartus to compile for a cyclone V device I got an warning, which was just the one in the link below. I followed the Workaround/Fix part of the link to try to remove the warning b...
RLee42's avatar
RLee42
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Hi lvan,

​

Thank you for your time.

​

I did choose "normal" when I generated PLL and I thought Quartus should know the way to compensate, however, I still got a warning as below:

​

Warning (177007): PLL(s) placed in location FRACTIONALPLL_X0_Y1_N0 do not have a PLL clock to compensate specified - the Fitter will attempt to compensate all PLL clocks.

​

Then I assumed that there might be some extra options for compensation which I missed. That's why I said "When I generated PLL I didn't see the options for compensation".

​

Thank you.​

Best Regards,

Ross

​

IDeyn's avatar
IDeyn
Icon for Contributor rankContributor
7 years ago

Hi RLee42!

Ok, I see.

I can say that in most cases you can ignore that warning, but to eliminate it, try what GNg suggests below -> => set_instance_assignment -name MATCH_PLL_COMPENSATION_CLOCK ON -to "<PLL name>|outclk_wire[0]"

--

Best Regards,

Ivan