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Actually, even if you use NIOS, it will also be in a portion of the FPGA (Nios will also get compiled to use the FPGA's logic resources). Either way, you have to implement an interface to the FPGA.
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Okay, now I think I have the wrong idea about the NIOS embedded processor. I thought it was a separate chip that can be used as a general purpose microcontroller. I double checked and there's no chip like that in the board. What then is NIOS? :))
And what do you mean by "interface to the FPGA"?
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Think of it very simply, it's just your controller + interface. Controller is a block in FPGA (yes, you need to retain this circuitry while reconfiguring the other portion), and interface logic is another block in the same FPGA.
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Is the interface you mention here the same with the interface in the next quote (RS232/USB/etc.)? If not, what is the interface logic here for?
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Your controller implementation can be of your own choice, you can write your own HDL, or use Nios. Either way, it's still your controller. You have to hook this controller (Nios or HDL) up to an interface, maybe RS232/USB/etc. Again, it's Controller + Interface. :) Of course, in Nios, you can use any of the interfaces available, and build your Controller + Interface totally in Nios. It's really your own preference. I personally would like everything in VHDL.
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If HDL code is to be compiled and loaded in the FPGA, how then is the implementation done in NIOS?
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You need to scan in the bitstream (e.g. from your SD card), and store it somewhere (RAM). Now, it's up to you to define which memory to use (could be shift registers, M4K, external RAM, etc.).
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When the bit stream is scanned why does it have to be stored somewhere? Can't it be loaded to the FPGA immediately? What is the other memory for?
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Later on, you can always use a configuration device (such as EPCS), or configuration controller (like a MAX-II CPLD) to do the auto-configuration during power up of your board. Here, you don't need to hook your board up to Quartus.
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Doesn't the controller I'm planning to implement (with HDL or NIOS) handles the reconfiguring? Here, the "configuration controller" pertains to upon power up, not during run time?
Can this configuration controller be used as the reconfiguration controller during run time to load in the new scanned bit stream instead of the one discussed above?
Please bear with me:) Thank you very much.
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