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JGros12
New Contributor
New ContributorHow to read data in FPGA out of external DDR3 SDRAM on an Terasic DE10-Nano
Hello everybody, I have the Terasic DE10 Nano in a Cyclon V-SoC with 1 GB of external RAM. I can access the working memory via HPS (C code). So I can write values to a specific address space. Now I ...
JGros12New Contributor
New ContributorThank you for your answer.
I have already seen the Nios_Access_DDR3 example.
My question is: Is there another way to access the addresses without DMA and NIOS? I would like to read the data only with VHDL / VERILOG code.
Regards.
EBERLAZARE_I_Intel
Regular Contributor
Regular ContributorHi,
There might be other way to access the addresses, but there are none from Intel that have the sample code that represent the address access.
Except the example that I provided which is external which is the Nios Access DDR3 example.
You may find some useful examples here:
https://github.com/robertofem/CycloneVSoC-examples
Regards.
