Forum Discussion

dsun01's avatar
dsun01
Icon for Contributor rankContributor
5 years ago
Solved

how to link everything together?

Dear Intel Support/Expert, I am learning how to use Arria 10 SoC Development Kit. and planning to purchase a Kit, but I feel really confused with the way Intel document the design files. from th...
  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    5 years ago

    Hi David,

    Regarding the error message, I think this is due to different versions of the Intel Quartus Prime software that you are using and the version used to create the example. Some of the qsf settings in older version are not supported in the newer version.

    For reference design, you may find in the link below. User Guides and Reference Designs > Reference design.

    https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/pcie-support.html

    Besides the reference design, you may also generate some simple example designs using the IP parameter setting GUI.

    Thanks

    Best regards,

    KhaiY

KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi David,

Regarding the error message, I think this is due to different versions of the Intel Quartus Prime software that you are using and the version used to create the example. Some of the qsf settings in older version are not supported in the newer version.

For reference design, you may find in the link below. User Guides and Reference Designs > Reference design.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/pcie-support.html

Besides the reference design, you may also generate some simple example designs using the IP parameter setting GUI.

Thanks

Best regards,

KhaiY

dsun01's avatar
dsun01
Icon for Contributor rankContributor
5 years ago

Hi KhaiY

Even I have many years FPGA design experience, but relatively new to the Platform Designer. Thank you very much for the suggestion.

I followed your link and try to this link

https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/an/an708.pdf

in this document, there is a link

• Arria 10 Reference Design( https://www.alterawiki.com/wiki/Reference_Design:_Gen3x8_AVMM_DMA_with_external_DDR4_-_Arria_10)
To download the reference design and the design software

if I click the Arria 10 Reference design link, I will get this message.

"The requested URL was not found on this server.

Additionally, a 404 Not Found error was encountered while trying to use an ErrorDocument to handle the request."

could you please give a valid link to the <<Arria 10 reference design>> referred in the an708 page 3.

if I can get a full example project which cab be compiled, it will be a very good start point for me to understand PCIe and memory controller.

Best Regards,

David