How to generate 30 PWM singals using MAX II starter kit

I expect, that a simple cabel should be sufficient to connect both boards. 75 MHz will be probably good as a MAX II clock.

Without an idea about the complexity of multilevel algorithm, I can't determine if a MAX II can handle it. Code the algorithm in VHDL or Verilog and see how much resources it consumes.

P.S.: For medium resource requirements a Terasic DE0 (Cyclone III, 16k LEs) or DE0-Nano (Cyclone IV, 22k LEs) should be suitable. Both have GPIO headers to connect 3.3V LVCMOS signals.