Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThanks, rbuqalho and FvM
In the DSP2812, There is a general-purpose clock source output of xclkout, which is either the same frequency, 1/2 the frequency, or 1/4 the frequency of SYSCLKOUT (150MHz). I can use it (150MHz or 75MHz or 37.5MHz) as a common clock for two kits. As rbuqalho said, a middle circuit board have to be achieved for the interface between two kits, which is big problem for me. I guess it maybe concern of frequency transformation to all my required output signals. I cannot figure it out, which is outside of my ability. Could you give me a detailed explanation for it? I plan to generate three 10KHz PWM signals by DSP2812, and a I/o signal and a 150MHz common clock by the DSP2812. I know the algorithm to generate the multi-level PWM signals, which is about some simple logic operations. A easy, fast and cheap FPGA is good for my expectation. Until now, I just find the kit of MAX II starter kit. Maybe it has little good resources to programme. Is there a good alternate kit for my experiment? Besides, I originally plan to realize all the algorithm by only one FPGA kit. However, the designed algorithm contain more mathmatical function, which is suitable to be achieved by a DSP chip. Thus, If i realize that in one FPGA kit, is there a good FPGA eval kit for my thinking? Any suggestion will be better. Thanks. Looking forward to your reply.