Forum Discussion
DChak2
New Contributor
7 years agoHow to enable differential signal in stratix 10 transreciver phy IP?
Please someone guide. It seems the ref clk and tx rx serial data are single ended. And in fitting stage it shows error.
1 Reply
- Deshi_Intel
Regular Contributor
HI,
You can refer to Stratix 10 datasheet to find out the supported differential IO standard for the transcevier channel (depends on Ltile, Htile or Etile)
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/s10_datasheet.pdf
After that, you can use quartus assignment editor to set the desired differential IO standard for your transceiver refclk and receiver channel pins.
Thanks.
Regards,
dlim