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AAjit2's avatar
AAjit2
Icon for New Contributor rankNew Contributor
6 years ago

How to convert Cyclone III Verilog files to Cyclone V?

I have an old FPGA board running on Cyclone III which has Verilog files but doesn't have any bdf, so it was difficult tracking the connections. Now I want to rewrite the programs for the new Cyclone ...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi @AAjit2​ ,

We can use our old design with little modification by considering below points.

  1. Check the IP used and regenerate it or generate new IP with respect to board resources/interface.
  2. Update the pin assignments.

Generate correct IP file , add it to project , integrate it top top-level file & compile the designa nd check

QIP file is Quartus IP file which is generated which generating IP from mega-wizard or IP catalog.

If possible share the project.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Regards

Anand