Forum Discussion
Rk_Athram
Occasional Contributor
Occasional ContributorHighspeed LVDS ADC interface to arria 10 fpga
Hi,
I am using high speed ADC (ADS62P25IRGCT) with arria10,
Output of ADC is LVDS, i want single ended input in FPGA,
GPIO ip: is Not suitable as specified in datasheet.
GPIO Intel FPGA IP U...
Yes, you can use it to convert the differential signal to single ended and implement the DDR data capture logic to it. The IP basically configures the IOE element of the device.
Regards
Ash_R_Altera
Regular Contributor
Regular ContributorYes, you can use it to convert the differential signal to single ended and implement the DDR data capture logic to it. The IP basically configures the IOE element of the device.
Regards
Rk_Athram
