error message: can't fit into the design

​Hi,

I have not modified the design which you have shared in previous post attachments.

1. You can add Qspi and PLL in Qsys system(onchip.qsys/onchip.qip) and remove the pll.qip file from project and onchip.qip set as top level entity and compile. Attached the file do pin assignment and other configuration as per you requriment

For RSU design example (QSPI &PLL) look into design stores or follow an741 or check below video links

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an741.pdf

https://fpgacloud.intel.com/devstore/platform/?search=RSU&acds_version=any&family=max-10search for reference design.

https://www.youtube.com/watch?v=Qgwd8ftiTZc

https://www.youtube.com/watch?v=bAyqWWm1yLU

https://www.youtube.com/watch?v=r3wcgr3LmjA

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Regards

Anand