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slmel's avatar
slmel
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5 years ago
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displayport™ 1.4 TX only example design for Cyclone10 GX

Hi, We are currently working on Display port IP in Cyclone 5 GT board and Cyclone 10 GX. We started working on Cyclone 5 GT board. In this we used bitec HSMC board. Loop back example design worked ...
  • Deshi_Intel's avatar
    Deshi_Intel
    5 years ago

    Hi,


    I found out below AN doc that may provide answer to you.


    It's still referring to A10 DisplayPort Tx only Example Design but C10 GX DisplayPort design should be quick close to it as well

    • Pls go through the AN doc in detail to learn about DisplayPort Tx only example design
    • Chapter 1.4.4 - tell you on some debug feature
    • Chapter 1.5 - teach you how to convert DP Rx to Tx example design to become DP Tx only example design


    Since you are using custom board then it's very hard to isolate whether the failure is on board issue or Quartus design issue

    • If you have Cyclone 10 Gx dev kit + Bitec DisplayPort daughter card then it will be easier to isolate out board issue


    Thanks.


    Regards,

    dlim


slmel's avatar
slmel
Icon for New Contributor rankNew Contributor
5 years ago

Hi,

We need to test it in Cyclone 10 GX. Within the link you have shared I couldn't find any Cyclone 10 example design. I have tried C5 Tx only example using Q17. But it didn't work. Could you please help on this?

I have created tx only system based on the video in the Intel channel. Could you please explain how to debug the DP if video will not output?

Also from below post I have seen that it is required to checked "Enable Video Input Image Port" in order to build TX only system. Is it required. I couldn't find this in any of the example design mentioned in above link you have shared. Could you please clarify this point?

https://community.intel.com/t5/FPGA-Intellectual-Property/DisplayPort-TX-IP-in-image-video-mode/m-p/722220#M21028

Rgds,

Slm