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Hang's avatar
Hang
Icon for New Contributor rankNew Contributor
16 days ago

DE10-nano HPS boot from EPCS

Hello,

I am currently trying to setup LoanIO on a DE10-nano so i can access the PHYs RGMII0 signals from the FPGA. According to the Cyclone V Manual, the HPS registers have to be set up in the preloader for this. So i follow this guide to build the u-boot-spl:
https://www.rocketboards.org/foswiki/Documentation/UpdatePreloaderUBootOnDE10NanoOnWindows10OS

Then converted it to a .hex file to initialize the on-chip Memory following to this guide:
https://www.rocketboards.org/foswiki/Documentation/BootFromFPGA150

Then recompile the design and finally generate the .jic file to configure everything from EPCS64. Now the FPGA part of my design is running but the preloader does not seem to be executed. 

I am using Quartus Prime 24.1std and u-boot branch socfpga_v2025_07.

I also tried setting SPL_TEXT_BASE to 0xC0000000 and CONFIG_SPI_BOOT inside the menuconfig.

Am i missing any relevant flags or is the problem elsewhere?

Best regards.

 

soc devkit

1 Reply

  • KianHinT_altera's avatar
    KianHinT_altera
    Icon for Frequent Contributor rankFrequent Contributor
    12 days ago

    Hi Hang​ 

    The 2 pages from rocketboard already been obsolete if you're using a newer uboot/quartus version. You should refer to this page instead https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10

    or this : https://altera-fpga.github.io/rel-25.3/embedded-designs/cyclone-v/sx/soc/boot-examples/ug-linux-boot-cve-soc/

     

    Any changes using bsp-editor will not take effect anymore , and later version SOC EDS also become obsolete and no longer using.

    When building uboot, don't use the default make socfpga_cyclone5_defconfig as it is for the cyclone5 devkit, instead use the one for de0 nano (Socfpga_de10_nano_defconfig) . All the modification is to be done in defconfig or the devicetree file or .config

    Thanks

    Regards

    Kian