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XNguy4
New Contributor
6 years agoDDR4 HILO in S10MX failed initialization
I am using the qts_hilo_ddr4_x72_1066MHz sample project to test the DDR4 HILO in the Stratix 10 MX development kit. I didn't change anything, except upgrading the project from Quartus 18.1 to Quartus...
XNguy4
New Contributor
6 years agoThank you for your quick reply.
I also built the sample project in Quartus Pro 18.1 and got the same problem.
I'm not sure which PLL signal you mentioned as I didn't change anything in the sample project.
You can see the reset_n = 1 with local_reset_done = 1 in the SignalTap
Also, no timing violation was reported in TimeQuest.
Please let me know how I can fix it.
Thanks,