DDR LVDS over HSMC on Stratix IV GX Development Kit

Hi Andy,

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Yes, it's the LVDS routing of the Stratix IV GX development board that I'm concerned with. I would like to know if it is good enough for 1 Gbps.

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It should be. Do you have the board? If you don't, I could probably test the boards I have. But I wouldn't get a chance to until next week sometime. Unless of course you have a test design, that has a nice testbench, so that I can see the design, then I'll download it :)

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I'm interfacing to an Analog Devices AD9434 12-bit 500 MSPS ADC. It supports both SDR and DDR transmission. I'll use the SDR mode at first but would like to try the DDR mode, as well.

http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad9434/products/product.html

Andy

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Does your design provide a frame clock for the LVDS demux logic?

Read these if you don't know what I'm talking about:

http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf

http://www.ovro.caltech.edu/~dwh/carma_board/digitizer_tests.pdf

Cheers,

Dave