Data from FPGA to host

As I said, an external design is computing 4 signals, they are inputs on my de0-nano's GPIOs and one of them is acting as an external clock. I want to record all what happens during a certain process. I want this process to be analysed by a program (a C one) on the host computer.

I made a design that could record it in the SRAM but this memory was not large enough so I thought of writing in the SDRAM and that's where I'm stuck because I don't know how to work it.

For a real simulation I would have to know how to simulate a Qsys design and the program running on the Nios but it seems complicated for me.

I've done the SignalTap part but it doesn't seem useful if I can't simulate my design, right?