Data from FPGA to host

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For me "simulation" means a logical way of predicting what would happen, with Modelsim or Questa for example. SignalTap II is more a tool to analyse what really happens after downloading the design in the FPGA.

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In general, you have to use both. For example, lets say I have a board with a microcontroller on it, and the firmware in that microcontroller implements a parallel interface to the FPGA, and I do not have access to that firmware (eg., I have this situation on a Digilent Xilinx board). Using SignalTap II (or in reality Xilinx Chipscope), I can measure the timing of that interface, and then use that timing in the bus functional model (BFM) simulation of the parallel interface. Once I have a realistic BFM, I can simulate the design until I am confident it works, and then hardware test. Working this way, I generally have no issues once I get to hardware tests.

Cheers,

Dave