Forum Discussion
Altera_Forum
Honored Contributor
11 years agoData from FPGA to host
Hi, I have a DE0-nano board and I compute data (only 4 bits generated at about 10MHz) and I'd like to communicate it to the host cpu through the USB-blaster so programs could read it. I've read th...
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- A user can send commands in the system console but I don't know if I can type at a rate of 1kHz! Can the design put values in the sdram by itself (maybe using a NIOS)? What need is the quartus_stp? What difference with the system_console? --- Quote End --- You can write a Tcl script that can transfer the data. The "fastest" Tcl method is master_read_memory or master_write_memory. The fastest it can go is about 600kB/s. You can transfer your data by either writing to one side of a FIFO and reading it via Tcl from the other, or perhaps a slightly easier solution to understand would be to capture a block of samples, and then read them out over Tcl, and then repeat that sequence. The JTAG-to-Avalon-MM tutorial describes how to simulate a Qsys system, so you can always try that too. --- Quote Start --- Are you a professor or what is your work? --- Quote End --- I'm an engineer building FPGA-based hardware and high-speed ADC interface logic for radio astronomy signal processing. The slides I linked to show what I build. Cheers, Dave