CII DSP kit audio examples using DSP Builder

I made a sample driver for TLV320AIC23 Stereo Audio CODEC chip which is mounted on CII DSP kits in Verilog-HDL. I attach the files with two very simple DSP Builder projects.

sound_basic_dspb\sound_basic.mdl : just take in analog Line-In input and send it on Line Out/Headphone output.

sound_echo_dspb\sound_echo.mdl : add delayed echo to Line-In input and send it on Line Out/Headphone output.

To play with them:

1. open aic_audio HDL import block and push compile (after compilation, the HDL import block shrinks up, please extend down the block size).

2. Compile and Program from Signal compiler.

Both examples are for 2C70 kit. Sound_basic.mdl runs on 2C35 kit with just replacing the board block. On the other hand, since sound_echo.mdl uses some amount of M4K as delay FIFO, you have to reduce the FIFO size arund half in delay_echo_L/R block for 2C35.

Remark: To set the pin assignments of the codec chip, I used *_add_user.tcl.