Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorC4GX kit dev + TSE without external memory
Hi all, I got a new mistake. I start with the board update portal design from altera. I don't understand why in this design there is a big onchip memory and SSRAM. Can someone explain...
Altera_ForumHonored Contributor
Honored ContributorIt looks like it's setup properly... it could be a good idea to put some Signaltap probes all around the SGDMA to check up what it is doing.
