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Altera_Forum
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14 years ago

C4GX kit dev + TSE without external memory

Hi all, I got a new mistake. I start with the board update portal design from altera. I don't understand why in this design there is a big onchip memory and SSRAM. Can someone explain...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hello,

I used stratix ive developmental board, and the fpga (ep4se530k......) is having lot of internal memory. So, I configured onchip memory of size 128kbytes (not bits). please check the memory size required for SSS application. If it is morethan onchip memory size, increase the onchip memory size, so that application can be loaded.