Honored Contributor
Honored ContributorI got further and I will share what I've got so far.
The BeMicro_SDK_LAB_Materials zip file contains a compiled sof and a compiled .sopcinfo but it does not contain the source for the hardware images. The main reason for that is that they used three different pieces of third party IP. Namely they used the Microtronix RAM controller, an SD Host Controller IP from SLS corp, and the C to Hardware tools from Altera. I managed to get ahold of some information about the original hardware project. I've built an image without the C to Hardware stuff and without the SD card controller and using the opencores evaluation version of the Microtronix memory controller. I got a linux kernel up and running but so far no luck with the networking. I enabled the "Altera triple speed ethernet (SLS) driver in the kernel and the Nat Semi Phy. It recognizes ETH0 but it says it cannot talk to the Phy. I am wondering if this is the cause:http://www.alteraforum.com/forum/showthread.php?t=18394 (http://www.alteraforum.com/forum/showthread.php?t=18394). Going to try that fix and see how far I get. I'll share my work once I get something up and running.
