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You'd have to look at the pin assignments for the project, and then compare that to the schematic. Page 7 of the schematic shows that there are GPIO pins P1 to P60 connected to the 80-pin connector.
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I've tried that, non of them are configured to be output, all inputs...
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Useless for projects that need the SDRAM, but not entirely useless :)
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Which means i cant really use NIOS2 design... such a nicely designed FPGA, what a waste.:(
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Why not download the evaluation version of the controller (from whoever it is that supplies it)?
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Tried that too.. they will only allow you to use it for 1 hour everytime you compile.
I would much rather get a Terasic DE0-nano than Bemicro Nano, since they provide important IP cores. I found out, i could actually use the SDRAM controller that comes with SOPC builder, just a little timing configuration.
Michael
Honored Contributor
