Forum Discussion
Hi,
I am not asking for a reference design or anything like that. Maybe I explained myself wrongly.
On the Arria 10 Soc Dev Kit board there is a LMK04828 from TI with a 122.88 MHz VCXO. The SPI interfacing this device is connected to one of the MAX5 CPLDs and, according to the user guide, it serves as a bridge from the dedicated USB connector. The user guide says this about the LMK04828:
(there should be an image here but in-line copy/paste doesn't seem to work). For more info:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-a10-soc-devkit.pdf
(page 54)
So I have 2 questions:
1) What software from TI (or anyone else) do I need to use to interface this chip on your reference board? I can't believe you have fitted a component on a board and not tested its functionality. The user guide doesn't specify anything and the MAX-V in between the FTDI and the LMK04828 can be doing anything. Is there some sort of UART built in interface at the MAX-V with command/address/data transfers?
2) Is there a way to access this chip from the HPS (probably not)?
Thanks in advance
- EBERLAZARE_I_Intel7 years ago
Regular Contributor
Hi,
I apologize for the misunderstanding.
1) I sent a zip file that should contain all the information regarding the usage of the clock cleaner to you via message. Can you check your inbox if you have received it?
2) I cannot confirm if the clock cleaner is accessible from the HPS, I did not found any information regarding this in our documentation and the file given.
Regards.
- vage7 years ago
New Contributor
Hello,
I also need this information regarding the usage of the clock cleaner on the very same board. May I also have it please?
Many thanks and best regards.
- EBERLAZARE_I_Intel7 years ago
Regular Contributor
Hi,
I have sent to you via message as well, check it out.
- DaveS4 years ago
New Contributor
May I also have the LMK04828 info for the A10 soc dev kit?
- vage7 years ago
New Contributor
Hi,
I'm on it right now.
Many thanks and best regards!