Forum Discussion
ARM DS Unable to connect to agilex SoC HPS
Hi,
I am trying to use ARM Development Studio 2022.0 to develop ARM Bare Metal FW in my Intel® Agilex™ F-Series FPGA Development Board (FPGA Device AGFB014R24A2E3VR0), but i am unable to access HPS using the Intel FPGA Download Cable, i get the following message when trying to debug:
"Unable to connect to agilex_test
Reason:
The target hardware identity could not be verified. Please check that the target being connected to is of type Agilex SoC"
The Agilex FPGA is configured with a very basic design which includes HPS, EMIF and one OnChip Memory, the bitstream was generated using Quartus Prime Pro 22.3 and the u-boot-spl-dtb.hex from RocketBoards.org reference designs.
By the way, i cannot see the Agilex HPS device in JTAG chain using the Quartus Programmer Tool.
Any help is very welcome.
Thanks
17 Replies
- aikeu
Regular Contributor
Hi caflore1,
If I understand correctly, the Quartus programmer not detecting your device using Jtag?
May I know if the USB blaster driver already has been installed?
https://www.terasic.com.tw/wiki/Intel_USB_Blaster_II_Driver_Installation_Instructions
Thanks.
Regards,
Aik Eu
- caflore1
New Contributor
Hi Aik Eu,
USB Blaster II driver is already installed, I see the FPGA device in Quartus Programmer, what I cannot see is the HPS neither with the Quartus Programmer or ARM development studio.
Regards
- caflore1
New Contributor
Hi Aik Eu,
Yes jtagconfig works, i get the following:
1) AGF FPGA Development Kit [USB-2]
0341A0DD AGFB014(F25A:R24AR0)
020D10DD VTAP10
2) USB-BlasterII [USB-1]
0318A0DD 10M04S(A:C)
Thanks,
- aikeu
Regular Contributor
Hi caflore1,
Can check if all the switches are set to the correct default settings following the document below?
https://www.mouser.com/datasheet/2/612/ug_agilex_fpga_devl_kit-2303048.pdf
Thanks.
Regards,
Aik Eu
- aikeu
Regular Contributor
- aikeu
Regular Contributor
- caflore1
New Contributor
Hi Aik Eu,
Sorry I took the last week off. Regarding the switches, they are in the default setting. there is an strange behavior regarding these switches:
By default SW4 is OFF/ON/ON/OFF (Bypass FPGA HPS in JTAG chain), if I change this switch SW4 to OFF/ON/OFF/OFF (Enable FPGA HPS in JTAG chain) then JTAG chain seems broken, I get an error in Programmer tool regarding JTAG chain not working.
Thanks
- caflore1
New Contributor
Hi Aik Eu,
Yes, with all the switches set to default, i am able to see the FPGA Agilex device in the programmer tool.
Thanks
- aikeu
Regular Contributor