Occasional Contributor
Frequent ContributorHi, I am able to setup the design and I also facing the same problem as yours. I will try to contact the design author and clarify.
One thing to check with you is when i run the driver, I am unable to see HBM2=2 and DDR4=4 n preset 5. I only can see change BAR -1=None. For this I am using the unzip software folder under the reference design. Are you using other software driver?
at the same time, can give a check with command as below to see if the BAR2 and BAR4 si detect in the system.
Lspci -nn | grep 1172 to check the BDF.
Eg, if theBDF is 5:0.0 then run command as blow:
Lspci -s 05:00.0 -vvv
Occasional ContributorHi,
I also use the driver from reference design, but mine is called software_hbm2_ddr4 as the attached file.
Are you using the first one of following reference designs?
https://fpgacloud.intel.com/devstore/platform/?acds_version=any&family=stratix-10&board=104
Mine is AN881: PCIe AVMM DMA Gen3x16 DDR4 and HBM2 .
Our message is:
Occasional ContributorHi,
After we enabled BIOS "above 4G decoding" setting, the BAR address and memory space could be allocated.
Besides, we modified PCIe class code from default 0xff0000 to 0x068000 (Bridge device).
Otherwise BIOS of our motherboard doesn't allocate BAR of FPGA.
It seems you don't have this class code issue.
But capabilities are still "access denied".
Would it be a problem? Or it's normal?
And then, we can change BAR number after above modification,
but link test and DMA functions still fail.
All the read value of link test is 0xffffffff, which is error code replied by system.
Is your situation the same?
Besides, the test program shows " Stopping DMA run due to error." when we trigger DMA function.
Frequent ContributorI review the thread today again and found this post. I think this is nearer to the approach. The access denied should be due to your log in do not have admin access. try to type a command like sudo <password>.
Also, you need to load the driver.
Occasional ContributorHi,
By the way, please contact the design author as soon as possible to see what's wrong.
We have to make our deadline, because there will be a demo of our design to customers in the end of December.
This FPGA board has been bought for almost 2 months.
However, no reference design works so far.
https://fpgacloud.intel.com/devstore/platform/?acds_version=any&family=stratix-10&board=104
We assumed that at least one of above reference designs could prove this board's function is normal.
But the simplest "on-chip memory reference design" cannot be installed. (I've asked another question about this issue on community)
And the other three reference designs cannot work.
If there is no way to prove the functionalities of this FPGA kit,
maybe we need to return it to Intel.
