Forum Discussion
mstef1
New Contributor
New Contributoraltera modelsim, I am using a Cyclon v with quartus 13.1. under windows 10. In the simulation pll clock output, lock are undefined status after reset. maurizio stefani
Rahul_S_Intel1
Frequent Contributor
Frequent ContributorHi ,
I tried on 13.1 the PLL simulation is working, can you please try to make a standalone pll and try the simulation.
