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smile123's avatar
smile123
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

10cx220YU484的2A-bank上驱动两个trible speed ethernet。

现在我在10cx220YU484的2A-bank上驱动两个trible speed ethernet，IP核是only pcs，引脚为lvds-io，使用2A-bank的专用时钟引脚输入参考时钟，例化了两个trible speed ethernet模块，但是编译显示，内部PLL使用冲突，是不是同一个BANK只能例化一个trible speed ethernet模块？
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,


Unfortunately that's the case.


TSE IP don't support PLL merging feature unless you configure multi channel in TSE IP but I recalled multichannel support is only for 4 channel and not 2 channel


Thanks.


Regards,

dlim




  • smile123's avatar
    smile123
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    很感谢您的回答，我在IP核里面并没有找到支持4通道的配置选项。请问可以给予具体的信息吗？

    • Deshi_Intel's avatar
      Deshi_Intel
      Icon for Regular Contributor rankRegular Contributor
      5 years ago

      Attached is TSE multi port selection explanation