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PYu2's avatar
PYu2
Icon for New Contributor rankNew Contributor
6 years ago

关于Cyclone10LP CRC_ERROR报错问题

客户使用10CL016YUU256I7G，需要CRC_ERROR报错功能，现在出现想象是CRC_ERROR​在配置过程一直为高 ，一直到CONF_DONE拉高后400us左右时间，才拉低。由于使用CRC校验功能，FPGA输出使FPGA重新配置，出现循环状态。FPGA无法正常工作，现在解决办法是通过LC滤波将CRC_ERROR去除，不输出，这样FPGA可以正常工作。Active high sign...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Default it will be related to the internal oscilator except that if your design is using clkuser pin for configuration then user need to make sure to provide additional 3192 clock after CONF_DONE is high.

In other words, if you are using internal clock this number is not important and user will need to monitor the INIT_DONE pin to make sure that it is already in usermode.