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PYu2's avatar
PYu2
Icon for New Contributor rankNew Contributor
6 years ago

关于Cyclone10LP CRC_ERROR报错问题

客户使用10CL016YUU256I7G，需要CRC_ERROR报错功能，现在出现想象是CRC_ERROR​在配置过程一直为高 ，一直到CONF_DONE拉高后400us左右时间，才拉低。由于使用CRC校验功能，FPGA输出使FPGA重新配置，出现循环状态。FPGA无法正常工作，现在解决办法是通过LC滤波将CRC_ERROR去除，不输出，这样FPGA可以正常工作。Active high sign...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

After CONF_DONE is high, it will need 3,192 clock cycles for it to fully enter user mode. So if you would like to avoid the miss detection during the device initialization into usermode then I would recommend you to enable the INIT_DONE pin. So once INIT_DONE pin is high the CRC_ERROR pin will work correctly. You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10lp-51003.pdf figure 101.