Most RecentWhy do I see "Error(18108): Can't place multiple pins assigned to pin location" in my design with Partial Reconfiguration?Transceivers are not preserved when the device remains powered and unprogrammed for an extended period of time.Critical Warning (127003): Can't find Memory Initialization File or Hexadecimal (Intel-Format) File <file path> .hex -- setting all initial values to 0java.lang.UnsatisfiedLinkError: C:\altera\14.1\quartus\bin64\sld_utiljni.dll:Internal Error: Sub-system: U2B2_CDB, File: /quartus/db/u2b2/u2b2_nf_lab_ibr_module_lcb.cpp, Line: 498How do I set edge lines and active picture line for the Clocked Video Output (CVO, CVO-II)? Are there any guidelines for valid parameter settings for the CVO?Why do I get an Abort message when running the Quartus® II software on RedHat Linux?Failed to read register CIOCONTROL on device CT_1_3Do VCC_CLKIN and VCCIO need to have the same voltage in Cyclone IV devices?Why do I see transceiver PMA functionality problems when using NIOS II as an Avalon Memory Mapped Master for the transceiver reconfiguration controller when using Stratix V, Arria V, or Cyclone V transceiver devices?
