Jessica_Intel
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Re: aocl_mmd_read() and aocl_mmd_write() for memory movement
Hi @kmzaja, The best way to get started with using oneAPI for FPGAs is by trying out the tutorials at https://github.com/oneapi-src/oneAPI-samples/tree/release/2025.0. Also, please refer to the documentation here: https://www.intel.com/content/www/us/en/docs/oneapi-fpga-add-on/developer-guide/2025-0/fpga-handbook.html I am curious why you need a lower level of abstraction? Have you tried using the sycl::malloc_shared API as shown in this tutorial? https://github.com/oneapi-src/oneAPI-samples/blob/50a579b3367af653816f73f3b2e4a459baead771/DirectProgramming/C%2B%2BSYCL_FPGA/Tutorials/GettingStarted/fpga_template/src/fpga_template.cpp#L67 Best regards, Jessica1.3KViews0likes0CommentsRe: Host PC crashing after sometime of running oneAPI
Hello @RenzCiego, Based on the log message saying "Killed", and the fact that there are no error messages or a crash shown in the logs, the first thing I would check is whether the system killed the process. For example, if the process is using too much memory: https://stackoverflow.com/questions/726690/what-killed-my-process-and-why I hope this helps, Jessica2.4KViews0likes0CommentsRe: Can you analyze the bitstream icpx builds in Quartus?
Hi @Hoolabandoola, The icpx tool can run Quartus, if you use the "FPGA Hardware Image" compilation flow documented here: https://www.intel.com/content/www/us/en/docs/oneapi-fpga-add-on/developer-guide/2025-0/fpga-compilation-flags.html In that case, the html reports will be updated with post-Quartus resource utilization and clock frequency information, as described here: https://www.intel.com/content/www/us/en/docs/oneapi-fpga-add-on/developer-guide/2025-0/quartus-static-summary.html I hope this helps! Jessica1.2KViews0likes1CommentRe: Assertion failed in "hdl.cpp" when compiling HLS design
Hello Noah, Thank you for attaching a simplified version of your design. I was able to reproduce the error in hdl.cpp using WM_Test_Share.zip. I see two issues with how your code declares the mm_host interfaces in compMatrix.h. 1. The address widths (ihc::awidth) are too small. According to https://www.intel.com/content/www/us/en/docs/programmable/683349/24-1/memory-mapped-host-testbench-constructor.html the mm_host constructor's second argument specifies the size in bytes. For example, to byte-address 32*16*128 =65536 bytes, you would need an address bus with at least log_2(65536) = 16 bits (not 10 bits). 2. Since the datatype (cfixed_t) is smaller than the data bus width (1024 or 512 bits), ihc::align must be specified. For example, for a data bus of width 1024 bits or 128 bytes, ihc::align should be set to 128 bytes. Please see the example given for ihc::align at https://www.intel.com/content/www/us/en/docs/programmable/683349/24-1/pro-edition-memory-mapped-interfaces.html Please let me know if you have any questions about how to apply these suggestions to your code. Best regards, Jessica1.7KViews0likes1CommentRe: Assertion failed in "hdl.cpp" when compiling HLS design
Hi Noah, Thank you for posting your question. You are seeing an assertion failure in the compiler. I checked the release notes, and confirmed that this is not a known issue. Unfortunately I can't suggest a workaround without more information. I don't see anything incorrect about the code you shared. Are you able to create a simpler version of your design that reproduces the problem? I am also curious how cfixed_t is defined? Best regards, Jessica1.8KViews0likes0CommentsRe: I want to know how to control hyper-optimized handshaking setting
Hi @myg, There can be several reasons why hyper-optimized handshaking is "off" even though you are targeting Stratix 10. The reason that hyper-optimized handshaking is "off" should be given in the optimization reports. Please look for a column called "Hyper-Optimized Handshaking" in the Kernels Summary table of the Summary section of the report. By clicking on an entry in this column, you should see the reason appear in the Details pane below. For example, the reason might be: Hyper-optimized handshaking disabled due to instruction in Kernel my_kernel_name I hope this helps you find the information you're looking for! The most likely performance impact of no hyper-optimized handshaking, is lower achieved Fmax. Best regards, Jessica1KViews0likes1CommentRe: Avalon Empty Signal Doesn't Work with oneAPI Simulation
Hi @cagxel , There is no need for an empty signal, because the data width (8-bit char, defined on line 19 of your code) is equal to the bits_per_symbol (also 8, defined on line 27). Please refer to the Avalon spec here: https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/signal-details-78878.html "The size of the empty signal in bits is ceil[log2(<symbols per cycle>)]." I hope this helps explain the behavior you're seeing. Jessica794Views0likes0CommentsRe: cannot run GitHub samples on OneAPI FPGA emulator
Hi @wan12 , The error you're seeing is at compile time. Could you please try un-installing and re-installing the Base Toolkit and FPGA Support Package? Other users have reported that re-installing the tools fixes this problem. Jessica905Views0likes0Comments