ContributionsMost RecentMost LikesSolutionsAccessing global memory with HLS flow authoring oneAPI kernel Hello, I was wondering how one goes about configuring a oneAPI kernel to be able to access either off-chip DDR memory or on-chip esRAM when plugging the design into Platform Designer after compilation. Do I leverage the `annotated_arg` class within my kernel? Does this create an interface for my IP in Platform Designer such that I can use it to communicate with an EMIF/DDR or eSRAM?