ralfgad
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problems with non-blocking read pipe
Hello: When I use non-blocking read from pipe, the HLS compiler (I have tested with versions 21.4 and 22.3 ) , on march=x86-64 works perfectly; but when I select another target (for example Cyclone V) it jumps an assertion with the following message: ******* Error: Assert failure at E:\tmp\arc_1269897129\build\p4\acl\llvm-project\llvm\lib\Transforms\FPGATransforms\LowerPipes.cpp(375) ******* isaPipe(CI.getOperand(PIPE_OPERAND_IDX)) && "expected pipe as the first operand of a pipe call" FAILED PLEASE submit a bug report to https://software.intel.com/en-us/support/priority-support and include the crash backtrace. Stack dump: 0. Program arguments: E:/intelFPGA_pro/22.3/hls/llvm/aocl-bin/aocl-opt -HLS -O3 -march=fpga -pass-remarks-output=opt.rpt.yaml --soft-elementary-math=false -board E:/intelFPGA_pro/22.3/hls/share/models/bm/CV.xml -hdlspec i:/pruebas_HLS_intel2022/MVM_V_H_V_best28_de10nano_mejoradofinal2_version5_generico_un_fichero_mejor_fpga_con_FPsingle.prj/lib/float_lib12/float_lib12\spec.xml -vpfp-relaxed -dsp-mode=prefer-dsp -nocaching -noprefetching -fmax-search-upper-bound=240 fpga.linked.bc -o fpga.opt.bc 1. Running pass 'Lower pipe read/write accessors to channel intrinsics' on module 'fpga.linked.bc'. 0x00007FF668670C65 (0x00005B992A8D6783 0x0000019707F9C3D8 0x0000000000000016 0x00007FF668670C60) 0x00007FFD21E01881 (0x0000019707066701 0x0000019700000000 0x0000000000000000 0x0000008661B8E6A0), raise() + 0x1E1 bytes(s) 0x00007FFD21E02851 (0x0000019700000003 0x0000008600000003 0x0000019707F9C3D8 0x0000019707F9C3D8), abort() + 0x31 bytes(s) 0x00007FF6691E8190 (0x0000019707DA2AA8 0x00000197073438E8 0x0000008661B8E9D8 0x0000019707344C48) 0x00007FF6691E58FC (0x0000008661B8EE60 0x0000019700000020 0x0000019707343920 0x0000000000000008) 0x00007FF6691EC78D (0x0000000000000000 0x0000019707039210 0x0000008661B8EFB9 0x000001970703E3A0) 0x00007FF6691ECABA (0x000001970703E3C0 0x000001970703E3A0 0x00000197079593E0 0x00000197079593E0) 0x00007FF667E69365 (0x0000019709FDC900 0x0000019709FF6901 0x0000000009FDC900 0x0000019700000022) 0x00007FF667E68B37 (0x0000000000000000 0x0000008661B8F170 0x000001970A0CB2F0 0x0000019707039210) 0x00007FF6673BA11C (0x0000000000000000 0x0000000000000000 0x00007FFD21E807A8 0x0000000000000000) 0x00007FF669B44114 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000) 0x00007FFD221E7034 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), BaseThreadInitThunk() + 0x14 bytes(s) 0x00007FFD240026A1 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), RtlUserThreadStart() + 0x21 bytes(s) HLS Main Optimizer FAILED." Regards838Views0likes0CommentsRe: HLS for MAX 10
Hi @BoonBengT_Altera We are convinced that the devices in which to develop AI at the edge of the future will be based on non-volatile devices based on soft micros such as riscV (NiosV) which, curiously, are also excluded by INtel for this type of family. The most advanced and versatile way to implement AI may be based on HLS compilers like the one mentioned. Excluding HLS or NiosV on these low power devices I think is a strategic mistake. Regards Ralfgad1.5KViews1like0CommentsHLS for MAX 10
Why does the ability to work with HLS for MAX10 end in version 19.1? Is there a later version of HLS (pro or non-pro) that will allow the HLS compiler to work with MAX 10 devices? For example, it is curious that in the latest version of HLS pro edition you can work with cyclone V but nothing is said about MAX10.1.5KViews0likes5Comments