Spring Highlights from the Altera® Innovation Lab
Discover Altera Innovation Lab’s Spring 2025 highlights, including the Haasoscope Pro’s crowdfunding success, the launch of Terasic’s Atum A3 Nano Agilex™ 3 FPGA board, and a sneak peek into our hands-on presence at Crowd Supply Teardown. Join the momentum in open hardware and FPGA innovation!
New Video: Intel® FPGA Partner Program members rENIAC and Megh Computing discuss expectations for Intel® oneAPI toolkits, heterogeneous computing workloads
Intel® oneAPI products will deliver the tools needed to deploy applications and solutions across a mix of scalar, vector, matrix, and spatial (SVMS) architectures – respectively CPUs, GPUs, specialized accelerators, and FPGAs. The Intel oneAPI set of toolkits—a base kit and specialty add-ons—simplify heterogeneous programming and help developers improve efficiency and innovation. A short, new video highlights CEOs from two companies actively working with Intel® CPUs and Intel® FPGAs in a heterogeneous computing environment: Prasanna Sundararajan from rENIAC and P.K. Gupta from Megh Computing. Megh Computing and rENIAC are members of the Intel® FPGA Partner Program and both companies’ CEOs discuss their expectations for Intel oneAPI tools in this new video. In the video, Sundararajan from rENIAC explains: “rENIAC is a data acceleration company. We use CPUs, FPGAs, and SSDs to speed up databases and AI workloads. The rENIAC data engine powers Cassandra today, which is a popular database used by companies such as Netflix, Target, Best Buy, and we are extending this data engine capability to accelerate other databases such as SQL and Graph… “What's compelling about [Intel] oneAPI is a vision to support heterogeneous architectures. We leverage a uniquely positioned [heterogeneous] architecture with FPGAs and CPU and the ability to speed up our development process using such a framework as Intel oneAPI is very attractive for us.” Gupta concurs: “Megh computing is a startup based in Portland, Oregon. We are providing a platform for real time analytics accelerated with Intel FPGA accelerators and we just came out with our first product, which is a video analytics solution targeted at fraud prevention in the retail supply chain… “We see [Intel] oneAPI as providing a common programming environment across all of these different processor architectures. As we use it and deploy it for our different workloads, we expect to get a significant increase in code reuse and efficiencies in development. That's why we are excited by [Intel] oneAPI.” Here's the video: https://youtu.be/4CQtfc9Aob8 For more information about the Intel oneAPI toolkits, click here. For more information about the Intel FPGA Partner Program, click here or read the recent blog titled “Why the Intel® FPGA Partner Program matters to partners and to their customers.” For more information about the members in the Intel FPGA Partner Program mentioned above, Megh computing and rENIAC, see: rENIAC’s FPGA-based Distributed Data Engine boosts Cassandra database performance as much as 10X when deployed as data proxy WWT’s Advanced Technology Center provides access to seven diverse high-performance, FPGA-accelerated application demos Intel’s silicon and software portfolio empowers our customers’ intelligent services from the cloud to the edge. Notices and Disclaimers Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates. See backup for configuration details. No product or component can be absolutely secure. Intel does not control or audit third-party data. You should consult other sources to evaluate accuracy. Your costs and results may vary. Intel technologies may require enabled hardware, software or service activation. © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. Why the Intel® FPGA Partner Program matters to partners and to their customers
Contributed by Lakecia Gunter, Vice President, Ecosystem Development and Operations, Intel Corporation Companies no longer compete one-on-one. Today, it's ecosystem versus ecosystem. The broadest ecosystem in which partners come together to develop and build solutions that deliver groundbreaking capabilities and solve key operational, technological, or business pain points will deliver the solutions that customers prefer. That is why Intel created the Intel® FPGA Partner Program. Our goal is to be a true collaborator with our partners, who are turning to FPGA acceleration to address some of the most complex and important computing problems in the industry. We see the Intel FPGA Partner Program as a forum for innovation and for learning from one another. There is a broad and diverse group of players interested in harnessing the power of Intel® FPGA acceleration to advance the technology in different sectors. These partners include: Developers who create custom applications in areas such as AI and Big Data using Intel software tools and libraries. Original Device Manufacturer (ODMs) that create custom hardware and platforms based on Intel silicon and architecture Independent Software Vendors (ISVs) that build applications and turnkey solutions including database and analytics offerings serving verticals such as video analytics and surveillance, manufacturing, and smart retail. This group also includes our system software vendor partners who build the foundational operating systems, hypervisors, frameworks and orchestration software on which most applications are deployed. System Integrators (SIs), Original Equipment Manufacturers (OEMs), and other types of channel partners that help Intel bring these solutions to market and deploy at scale. Our partners are trying to solve some of the most difficult problems in the world, whether those challenges are at the edge, in the network, on-premise, or in the cloud. Intel FPGA partners connect with each other and share ideas about what they are seeing in the marketplace. They discuss customer needs and how to leverage their relationship with Intel to develop solutions faster. In every case, we bring the full breadth and depth of Intel computing expertise to bear on solving their challenges. Intel FPGA technology is proving to be useful in a growing number of application areas. For example, it has been indispensable to rENIAC’s FPGA-based Distributed Data Engine, which accelerates the Cassandra database, as well as Swarm64’s FPGA-accelerated PostgreSQL relational database solution. We have also worked with Megh Computing to develop FPGA-accelerated, real-time analytics for streaming big data and with HCL Technology to develop a Segment Routing over IPv6 NFV solution. In another groundbreaking solution, our partner HCL has built an OpenVSwitch for NFVi solution, which runs on an Intel® FPGA Programmable Acceleration Card (Intel FPGA PAC) N3000 and achieves packet learning rates of 500K rules/second. We have also been delighted to discover Intel FPGA Partner Program solutions employed in some surprising areas. For example, one partner is developing ways to analyze and preserve coral reefs. After each successful collaboration, our partners are coming back to us very excited about the compute performance that Intel can deliver and are eager to expand their offerings. The Intel FPGA Partner Program allows participants to explore the full potential of Intel FPGA technology to address their customers’ pain points. Through the program, partners gain great exposure to other partners across a large customer base. Intel FPGA Partner Program members receive several benefits, which include access to technical resources (including our developer cloud access, Intel® DevCloud), access to exclusive Intel marketing and networking events, technical training, market insights, and technology development support. Intel believes in a hands-on approach with partners, starting with understanding the problems they're trying to solve, making sure the broad Intel semiconductor portfolio can meet their needs, and ensuring that the right software capabilities are in place. Our approach to partnership is a competitive differentiator. The Intel FPGA Partner Program furthers our commitment to Intel partners. We continue to support new generations of collaborators and developers, who are working on the next frontier of innovation to drive business growth for themselves, for Intel, and for our mutual end customers. Find out more about the Intel FPGA Partner Program here. For more information about members in the Intel FPGA Partner Program mentioned above, see: rENIAC’s FPGA-based Distributed Data Engine boosts Cassandra database performance as much as 10X when deployed as data proxy Open vSwitch for NFVi based on Intel® FPGA Programmable Acceleration Card (Intel FPGA PAC) N3000 achieves first-packet learning rate of 500K rules/sec, near-wireline performance Improve NFV Infrastructure performance with Segment Routing over IPv6 using the Intel® FPGA PAC N3000 WWT’s Advanced Technology Center provides access to seven diverse high-performance, FPGA-accelerated application demos Notices and Disclaimers Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates. See backup for configuration details. No product or component can be absolutely secure. Intel does not control or audit third-party data. You should consult other sources to evaluate accuracy. Your costs and results may vary. Intel technologies may require enabled hardware, software or service activation. © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. Toyota sees 2x to 3x performance gains in PostgreSQL/PostGIS performance using FPGA-enabled servers and Swarm64 DA
In two benchmarks run by Toyota, Swarm64 DA (Database Accelerator) used in conjunction with a server containing an Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA boosted open-source PostgreSQL/PostGIS performance by a factor of 3x and delivered more predictable query performance (with 35x less latency variance) under concurrent loads. Swarm64 DA is an FPGA-accelerated, PostgreSQL relational database used for enterprise data analytics. When Swarm64 is installed, it programs the FPGA with hundreds of processes that work in parallel to write, read, filter, compress, and decompress data contained within database tables. This massive added parallelism lowers the CPUs’ workloads and increases their throughput. The overall result is much better server performance using fewer servers, which reduces overall TCO. The results of these two PostgreSQL/PostGIS benchmarks are documented in a new White Paper titled “Measuring the impact of FPGA acceleration on PostGIS concurrent query performance at Toyota,” which is now available on the Swarm64 Web site. Tripling server performance means, for example, that a 5-node cluster of FPGA-equipped servers can handle the same PostgreSQL load as a 15-node cluster of servers equipped only with CPUs. This outcome has profound implications for capital equipment and operating costs in data centers. Put simply, FPGA-equipped servers with appropriate acceleration software can handle many more database workloads. The benchmarks consisted of two scenarios: Test Scenario 1: Obstacle detection. Find the list of vehicles that have been within 2 km of a random location within the last 6 minutes. The scenario assesses the efficiency of FPGA acceleration for the geospatial-optimized functions of PostGIS. Test Scenario 2: Analytics scenario on the NYC Taxi Dataset, a 267 gigabyte table consisting of 1.1 billion rows of data. This data set is too large to be held in the servers’ RAM and therefore required SSD accesses. In Test Scenario 1, the FPGA-equipped servers delivered more consistent query performance – with 35x less latency variance – and 3x faster performance over 3200 queries while scaling the number of concurrent users from 1 to 32. In Test Scenario 2, query response latency dropped by a factor of 2x to 3x using FPGA-accelerated servers, depending on the query. To download a copy of the White Paper from Swarm64, click here. Note: Swarm64 is a member of the Intel® FPGA Partner Program. Legal Notices and Disclaimers: Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Check with your system manufacturer or retailer or learn more at intel.com. Results have been estimated or simulated using internal Intel analysis, architecture simulation and modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. Intel does not control or audit third-party data. You should review this content, consult other sources, and confirm whether referenced data are accurate. Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Altera is a trademark of Intel Corporation or its subsidiaries. Cyclone is a trademark of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.FPGA Acceleration in the Datacenter: See and Hear High-Level Experts from Intel and FPGA Partners at The Next FPGA Platform Day-Long, Live Event – January 22 in San Jose
The technology Web site The Next Platform delivers regular, ongoing coverage of high-end enterprise computing, supercomputing, hyperscale data centers, and public clouds as well as frequently covering FPGAs and programmable logic as acceleration platforms for these applications. Now, The Next Platform is breaking through its usual online delivery of information via computer, tablet, and phone screens to create its first-ever, day-long, live event devoted exclusively to discussions of FPGAs, FPGA markets, and the current state of FPGA application acceleration in datacenter networking, in storage, and at the edge. Called The Next FPGA Platform, this event, gathers together many preeminent industry leaders to bring you up-to-the-minute information about and deep, expert insights into FPGAs and FPGA acceleration – information you won’t get elsewhere. It all takes place at The Glass House, located in downtown San Jose at 2 South Market Street (at the very heart of Silicon Valley) on January 22. Intel is a Platinum sponsor for this event and high-level experts from Intel will appear several times during this FPGA-centric event, including: A keynote titled “The Future of Reconfigurable Devices and Chip-level Heterogenous Integration” presented by Jose Alvarez, Senior Director at Intel in the Programmable Solutions Group‘s CTO Office. The keynote will be followed by a one-on-one interview with Alvarez with audience interaction. A panel discussion on FPGA Market Insights and Futures, including Lakecia Gunter, Vice President and General Manager of Ecosystem Development & Operations at Intel in the Programmable Solutions Group. A panel discussion on FPGA Hardware Innovations, including Patrick Dorsey, Vice President and General Manager of FPGA and Power Product Marketing at Intel in the Programmable Solutions Group. A panel discussion on FPGA Software Innovations, including Hua Xue, Vice President and General Manager of Software Engineering at Intel in the Programmable Solutions Group. A panel discussion on FPGAs as a Pervasive Presence in the Datacenter: A look at Storage/Network Opportunities, including Jim Dworkin, Senior Director of Business Development at Intel in the Data Platforms Group. In addition, several members of the rapidly expanding Intel® FPGA Partner Program will be in attendance including Algo-Logic, Molex (a Silver event sponsor and panelist), Gidel (a Gold event sponsor and presenter), HCL, InAccel (a Silver event sponsor and panelist), Megh Computing, Reniac, and Silicom. These partners are committed to helping you shorten your time to market for a wide variety of FPGA-accelerated applications including networking, NFV, and telecommunications; data analytics; AI; financial technology (Fintech); genomics; and media processing using products and services all based on Intel® FPGAs. In addition to presentations and panel participation, representatives from these partner companies will be available for one-on-one discussions during the event’s several networking breaks and during lunch. The organizers promise that the event will be a PowerPoint-free zone to minimize the marketing messages and to maximize personal interaction. They promise to deliver an event that is “deeply technical and never dull.” Interviews with keynote speakers and panelists will be moderated by The Next Platform founders and editors and by select guest interviewers who will field audience questions and will ask pointed questions of their own. Click here and here for more event details, or click here to purchase tickets for The Next FPGA Platform live event. Space is limited and you should know that two previous live events on related topics, The Next I/O Platform and The Next AI Platform, sold out. Legal Notices and Disclaimers: Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Check with your system manufacturer or retailer or learn more at intel.com. Results have been estimated or simulated using internal Intel analysis, architecture simulation and modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. Intel does not control or audit third-party data. You should review this content, consult other sources, and confirm whether referenced data are accurate. Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Altera is a trademark of Intel Corporation or its subsidiaries. Cyclone is a trademark of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
