Why does my design use high-speed tiles when the Programmable Power Maximum High-Speed Fraction of Used LAB Tiles logic option is set to 0?

Description

Although the Quartus® II Help definition of the Programmable Power Maximum High-Speed Fraction of Used LAB Tiles logic option does not specify any limitations, this option only impacts tiles which are set as high-speed for timing closure purposes. Certain tiles, such as those used for memories, synchronizers & locally-routed clocks, need to be set as high-speed to guarantee functionality. These tiles are not impacted by this option.

Resolution

The description of this option is scheduled to be updated in a future release of the Quartus II software to include this information.