How long does it take to update or reconfigure the Stratix™ devices' enhanced phase-locked loops (PLLs) in real-time?

Description

The SCANCLK port of the PLLs, which is used to shift in counter and delay element settings, can be clocked up to 25 MHz. After all the scan registers are loaded, the Stratix^™ PLL will update to new settings and relock within 20 ms.