Knowledge Base Article

Does the reset input of the Arria 10 EMIF IP need to be synchronous to the EMIF clock domains?

Description
No, the global_reset_n input signal is synchronized to the various internal clock domains of the Arria® 10 EMIF IP before being used.
Updated 2 months ago
Version 3.0
troubleshooting
No CommentsBe the first to comment