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Altera_Forum's avatar
Altera_Forum
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15 years ago

VHDL Code Of 2 input XOR -gate

Hi, I am new to VHDL programing and i had written a VHDL code on 2 input XOR gate using process and it compiles successfully but in test bench waveform i am unable to get the output that is for al...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Your process looks ok to me

though you can simplify it to: 


process(A,B)
begin
if (A = '1' and B = '0') or (A = '0' and B = '1') then
     C <= '1';
else
     C <= '0';
end if;
end process;

either way it should work. Change the entity name to something other than xor2 just in case. Otherwise there is some thing wrong with your observation.