Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 RB_OR_GATE(s)). Error(175001): The Fitter cannot place 1 RB_OR_GATE, which is within Generic Component pcie_subsys_intel_pcie_gts_0. Error(16234): No legal location could be found out of 30 considered location(s). Reasons why each location could not be used are summarized below: Error(23276): Could not find usable path between source pin: OUT[0] and the RB_OR_GATE: I_PERSTN_BANK0[0] Error(175022): The RB_OR_GATE could not be placed in any location to satisfy its connectivity requirements set_location_assignment PIN_AY3 -to i_pcie_rx_n[3] set_location_assignment PIN_AY1 -to i_pcie_rx_p[3] set_location_assignment PIN_BB1 -to i_pcie_rx_p[2] set_location_assignment PIN_BB3 -to i_pcie_rx_n[2] set_location_assignment PIN_BD3 -to i_pcie_rx_n[1] set_location_assignment PIN_BD1 -to i_pcie_rx_p[1] set_location_assignment PIN_BF1 -to i_pcie_rx_p[0] set_location_assignment PIN_BF3 -to i_pcie_rx_n[0] set_location_assignment PIN_BE7 -to o_pcie_tx_p[0] set_location_assignment PIN_BE10 -to o_pcie_tx_n[0] set_location_assignment PIN_BC7 -to o_pcie_tx_p[1] set_location_assignment PIN_BC10 -to o_pcie_tx_n[1] set_location_assignment PIN_BA7 -to o_pcie_tx_p[2] set_location_assignment PIN_BA10 -to o_pcie_tx_n[2] set_location_assignment PIN_AW7 -to o_pcie_tx_p[3] set_location_assignment PIN_AW10 -to o_pcie_tx_n[3] set_location_assignment PIN_AV16 -to i_pcie_refclk set_location_assignment PIN_AV21 -to "i_pcie_refclk(n)" -comment IOBANK_4B set_location_assignment PIN_BM28 -to i_pcie_perst_n -comment IOBANK_6A set_location_assignment PIN_BE25 -to i_pcie_perst_n_1 -comment IOBANK_6B set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to i_pcie_rx_p -entity a5e_top set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to i_pcie_rx_n -entity a5e_top set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to o_pcie_tx_p -entity a5e_top set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to o_pcie_tx_n -entity a5e_top set_instance_assignment -name IO_STANDARD "1.8-V LVCMOS" -to i_pcie_perst_n_1 -entity a5e_top set_instance_assignment -name IO_STANDARD "1.8-V LVCMOS" -to i_pcie_perst_n -entity a5e_top set_instance_assignment -name IO_STANDARD "CURRENT MODE LOGIC (CML)" -to i_pcie_refclk -entity a5e_top