vendor_name = ModelSim
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.qip
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.vhd
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL/e_PLL_0002.v
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL/e_PLL_0002.qip
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.sip
source_file = 1, C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd
source_file = 1, c:/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/prmtvs_b.vhd
source_file = 1, c:/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/prmtvs_p.vhd
source_file = 1, c:/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/timing_b.vhd
source_file = 1, c:/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/timing_p.vhd
source_file = 1, c:/intelfpga_lite/18.1/quartus/libraries/megafunctions/altera_pll.v
design_name = e_Simple_PLL
instance = comp, \ul_100MHzClock_O~output\, ul_100MHzClock_O~output, e_Simple_PLL, 1
instance = comp, \ul_50MHzClock_O~output\, ul_50MHzClock_O~output, e_Simple_PLL, 1
instance = comp, \ul_25MHzClock_O~output\, ul_25MHzClock_O~output, e_Simple_PLL, 1
instance = comp, \ul_PllLocked_O~output\, ul_PllLocked_O~output, e_Simple_PLL, 1
instance = comp, \l_PllClock_I~input\, l_PllClock_I~input, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_REFCLK_SELECT\, e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_REFCLK_SELECT, e_Simple_PLL, 1
instance = comp, \ul_PllRst_I~input\, ul_PllRst_I~input, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL\, e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_RECONFIG\, e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_RECONFIG, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER\, e_Pll_inst|e_pll_inst|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[0]~CLKENA0\, e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[0]~CLKENA0, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER\, e_Pll_inst|e_pll_inst|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[1]~CLKENA0\, e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[1]~CLKENA0, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER\, e_Pll_inst|e_pll_inst|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER, e_Simple_PLL, 1
instance = comp, \e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[2]~CLKENA0\, e_Pll_inst|e_pll_inst|altera_pll_i|outclk_wire[2]~CLKENA0, e_Simple_PLL, 1
instance = comp, \~QUARTUS_CREATED_GND~I\, ~QUARTUS_CREATED_GND~I, e_Simple_PLL, 1
