{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1732784217929 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition " "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1732784217937 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 28 09:56:57 2024 " "Processing started: Thu Nov 28 09:56:57 2024" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1732784217937 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784217937 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Simple_PLL -c e_Simple_PLL " "Command: quartus_map --read_settings_files=on --write_settings_files=off Simple_PLL -c e_Simple_PLL" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784217937 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1732784218397 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1732784218397 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_pll/e_pll.vhd 2 1 " "Found 2 design units, including 1 entities, in source file e_pll/e_pll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 e_PLL-rtl " "Found design unit 1: e_PLL-rtl" {  } { { "e_PLL/e_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.vhd" 22 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225822 ""} { "Info" "ISGN_ENTITY_NAME" "1 e_PLL " "Found entity 1: e_PLL" {  } { { "e_PLL/e_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.vhd" 11 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225822 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225822 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_pll/e_pll/e_pll_0002.v 1 1 " "Found 1 design units, including 1 entities, in source file e_pll/e_pll/e_pll_0002.v" { { "Info" "ISGN_ENTITY_NAME" "1 e_PLL_0002 " "Found entity 1: e_PLL_0002" {  } { { "e_PLL/e_PLL/e_PLL_0002.v" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL/e_PLL_0002.v" 2 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_simple_pll.vhd 2 1 " "Found 2 design units, including 1 entities, in source file e_simple_pll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 e_SIMPLE_PLL-behav " "Found design unit 1: e_SIMPLE_PLL-behav" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 18 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""} { "Info" "ISGN_ENTITY_NAME" "1 e_Simple_PLL " "Found entity 1: e_Simple_PLL" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Error" "EVRFX_VHDL_IS_NOT_DECLARED" "ul_PllRst_s e_Simple_PLL.vhd(35) " "VHDL error at e_Simple_PLL.vhd(35): object \"ul_PllRst_s\" is used but not declared" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 35 0 0 } }  } 0 10482 "VHDL error at %2!s!: object \"%1!s!\" is used but not declared" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 1  1  Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "4839 " "Peak virtual memory: 4839 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_END_BANNER_TIME" "Thu Nov 28 09:57:05 2024 " "Processing ended: Thu Nov 28 09:57:05 2024" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:08 " "Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:17 " "Total CPU time (on all processors): 00:00:17" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225914 ""}
{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 3 s 1  " "Quartus Prime Full Compilation was unsuccessful. 3 errors, 1 warning" {  } {  } 0 293001 "Quartus Prime %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784226515 ""}
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1732784217929 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition " "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1732784217937 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 28 09:56:57 2024 " "Processing started: Thu Nov 28 09:56:57 2024" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1732784217937 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784217937 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Simple_PLL -c e_Simple_PLL " "Command: quartus_map --read_settings_files=on --write_settings_files=off Simple_PLL -c e_Simple_PLL" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784217937 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1732784218397 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1732784218397 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_pll/e_pll.vhd 2 1 " "Found 2 design units, including 1 entities, in source file e_pll/e_pll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 e_PLL-rtl " "Found design unit 1: e_PLL-rtl" {  } { { "e_PLL/e_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.vhd" 22 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225822 ""} { "Info" "ISGN_ENTITY_NAME" "1 e_PLL " "Found entity 1: e_PLL" {  } { { "e_PLL/e_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL.vhd" 11 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225822 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225822 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_pll/e_pll/e_pll_0002.v 1 1 " "Found 1 design units, including 1 entities, in source file e_pll/e_pll/e_pll_0002.v" { { "Info" "ISGN_ENTITY_NAME" "1 e_PLL_0002 " "Found entity 1: e_PLL_0002" {  } { { "e_PLL/e_PLL/e_PLL_0002.v" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL/e_PLL_0002.v" 2 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e_simple_pll.vhd 2 1 " "Found 2 design units, including 1 entities, in source file e_simple_pll.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 e_SIMPLE_PLL-behav " "Found design unit 1: e_SIMPLE_PLL-behav" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 18 -1 0 } }  } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""} { "Info" "ISGN_ENTITY_NAME" "1 e_Simple_PLL " "Found entity 1: e_Simple_PLL" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1732784225824 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Error" "EVRFX_VHDL_IS_NOT_DECLARED" "ul_PllRst_s e_Simple_PLL.vhd(35) " "VHDL error at e_Simple_PLL.vhd(35): object \"ul_PllRst_s\" is used but not declared" {  } { { "e_Simple_PLL.vhd" "" { Text "C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd" 35 0 0 } }  } 0 10482 "VHDL error at %2!s!: object \"%1!s!\" is used but not declared" 0 0 "Analysis & Synthesis" 0 -1 1732784225824 ""}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 1  1  Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "4839 " "Peak virtual memory: 4839 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_END_BANNER_TIME" "Thu Nov 28 09:57:05 2024 " "Processing ended: Thu Nov 28 09:57:05 2024" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:08 " "Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:17 " "Total CPU time (on all processors): 00:00:17" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1732784225914 ""}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1732784225914 ""}
