m255
K4
z2
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
Z0 dC:/Users/CEH_1/Desktop/Simple_PLL/simulation/modelsim
Ee_pll
Z1 w1732783883
Z2 DPx3 std 6 textio 0 22 zE1`LPoLg^DX3Oz^4Fj1K3
Z3 DPx4 ieee 14 std_logic_1164 0 22 eNV`TJ_GofJTzYa?f<@Oe1
Z4 DPx12 altera_lnsim 23 altera_lnsim_components 0 22 QZo1Vh6en2ZO3=hNmAfQ>0
R0
Z5 8C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL_sim/e_PLL.vho
Z6 FC:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL_sim/e_PLL.vho
l0
L33
V0U6AdUR6PS]Zi>dQdgM^P0
!s100 QTMDMIFfoB9c3N3^d_N<70
Z7 OV;C;10.5b;63
32
Z8 !s110 1733226703
!i10b 1
Z9 !s108 1733226703.000000
Z10 !s90 -reportprogress|300|C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL_sim/e_PLL.vho|
Z11 !s107 C:/Users/CEH_1/Desktop/Simple_PLL/e_PLL/e_PLL_sim/e_PLL.vho|
!i113 1
Z12 tExplicit 1 CvgOpt 0
Artl
R2
R3
R4
DEx4 work 5 e_pll 0 22 0U6AdUR6PS]Zi>dQdgM^P0
l52
L45
VDHe:lLFU2Y4GIc_b0hlfY3
!s100 E>fc4U5^ZQf]3bYGAP[YR3
R7
32
R8
!i10b 1
R9
R10
R11
!i113 1
R12
Ee_simple_pll
Z13 w1732784286
R2
R3
R0
Z14 8C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd
Z15 FC:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd
l0
L4
VOlc[NVIfCazmN89HGl0_`3
!s100 IDO^7DVKHQ>MGQW>ZCX`01
R7
31
R8
!i10b 1
R9
Z16 !s90 -reportprogress|300|-93|-work|work|C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd|
Z17 !s107 C:/Users/CEH_1/Desktop/Simple_PLL/e_Simple_PLL.vhd|
!i113 1
Z18 o-93 -work work
R12
Abehav
R2
R3
DEx4 work 12 e_simple_pll 0 22 Olc[NVIfCazmN89HGl0_`3
l31
L18
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!s100 ?<idI1fo2Tfd:^F<O3Q4h1
R7
31
R8
!i10b 1
R9
R16
R17
!i113 1
R18
R12
Ee_tb
Z19 w1733227324
R2
R3
R0
Z20 8tb.vhd
Z21 Ftb.vhd
l0
L5
VVP[;@B3bVUkJZ87P0MEJj1
!s100 fgdFV87HIEo<Xc5RB@dA@2
R7
32
Z22 !s110 1733227329
!i10b 1
Z23 !s108 1733227329.000000
Z24 !s90 -reportprogress|300|tb.vhd|
Z25 !s107 tb.vhd|
!i113 1
R12
Aa_tb
R2
R3
Z26 DEx4 work 4 e_tb 0 22 VP[;@B3bVUkJZ87P0MEJj1
l28
L8
V;2B?e?EF@48gPLnNkiMh[0
!s100 Gi^dhI0STa@[NEcYKek]T0
R7
32
R22
!i10b 1
R23
R24
R25
!i113 1
R12
