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// High Level Design Compiler for Intel(R) FPGAs Version 24.2 (Release Build #99.1)
// 
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// SystemVerilog created from i_llvm_fpga_forked_and_func_b1_start_forked_and_func0
// Created for function/kernel and_func
// SystemVerilog created on Wed Oct 30 16:13:02 2024


(* altera_attribute = "-name AUTO_SHIFT_REGISTER_RECOGNITION OFF; -name MESSAGE_DISABLE 10036; -name MESSAGE_DISABLE 10037; -name MESSAGE_DISABLE 14130; -name MESSAGE_DISABLE 14320; -name MESSAGE_DISABLE 15400; -name MESSAGE_DISABLE 14130; -name MESSAGE_DISABLE 10036; -name MESSAGE_DISABLE 12020; -name MESSAGE_DISABLE 12030; -name MESSAGE_DISABLE 12010; -name MESSAGE_DISABLE 12110; -name MESSAGE_DISABLE 14320; -name MESSAGE_DISABLE 13410; -name MESSAGE_DISABLE 113007; -name MESSAGE_DISABLE 10958" *)
module and_func_i_llvm_fpga_forked_b1_start_forked_and_func0 (
    input wire [0:0] in_stall_in,
    output wire [0:0] out_buffer_out,
    output wire [0:0] out_valid_out,
    input wire [0:0] in_buffer_in,
    input wire [0:0] in_valid_in,
    input wire clock,
    input wire resetn
    );

    wire [0:0] adapt_scalar_trunc4_sel_x_b;
    wire [6:0] c_i7_03_q;
    wire [7:0] element_extension2_q;
    wire [7:0] i_llvm_fpga_forked_and_func_b1_start_forked_and_func1_buffer_in;
    wire [7:0] i_llvm_fpga_forked_and_func_b1_start_forked_and_func1_buffer_out;


    // c_i7_03(CONSTANT,4)
    assign c_i7_03_q = $unsigned(7'b0000000);

    // element_extension2(BITJOIN,5)@0
    assign element_extension2_q = {c_i7_03_q, in_buffer_in};

    // i_llvm_fpga_forked_and_func_b1_start_forked_and_func1(EXTIFACE,6)@0
    assign i_llvm_fpga_forked_and_func_b1_start_forked_and_func1_buffer_in = element_extension2_q;
    acl_dspba_buffer #(
        .WIDTH(8)
    ) thei_llvm_fpga_forked_and_func_b1_start_forked_and_func1 (
        .buffer_in(element_extension2_q),
        .buffer_out(i_llvm_fpga_forked_and_func_b1_start_forked_and_func1_buffer_out)
    );

    // adapt_scalar_trunc4_sel_x(BITSELECT,2)@0
    assign adapt_scalar_trunc4_sel_x_b = i_llvm_fpga_forked_and_func_b1_start_forked_and_func1_buffer_out[0:0];

    // sync_out(GPOUT,8)@0
    assign out_buffer_out = adapt_scalar_trunc4_sel_x_b;
    assign out_valid_out = in_valid_in;

endmodule
