LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;

ENTITY sys_pll IS
	PORT (rst_in, clk, sys_clk, my_reset : IN STD_LOGIC;
			refclk, outclk_0, rst : OUT STD_LOGIC;
			locked : inout STD_LOGIC);
END sys_pll;

ARCHITECTURE behavior OF sys_pll IS
	SIGNAL sys_rst : STD_LOGIC;
	
	BEGIN
		PROCESS (my_reset, locked)
			sys_rst <= NOT(locked) AND my_reset;
		END PROCESS;
END behavior;