library IEEE;
use IEEE.std_logic_1164.all;


entity CACHE_CONTROL is   -- CACHE_CONTROL 
        port (  
				-- nodes and buses for RAM_ROM_BIDIR
				CLOCK_PUBLIC							: in std_logic; 
				COUNTER_DEC_CHANGE						: in std_logic;
				DATA_BUS_IN								: in std_logic_vector(7 downto 0);

                CLOCK_DEC, ROM_DEC, W					: in std_logic; 
                ADDR_DEC 								: in std_logic_vector(7 downto 0);
                DATA_MEM								: inout std_logic_vector(7 downto 0);
                ADDR_MEM 								: out std_logic_vector(7 downto 0);
				CLOCK_MEM, WRITE_MEM, DELAY				: out std_logic;				
				
				-- nodes and buses for CACHE_MAIN
				TAG										: in std_logic_vector(2 downto 0);
				OUT_CACHE								: in std_logic_vector(7 downto 0);
				MISS, M									: in std_logic;		
				TAG_FIX									: in std_logic_vector(2 downto 0);		
				CLOCK_CACHE, WRITE_CACHE				: out std_logic; 
				ADDR_CACHE, IN_CACHE 					: out std_logic_vector(7 downto 0);				

				
				-- nodes and buses for FLAG_BLOCK	
				F										: in std_logic;							
				CLOCK_FLAG								: out std_logic; 
				
				-- nodes and buses for COUNTER
				COUNTER									: in std_logic_vector(7 downto 0);
				ACLR, CLOCK_COUNTER						: out std_logic;	
				
				-- nodes and buses for other
				CLOCK_FIX								: out std_logic	
        );
end CACHE_CONTROL ;


architecture CACHE_ARCH of CACHE_CONTROL is
begin
		
        process (COUNTER, ROM_DEC, COUNTER_DEC_CHANGE, CLOCK_PUBLIC)        
        begin
        DATA_MEM		<= "ZZZZZZZZ";      
        if(ROM_DEC='0') then		
			case COUNTER is
					when "00000000" => 		-- 0
						--if COUNTER_DEC_CHANGE'stable(7 ns) then
						ADDR_CACHE 		<= ADDR_DEC;
						WRITE_CACHE 	<= '0';
						CLOCK_CACHE 	<= not(CLOCK_DEC);
						DELAY			<= '1';						
						CLOCK_COUNTER	<= not(CLOCK_DEC);						
						CLOCK_FIX		<= not(CLOCK_DEC);
						ACLR			<= '0';
						--end if;
					when "00000001" =>		-- 1	
						CLOCK_COUNTER	<= CLOCK_DEC;					
						CLOCK_FIX		<= '0';
						if(W='1' and (M='1' or (M='1' and F='0'))) then
							ADDR_CACHE 		<= ADDR_DEC;
							WRITE_CACHE	<= '1';
							IN_CACHE	<= DATA_BUS_IN;
							CLOCK_CACHE 	<= CLOCK_DEC;
							CLOCK_FLAG	<= CLOCK_DEC;							
							DELAY			<= '1';	
							ACLR			<= '0';	
						end if;	
						if(M='1' and F='1') then
							ADDR_MEM (7 downto 5)	<= TAG(2 downto 0);
							ADDR_MEM (4 downto 0)	<= ADDR_DEC(4 downto 0);
							DATA_MEM				<= OUT_CACHE;
							WRITE_MEM				<= '1';
							CLOCK_MEM				<= CLOCK_DEC;														
							DELAY			<= '1';	
							ACLR			<= '0';	
						end if;
						if(M='0' and W='0') then
							CLOCK_CACHE <= '0';
							DELAY		<= '0';
							ACLR		<= '1';
						end if;
						if(W='0' and F='0' and M='1') then
							ADDR_MEM (7 downto 1)	<= ADDR_DEC(7 downto 1);
							ADDR_MEM (0)			<= not(ADDR_DEC(0));
							WRITE_MEM				<= '0';
							CLOCK_MEM				<= CLOCK_DEC;															
							DELAY			<= '1';	
							ACLR			<= '0';	
						end if;
					when "00000010" => 		-- 2
						CLOCK_COUNTER	<= CLOCK_DEC;
						if(W='1' and(M='0' or (M='1' and F='0'))) then
							CLOCK_CACHE	<= '0';
							DELAY		<= '0';
							CLOCK_FLAG	<= '0';
							ACLR		<= '1';							
						end if;					
						if((W='1' and M='1' and F='1') or (W='0' and M='1')) then
							ADDR_CACHE (7 downto 1)	<= ADDR_DEC(7 downto 1);
							ADDR_CACHE(0)			<= not(ADDR_DEC(0));
							WRITE_CACHE 	<= '0';
							CLOCK_CACHE 	<= CLOCK_DEC;
							CLOCK_MEM				<= '0';
																													
							DELAY			<= '1';	
							ACLR			<= '0';	
						end if;	
						if(M='1' and F='0' and W='0') then
							WRITE_CACHE 	<= '1';
							ADDR_CACHE 		<= ADDR_DEC;
							IN_CACHE		<= DATA_MEM;
							CLOCK_CACHE 	<= CLOCK_DEC;
							DELAY			<= '1';	
							ACLR			<= '0';	
						end if;
					when "00000011" =>		-- 3
						CLOCK_MEM		<= CLOCK_DEC;
						DELAY			<= '1';	
						ACLR			<= '0';	
						CLOCK_COUNTER	<= CLOCK_DEC;
						if(M='1' and F='1') then
							ADDR_MEM (7 downto 5)	<= TAG(2 downto 0);
							ADDR_MEM (4 downto 1)	<= ADDR_DEC(4 downto 1);
							ADDR_MEM(0)	<= not(ADDR_DEC(0));
							DATA_MEM				<= OUT_CACHE;
							WRITE_MEM				<= '1';							
						end if;				
						if(M='1' and F='0' and W='0') then
							ADDR_MEM (7 downto 1)	<= ADDR_DEC(7 downto 1);
							ADDR_MEM(0)	<= ADDR_DEC(0);
							WRITE_MEM				<= '0';		
							CLOCK_CACHE	<= '0';
						end if;		
					when "00000100" =>		-- 4
						
						ACLR			<= '0';	
						CLOCK_COUNTER	<= CLOCK_DEC;
						if(W='1' and F='1' and M='1') then
							ADDR_CACHE 				<= ADDR_DEC;	
							WRITE_CACHE				<= '1';
							IN_CACHE				<= DATA_BUS_IN;	
							CLOCK_CACHE				<= CLOCK_DEC;	
							DELAY			<= '1';						
						end if;
						if(W='0' and M='1' and F='0') then
							ADDR_CACHE	<= ADDR_DEC;
							
							DELAY			<= '0'; -- delete
							
							WRITE_CACHE		<= '1';
							IN_CACHE		<= DATA_MEM;
							CLOCK_CACHE		<= CLOCK_DEC;
						end if;
						if(M='1' and F='1') then
							ADDR_MEM	<= ADDR_DEC;
							WRITE_MEM	<= '0';
							CLOCK_MEM	<= CLOCK_DEC;
							DELAY			<= '1';	
						end if;						
					when "00000101" =>		-- 5
						
						if(W='1' and F='1' and M='1') then
							ADDR_CACHE(7 downto 1)	<= ADDR_DEC(7 downto 1);
							ADDR_CACHE(0)	<= not(ADDR_DEC(0));
							WRITE_CACHE		<= '1';
							CLOCK_CACHE		<= CLOCK_DEC;
							IN_CACHE		<= DATA_MEM;
							DELAY			<= '1';	
							ACLR			<= '0';	
							CLOCK_COUNTER	<= CLOCK_DEC;							
						end if;			
						if(W='0' and M='1' and F='0') then		
							DELAY			<= '0';
							CLOCK_CACHE		<= '0';
							CLOCK_COUNTER	<= '0';
							CLOCK_MEM		<= '0';
							ACLR			<= '1';	
							CLOCK_COUNTER	<= CLOCK_DEC;						
						end if;
						if(W='0' and M='1' and F='1') then
							ADDR_CACHE(7 downto 1)	<= ADDR_DEC(7 downto 1);
							ADDR_CACHE(0)	<= not(ADDR_DEC(0));
							IN_CACHE	<= DATA_MEM;
							WRITE_CACHE <= '1';
							CLOCK_CACHE	<= CLOCK_DEC;
							DELAY			<= '1';	
							ACLR			<= '0';	
							CLOCK_COUNTER	<= CLOCK_DEC;							
						end if;			
					when "00000110" =>		-- 6
						CLOCK_COUNTER	<= CLOCK_DEC;
						if(W='1') then
							DELAY			<= '0';
							CLOCK_CACHE		<= '0';
							CLOCK_MEM		<= '0';
							ACLR			<= '1';	
							DATA_MEM		<= "ZZZZZZZZ";
						else
							ADDR_MEM		<= ADDR_DEC;
							WRITE_MEM		<= '0';
							CLOCK_CACHE		<= '0';
							CLOCK_MEM		<= CLOCK_DEC;
						end if;					
					when "00000111" =>		-- 7
						CLOCK_COUNTER	<= CLOCK_DEC;
						ADDR_CACHE		<= ADDR_DEC;
						IN_CACHE		<= DATA_MEM;
						WRITE_CACHE		<= '1';
						CLOCK_CACHE			<= CLOCK_DEC;
						CLOCK_FLAG			<= CLOCK_DEC;					
					when "00001000" =>		-- 8
							CLOCK_COUNTER	<= CLOCK_DEC;
							DELAY			<= '0';
							CLOCK_CACHE		<= '0';
							CLOCK_MEM		<= '0';
							ACLR			<= '1';
							DATA_MEM		<= "ZZZZZZZZ";				
					when others => null;
				end case;
				--else
				--	CLOCK_COUNTER <= COUNTER_DEC_CHANGE;
			end if;	
        end process;
end CACHE_ARCH;