
State Machine - |project_top|mac_ip_0002:mac_ip_inst|altera_eth_tse_mac:i_tse_mac|altera_tse_top_w_fifo_10_100_1000:U_MAC_TOP|altera_tse_top_w_fifo:U_MAC|altera_tse_rx_min_ff:U_RXFF|state
Name state.LOC_STATE_FF_DATA_FLUSH_WAIT state.LOC_STATE_RST_DONE state.LOC_STATE_SHIFT_WAIT state.LOC_STATE_FF_FLUSH_WAIT state.LOC_STATE_FF_DATA_FLUSH state.LOC_STATE_END_FRM state.LOC_STATE_SHIFT state.LOC_STATE_WAIT state.LOC_STATE_DATA state.LOC_STATE_IDLE 
state.LOC_STATE_IDLE 0 0 0 0 0 0 0 0 0 0 
state.LOC_STATE_DATA 0 0 0 0 0 0 0 0 1 1 
state.LOC_STATE_WAIT 0 0 0 0 0 0 0 1 0 1 
state.LOC_STATE_SHIFT 0 0 0 0 0 0 1 0 0 1 
state.LOC_STATE_END_FRM 0 0 0 0 0 1 0 0 0 1 
state.LOC_STATE_FF_DATA_FLUSH 0 0 0 0 1 0 0 0 0 1 
state.LOC_STATE_FF_FLUSH_WAIT 0 0 0 1 0 0 0 0 0 1 
state.LOC_STATE_SHIFT_WAIT 0 0 1 0 0 0 0 0 0 1 
state.LOC_STATE_RST_DONE 0 1 0 0 0 0 0 0 0 1 
state.LOC_STATE_FF_DATA_FLUSH_WAIT 1 0 0 0 0 0 0 0 0 1 

State Machine - |project_top|mac_ip_0002:mac_ip_inst|altera_eth_tse_mac:i_tse_mac|altera_tse_top_w_fifo_10_100_1000:U_MAC_TOP|altera_tse_top_w_fifo:U_MAC|altera_tse_top_1geth:U_GETH|altera_tse_rx_stat_extract:U_RXSTAT|state
Name state.stm_typ_end_frm state.stm_typ_frm state.stm_typ_sfd state.stm_typ_idle 
state.stm_typ_idle 0 0 0 0 
state.stm_typ_sfd 0 0 1 1 
state.stm_typ_frm 0 1 0 1 
state.stm_typ_end_frm 1 0 0 1 

State Machine - |project_top|mac_ip_0002:mac_ip_inst|altera_eth_tse_mac:i_tse_mac|altera_tse_top_mdio:U_MDIO|altera_tse_mdio_cntl:U_CNTL|state
Name state.STM_TYP_HOST_RD_END state.STM_TYP_HOST_RD_REG_WAIT state.STM_TYP_HOST_RD_REG state.STM_TYP_HOST_RD_WAIT2 state.STM_TYP_HOST_RD_WAIT1 state.STM_TYP_HOST_RD_WAIT state.STM_TYP_HOST_RD_WR_ADDR state.STM_TYP_HOST_WR_END state.STM_TYP_HOST_WR_WAIT state.STM_TYP_HOST_WR_WAIT2 state.STM_TYP_HOST_WR_WAIT1 state.STM_TYP_HOST_WR_WR_DATA state.STM_TYP_HOST_WR_WR_ADDR state.STM_TYP_IDLE 
state.STM_TYP_IDLE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
state.STM_TYP_HOST_WR_WR_ADDR 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
state.STM_TYP_HOST_WR_WR_DATA 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
state.STM_TYP_HOST_WR_WAIT1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
state.STM_TYP_HOST_WR_WAIT2 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
state.STM_TYP_HOST_WR_WAIT 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
state.STM_TYP_HOST_WR_END 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_WR_ADDR 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_WAIT 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_WAIT1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_WAIT2 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_REG 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_REG_WAIT 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
state.STM_TYP_HOST_RD_END 1 0 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |project_top|mac_ip_0002:mac_ip_inst|altera_eth_tse_mac:i_tse_mac|altera_tse_mac_control:U_MAC_CONTROL|altera_tse_host_control:U_CTRL|state
Name state.STM_TYPE_STAT_READ state.STM_TYPE_WAIT_BUSY state.STM_TYPE_WAIT_CYCLE state.STM_TYPE_END_READ state.STM_TYPE_NEXT_CYCLE state.STM_TYPE_MDIO_WRITE state.STM_TYPE_MDIO_READ state.STM_TYPE_IDLE 
state.STM_TYPE_IDLE 0 0 0 0 0 0 0 0 
state.STM_TYPE_MDIO_READ 0 0 0 0 0 0 1 1 
state.STM_TYPE_MDIO_WRITE 0 0 0 0 0 1 0 1 
state.STM_TYPE_NEXT_CYCLE 0 0 0 0 1 0 0 1 
state.STM_TYPE_END_READ 0 0 0 1 0 0 0 1 
state.STM_TYPE_WAIT_CYCLE 0 0 1 0 0 0 0 1 
state.STM_TYPE_WAIT_BUSY 0 1 0 0 0 0 0 1 
state.STM_TYPE_STAT_READ 1 0 0 0 0 0 0 1 
