	ed_synth u0 (
		.emif_0_pll_ref_clk_clk          (_connected_to_emif_0_pll_ref_clk_clk_),          //   input,   width = 1, emif_0_pll_ref_clk.clk
		.emif_0_oct_oct_rzqin            (_connected_to_emif_0_oct_oct_rzqin_),            //   input,   width = 1,         emif_0_oct.oct_rzqin
		.emif_0_mem_mem_ck               (_connected_to_emif_0_mem_mem_ck_),               //  output,   width = 1,         emif_0_mem.mem_ck
		.emif_0_mem_mem_ck_n             (_connected_to_emif_0_mem_mem_ck_n_),             //  output,   width = 1,                   .mem_ck_n
		.emif_0_mem_mem_a                (_connected_to_emif_0_mem_mem_a_),                //  output,  width = 10,                   .mem_a
		.emif_0_mem_mem_cke              (_connected_to_emif_0_mem_mem_cke_),              //  output,   width = 1,                   .mem_cke
		.emif_0_mem_mem_cs_n             (_connected_to_emif_0_mem_mem_cs_n_),             //  output,   width = 1,                   .mem_cs_n
		.emif_0_mem_mem_odt              (_connected_to_emif_0_mem_mem_odt_),              //  output,   width = 1,                   .mem_odt
		.emif_0_mem_mem_dqs              (_connected_to_emif_0_mem_mem_dqs_),              //   inout,   width = 4,                   .mem_dqs
		.emif_0_mem_mem_dqs_n            (_connected_to_emif_0_mem_mem_dqs_n_),            //   inout,   width = 4,                   .mem_dqs_n
		.emif_0_mem_mem_dq               (_connected_to_emif_0_mem_mem_dq_),               //   inout,  width = 32,                   .mem_dq
		.emif_0_mem_mem_dm               (_connected_to_emif_0_mem_mem_dm_),               //  output,   width = 4,                   .mem_dm
		.emif_0_status_local_cal_success (_connected_to_emif_0_status_local_cal_success_), //  output,   width = 1,      emif_0_status.local_cal_success
		.emif_0_status_local_cal_fail    (_connected_to_emif_0_status_local_cal_fail_),    //  output,   width = 1,                   .local_cal_fail
		.global_reset_reset_n            (_connected_to_global_reset_reset_n_),            //   input,   width = 1,       global_reset.reset_n
		.emif_0_tg_0_traffic_gen_pass    (_connected_to_emif_0_tg_0_traffic_gen_pass_),    //  output,   width = 1,        emif_0_tg_0.traffic_gen_pass
		.emif_0_tg_0_traffic_gen_fail    (_connected_to_emif_0_tg_0_traffic_gen_fail_),    //  output,   width = 1,                   .traffic_gen_fail
		.emif_0_tg_0_traffic_gen_timeout (_connected_to_emif_0_tg_0_traffic_gen_timeout_)  //  output,   width = 1,                   .traffic_gen_timeout
	);

