# -------------------------------------------------------------------------- # # # Copyright (C) 2016 Intel Corporation. All rights reserved. # Your use of Intel Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Intel Program License # Subscription Agreement, the Intel Quartus Prime License Agreement, # the Intel MegaCore Function License Agreement, or other # applicable license agreement, including, without limitation, # that your use is for the sole purpose of programming logic # devices manufactured by Intel and sold by Intel or its # authorized distributors. Please refer to the applicable # agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus Prime # Version 17.0ir2.0 Build 116 12/14/2016 Patches 0.02ir2 SJ Pro Edition # Date created = 16:18:30 February 07, 2017 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # bist_top_lp1_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults_pro.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus Prime software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # # ------------------- # Global Assignments # ------------------- set_global_assignment -name FAMILY "Stratix 10" set_global_assignment -name DEVICE 1SG280LN2F43E2VG set_global_assignment -name TOP_LEVEL_ENTITY bist_top_lp1 set_global_assignment -name ORIGINAL_QUARTUS_VERSION "17.0IR2.0 SP0.02IR2" set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:18:30 FEBRUARY 07, 2017" set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Pro Edition" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100 set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 2 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF set_global_assignment -name ENABLE_OCT_DONE OFF set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "AVST X32" set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 1.8V set_global_assignment -name USE_CONFIGURATION_DEVICE OFF set_global_assignment -name ENABLE_ED_CRC_CHECK ON set_global_assignment -name USE_CONF_DONE SDM_IO16 set_global_assignment -name USE_INIT_DONE SDM_IO0 set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_100MHZ set_global_assignment -name DEVICE_INITIALIZATION_CLOCK OSC_CLK_1_125MHZ set_global_assignment -name MINIMUM_SEU_INTERVAL 0 set_global_assignment -name USE_PWRMGT_SCL SDM_IO14 set_global_assignment -name USE_PWRMGT_SDA SDM_IO11 set_global_assignment -name USE_PWRMGT_ALERT SDM_IO12 set_global_assignment -name VID_OPERATION_MODE "PMBUS SLAVE" set_global_assignment -name PWRMGT_DEVICE_ADDRESS_IN_PMBUS_SLAVE_MODE 01 set_global_assignment -name GENERATE_PR_RBF_FILE ON set_global_assignment -name NUM_PARALLEL_PROCESSORS 6 set_global_assignment -name SEED 1 set_instance_assignment -name PARTITION_COLOUR 4284932607 -to bist_top_lp1 -entity bist_top_lp1 # ---------------- # Pin Assignments # ---------------- # LEDs set_location_assignment PIN_AC28 -to led_user_red[0] set_location_assignment PIN_AD28 -to led_user_red[1] set_location_assignment PIN_AB28 -to led_user_grn[0] set_location_assignment PIN_AC27 -to led_user_grn[1] set_location_assignment PIN_AB30 -to led_qsfp[0] set_location_assignment PIN_Y29 -to led_qsfp[1] set_location_assignment PIN_Y28 -to led_qsfp[2] set_location_assignment PIN_W29 -to led_qsfp[3] set_instance_assignment -name USE_AS_3V_GPIO ON -to led_user_red[*] -entity bist_top_lp1 set_instance_assignment -name USE_AS_3V_GPIO ON -to led_user_grn[*] -entity bist_top_lp1 set_instance_assignment -name USE_AS_3V_GPIO ON -to led_qsfp[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "2.5 V" -to led_user_red[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "2.5 V" -to led_user_grn[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "2.5 V" -to led_qsfp[*] -entity bist_top_lp1 # Cooker set_location_assignment PIN_AA12 -to sreg_cook_out[0] set_location_assignment PIN_Y13 -to sreg_cook_out[1] set_location_assignment PIN_Y11 -to bram_cook_out[0] set_location_assignment PIN_Y7 -to bram_cook_out[1] set_location_assignment PIN_AA10 -to dsp_cook_out[0] set_location_assignment PIN_AB4 -to dsp_cook_out[1] set_instance_assignment -name IO_STANDARD "1.8 V" -to sreg_cook_out[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "1.8 V" -to bram_cook_out[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "1.8 V" -to dsp_cook_out[*] -entity bist_top_lp1 # 1PPS set_location_assignment PIN_W6 -to u1pps set_instance_assignment -name IO_STANDARD "1.8 V" -to u1pps -entity bist_top_lp1 # General Clocks set_location_assignment PIN_W5 -to config_clk set_instance_assignment -name IO_STANDARD "1.8 V" -to config_clk -entity bist_top_lp1 set_location_assignment PIN_AA4 -to usr_refclk set_location_assignment PIN_Y4 -to "usr_refclk(n)" set_instance_assignment -name IO_STANDARD LVDS -to usr_refclk -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to "usr_refclk(n)" -entity bist_top_lp1 set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to usr_refclk -entity bist_top_lp1 set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to config_clk -entity bist_top_lp1 set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to usr_refclk -entity bist_top_lp1 set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to u22|stratix10_clkctrl_0|clksel_inst|clkout -entity bist_top_lp1 # PCIe set_instance_assignment -name USE_AS_3V_GPIO ON -to pcie_perstn -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "2.5 V" -to pcie_perstn -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD HCSL -to pcie_refclk -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[15] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[14] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[13] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[12] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[11] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[10] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[9] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[8] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[7] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[6] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[5] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[4] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_rx[0] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[15] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[14] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[13] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[12] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[11] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[10] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[9] -entity bist_top_lp1 #set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[8] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[7] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[6] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[5] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[4] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to pcie_tx[0] -entity bist_top_lp1 set_location_assignment PIN_AA28 -to pcie_perstn set_location_assignment PIN_T34 -to pcie_refclk set_location_assignment PIN_T33 -to "pcie_refclk(n)" #set_location_assignment PIN_E36 -to pcie_rx[15] #set_location_assignment PIN_E35 -to "pcie_rx[15](n)" #set_location_assignment PIN_C36 -to pcie_rx[14] #set_location_assignment PIN_C35 -to "pcie_rx[14](n)" #set_location_assignment PIN_G36 -to pcie_rx[13] #set_location_assignment PIN_G35 -to "pcie_rx[13](n)" #set_location_assignment PIN_J36 -to pcie_rx[12] #set_location_assignment PIN_J35 -to "pcie_rx[12](n)" #set_location_assignment PIN_H38 -to pcie_rx[11] #set_location_assignment PIN_H37 -to "pcie_rx[11](n)" #set_location_assignment PIN_L36 -to pcie_rx[10] #set_location_assignment PIN_L35 -to "pcie_rx[10](n)" #set_location_assignment PIN_K38 -to pcie_rx[9] #set_location_assignment PIN_K37 -to "pcie_rx[9](n)" #set_location_assignment PIN_M38 -to pcie_rx[8] #set_location_assignment PIN_M37 -to "pcie_rx[8](n)" set_location_assignment PIN_N36 -to pcie_rx[7] set_location_assignment PIN_N35 -to "pcie_rx[7](n)" set_location_assignment PIN_P38 -to pcie_rx[6] set_location_assignment PIN_P37 -to "pcie_rx[6](n)" set_location_assignment PIN_R36 -to pcie_rx[5] set_location_assignment PIN_R35 -to "pcie_rx[5](n)" set_location_assignment PIN_T38 -to pcie_rx[4] set_location_assignment PIN_T37 -to "pcie_rx[4](n)" set_location_assignment PIN_V38 -to pcie_rx[3] set_location_assignment PIN_V37 -to "pcie_rx[3](n)" set_location_assignment PIN_U36 -to pcie_rx[2] set_location_assignment PIN_U35 -to "pcie_rx[2](n)" set_location_assignment PIN_Y38 -to pcie_rx[1] set_location_assignment PIN_Y37 -to "pcie_rx[1](n)" set_location_assignment PIN_W36 -to pcie_rx[0] set_location_assignment PIN_W35 -to "pcie_rx[0](n)" set_location_assignment PIN_AA40 -to pcie_tx[0] set_location_assignment PIN_AA39 -to "pcie_tx[0](n)" set_location_assignment PIN_Y42 -to pcie_tx[1] set_location_assignment PIN_Y41 -to "pcie_tx[1](n)" set_location_assignment PIN_W40 -to pcie_tx[2] set_location_assignment PIN_W39 -to "pcie_tx[2](n)" set_location_assignment PIN_V42 -to pcie_tx[3] set_location_assignment PIN_V41 -to "pcie_tx[3](n)" set_location_assignment PIN_U40 -to pcie_tx[4] set_location_assignment PIN_U39 -to "pcie_tx[4](n)" set_location_assignment PIN_T42 -to pcie_tx[5] set_location_assignment PIN_T41 -to "pcie_tx[5](n)" set_location_assignment PIN_R40 -to pcie_tx[6] set_location_assignment PIN_R39 -to "pcie_tx[6](n)" set_location_assignment PIN_P42 -to pcie_tx[7] set_location_assignment PIN_P41 -to "pcie_tx[7](n)" #set_location_assignment PIN_N40 -to pcie_tx[8] #set_location_assignment PIN_N39 -to "pcie_tx[8](n)" #set_location_assignment PIN_M42 -to pcie_tx[9] #set_location_assignment PIN_M41 -to "pcie_tx[9](n)" #set_location_assignment PIN_L40 -to pcie_tx[10] #set_location_assignment PIN_L39 -to "pcie_tx[10](n)" #set_location_assignment PIN_K42 -to pcie_tx[11] #set_location_assignment PIN_K41 -to "pcie_tx[11](n)" #set_location_assignment PIN_J40 -to pcie_tx[12] #set_location_assignment PIN_J39 -to "pcie_tx[12](n)" #set_location_assignment PIN_H42 -to pcie_tx[13] #set_location_assignment PIN_H41 -to "pcie_tx[13](n)" #set_location_assignment PIN_G40 -to pcie_tx[14] #set_location_assignment PIN_G39 -to "pcie_tx[14](n)" #set_location_assignment PIN_F42 -to pcie_tx[15] #set_location_assignment PIN_F41 -to "pcie_tx[15](n)" set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[4](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[4] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[5](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[5] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[6](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[6] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[7](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[7] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[8](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[8] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[9](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[9] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[10](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[10] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[11](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[11] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[12](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[12] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[13](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[13] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[14](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[14] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[15](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_tx[15] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[4](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[4] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[5](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[5] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[6](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[6] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[7](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[7] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[8](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[8] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[9](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[9] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[10](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[10] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[11](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[11] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[12](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[12] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[13](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[13] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[14](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[14] -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[15](n)" -entity bist_top_lp1 #set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to pcie_rx[15] -entity bist_top_lp1 set_instance_assignment -name PARTITION_COLOUR 4286447598 -to auto_fab_0 -entity bist_top_lp1 # System Manager Interface set_location_assignment PIN_AT9 -to conf_d[0] set_location_assignment PIN_AT10 -to conf_d[1] set_location_assignment PIN_AP13 -to conf_d[2] set_location_assignment PIN_AR13 -to conf_d[3] set_location_assignment PIN_AT7 -to conf_d[4] set_location_assignment PIN_AU7 -to conf_d[5] set_location_assignment PIN_AR11 -to conf_d[6] set_location_assignment PIN_AT11 -to conf_d[7] set_location_assignment PIN_AU9 -to conf_d[8] set_location_assignment PIN_AU8 -to conf_d[9] set_location_assignment PIN_AT12 -to conf_d[10] set_location_assignment PIN_AR12 -to conf_d[11] set_location_assignment PIN_AU5 -to conf_d[12] set_location_assignment PIN_AU4 -to conf_d[13] set_location_assignment PIN_AV1 -to conf_d[14] set_location_assignment PIN_AW1 -to conf_d[15] set_location_assignment PIN_AU2 -to conf_c_out[0] set_location_assignment PIN_AV2 -to conf_c_out[1] set_location_assignment PIN_AV5 -to conf_c_in[0] set_location_assignment PIN_AV6 -to conf_c_in[1] set_location_assignment PIN_AV7 -to conf_c_in[2] set_location_assignment PIN_AV8 -to conf_c_out[2] set_location_assignment PIN_AW3 -to conf_c_in[3] set_location_assignment PIN_AW4 -to conf_c_in[4] set_location_assignment PIN_AW6 -to conf_c_out[3] set_location_assignment PIN_AW5 -to conf_c_in[5] set_location_assignment PIN_AY3 -to conf_c_in[6] set_location_assignment PIN_AY4 -to conf_c_in[7] set_location_assignment PIN_BB4 -to conf_c_in[8] set_location_assignment PIN_BA4 -to conf_c_in[9] set_location_assignment PIN_AY2 -to conf_c_in[10] set_location_assignment PIN_BA2 -to conf_c_in[11] set_location_assignment PIN_AA1 -to soft_recfg_req_n set_instance_assignment -name IO_STANDARD "1.8 V" -to conf_c_in[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "1.8 V" -to conf_c_out[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "1.8 V" -to conf_d[*] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "1.8 V" -to soft_recfg_req_n -entity bist_top_lp1 # DDR4 SDRAM #0 set_location_assignment PIN_AY19 -to mem0_refclk set_location_assignment PIN_AW19 -to "mem0_refclk(n)" set_instance_assignment -name IO_STANDARD LVDS -to mem0_refclk -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to "mem0_refclk(n)" -entity bist_top_lp1 set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to mem0_refclk -entity bist_top_lp1 set_location_assignment PIN_AT31 -to mem0_dq[0] set_location_assignment PIN_AP30 -to mem0_dq[1] set_location_assignment PIN_AT30 -to mem0_dq[2] set_location_assignment PIN_AN30 -to mem0_dq[3] set_location_assignment PIN_AR28 -to mem0_dq[4] set_location_assignment PIN_AM30 -to mem0_dq[5] set_location_assignment PIN_AP28 -to mem0_dq[6] set_location_assignment PIN_AL30 -to mem0_dq[7] set_location_assignment PIN_AP26 -to mem0_dq[8] set_location_assignment PIN_AK29 -to mem0_dq[9] set_location_assignment PIN_AN27 -to mem0_dq[10] set_location_assignment PIN_AN28 -to mem0_dq[11] set_location_assignment PIN_AM28 -to mem0_dq[12] set_location_assignment PIN_AK30 -to mem0_dq[13] set_location_assignment PIN_AM27 -to mem0_dq[14] set_location_assignment PIN_AL27 -to mem0_dq[15] set_location_assignment PIN_AV26 -to mem0_dq[16] set_location_assignment PIN_BA27 -to mem0_dq[17] set_location_assignment PIN_BB27 -to mem0_dq[18] set_location_assignment PIN_AY27 -to mem0_dq[19] set_location_assignment PIN_BA26 -to mem0_dq[20] set_location_assignment PIN_AW26 -to mem0_dq[21] set_location_assignment PIN_AY26 -to mem0_dq[22] set_location_assignment PIN_AV27 -to mem0_dq[23] set_location_assignment PIN_AV25 -to mem0_dq[24] set_location_assignment PIN_AU24 -to mem0_dq[25] set_location_assignment PIN_AW25 -to mem0_dq[26] set_location_assignment PIN_AT24 -to mem0_dq[27] set_location_assignment PIN_AW24 -to mem0_dq[28] set_location_assignment PIN_AT26 -to mem0_dq[29] set_location_assignment PIN_AY24 -to mem0_dq[30] set_location_assignment PIN_AR27 -to mem0_dq[31] set_location_assignment PIN_AJ19 -to mem0_dq[32] set_location_assignment PIN_AK18 -to mem0_dq[33] set_location_assignment PIN_AM17 -to mem0_dq[34] set_location_assignment PIN_AM19 -to mem0_dq[35] set_location_assignment PIN_AN17 -to mem0_dq[36] set_location_assignment PIN_AL19 -to mem0_dq[37] set_location_assignment PIN_AK19 -to mem0_dq[38] set_location_assignment PIN_AM20 -to mem0_dq[39] set_location_assignment PIN_AL20 -to mem0_dq[40] set_location_assignment PIN_AH24 -to mem0_dq[41] set_location_assignment PIN_AL22 -to mem0_dq[42] set_location_assignment PIN_AJ24 -to mem0_dq[43] set_location_assignment PIN_AL21 -to mem0_dq[44] set_location_assignment PIN_AK24 -to mem0_dq[45] set_location_assignment PIN_AJ23 -to mem0_dq[46] set_location_assignment PIN_AK23 -to mem0_dq[47] set_location_assignment PIN_AP18 -to mem0_dq[48] set_location_assignment PIN_AP19 -to mem0_dq[49] set_location_assignment PIN_AR16 -to mem0_dq[50] set_location_assignment PIN_AR18 -to mem0_dq[51] set_location_assignment PIN_AT16 -to mem0_dq[52] set_location_assignment PIN_AT19 -to mem0_dq[53] set_location_assignment PIN_AR17 -to mem0_dq[54] set_location_assignment PIN_AR19 -to mem0_dq[55] set_location_assignment PIN_AY16 -to mem0_dq[56] set_location_assignment PIN_AU18 -to mem0_dq[57] set_location_assignment PIN_AV17 -to mem0_dq[58] set_location_assignment PIN_AY18 -to mem0_dq[59] set_location_assignment PIN_AW16 -to mem0_dq[60] set_location_assignment PIN_AW18 -to mem0_dq[61] set_location_assignment PIN_AV16 -to mem0_dq[62] set_location_assignment PIN_AV18 -to mem0_dq[63] set_location_assignment PIN_AT20 -to mem0_dq[64] set_location_assignment PIN_AP21 -to mem0_dq[65] set_location_assignment PIN_AR21 -to mem0_dq[66] set_location_assignment PIN_AT21 -to mem0_dq[67] set_location_assignment PIN_AM22 -to mem0_dq[68] set_location_assignment PIN_AM23 -to mem0_dq[69] set_location_assignment PIN_AN21 -to mem0_dq[70] set_location_assignment PIN_AN22 -to mem0_dq[71] set_location_assignment PIN_AV21 -to mem0_a[16] set_location_assignment PIN_AW21 -to mem0_a[15] set_location_assignment PIN_BA19 -to mem0_a[14] set_location_assignment PIN_BB19 -to mem0_a[13] set_location_assignment PIN_AY21 -to mem0_a[12] set_location_assignment PIN_AR24 -to mem0_a[11] set_location_assignment PIN_AR23 -to mem0_a[10] set_location_assignment PIN_AN23 -to mem0_a[9] set_location_assignment PIN_AP23 -to mem0_a[8] set_location_assignment PIN_AL25 -to mem0_a[7] set_location_assignment PIN_AL26 -to mem0_a[6] set_location_assignment PIN_AM24 -to mem0_a[5] set_location_assignment PIN_AL24 -to mem0_a[4] set_location_assignment PIN_AP25 -to mem0_a[3] set_location_assignment PIN_AP24 -to mem0_a[2] set_location_assignment PIN_AN25 -to mem0_a[1] set_location_assignment PIN_AM25 -to mem0_a[0] set_location_assignment PIN_AW23 -to mem0_par set_location_assignment PIN_AY22 -to mem0_reset_n set_location_assignment PIN_BB23 -to mem0_odt set_location_assignment PIN_BA21 -to mem0_oct_rzqin set_location_assignment PIN_AU19 -to mem0_dqs[8] set_location_assignment PIN_BB18 -to mem0_dqs[7] set_location_assignment PIN_AM18 -to mem0_dqs[6] set_location_assignment PIN_AK22 -to mem0_dqs[5] set_location_assignment PIN_AH18 -to mem0_dqs[4] set_location_assignment PIN_AT27 -to mem0_dqs[3] set_location_assignment PIN_BB25 -to mem0_dqs[2] set_location_assignment PIN_AK28 -to mem0_dqs[1] set_location_assignment PIN_AP29 -to mem0_dqs[0] set_location_assignment PIN_AU20 -to mem0_dqs_n[8] set_location_assignment PIN_BB17 -to mem0_dqs_n[7] set_location_assignment PIN_AN18 -to mem0_dqs_n[6] set_location_assignment PIN_AK21 -to mem0_dqs_n[5] set_location_assignment PIN_AJ18 -to mem0_dqs_n[4] set_location_assignment PIN_AU27 -to mem0_dqs_n[3] set_location_assignment PIN_BA25 -to mem0_dqs_n[2] set_location_assignment PIN_AK27 -to mem0_dqs_n[1] set_location_assignment PIN_AR30 -to mem0_dqs_n[0] set_location_assignment PIN_AU22 -to mem0_ck set_location_assignment PIN_AV22 -to mem0_ck_n set_location_assignment PIN_AV23 -to mem0_cke set_location_assignment PIN_AT22 -to mem0_cs_n set_location_assignment PIN_AR22 -to mem0_act_n set_location_assignment PIN_AR29 -to mem0_alert_n set_location_assignment PIN_AW20 -to mem0_ba[1] set_location_assignment PIN_BA20 -to mem0_ba[0] set_location_assignment PIN_BA22 -to mem0_bg[1] set_location_assignment PIN_AV20 -to mem0_bg[0] # set_location_assignment PIN_AU23 -to mem0_c[1] # set_location_assignment PIN_BB22 -to mem0_c[0] set_location_assignment PIN_AP20 -to mem0_dbi_n[8] set_location_assignment PIN_BA17 -to mem0_dbi_n[7] set_location_assignment PIN_AT17 -to mem0_dbi_n[6] set_location_assignment PIN_AJ25 -to mem0_dbi_n[5] set_location_assignment PIN_AK17 -to mem0_dbi_n[4] set_location_assignment PIN_AU25 -to mem0_dbi_n[3] set_location_assignment PIN_BA24 -to mem0_dbi_n[2] set_location_assignment PIN_AL29 -to mem0_dbi_n[1] set_location_assignment PIN_AT29 -to mem0_dbi_n[0] # DDR4 SDRAM #1 set_location_assignment PIN_AH6 -to mem1_refclk set_location_assignment PIN_AH7 -to "mem1_refclk(n)" set_instance_assignment -name IO_STANDARD LVDS -to mem1_refclk -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to "mem1_refclk(n)" -entity bist_top_lp1 set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to mem1_refclk -entity bist_top_lp1 set_location_assignment PIN_AM12 -to mem1_dq[0] set_location_assignment PIN_AM10 -to mem1_dq[1] set_location_assignment PIN_AM8 -to mem1_dq[2] set_location_assignment PIN_AN6 -to mem1_dq[3] set_location_assignment PIN_AM13 -to mem1_dq[4] set_location_assignment PIN_AN7 -to mem1_dq[5] set_location_assignment PIN_AM7 -to mem1_dq[6] set_location_assignment PIN_AM9 -to mem1_dq[7] set_location_assignment PIN_AM4 -to mem1_dq[8] set_location_assignment PIN_AM2 -to mem1_dq[9] set_location_assignment PIN_AL4 -to mem1_dq[10] set_location_assignment PIN_AM3 -to mem1_dq[11] set_location_assignment PIN_AL2 -to mem1_dq[12] set_location_assignment PIN_AN2 -to mem1_dq[13] set_location_assignment PIN_AL1 -to mem1_dq[14] set_location_assignment PIN_AN3 -to mem1_dq[15] set_location_assignment PIN_AP4 -to mem1_dq[16] set_location_assignment PIN_AR2 -to mem1_dq[17] set_location_assignment PIN_AN1 -to mem1_dq[18] set_location_assignment PIN_AT1 -to mem1_dq[19] set_location_assignment PIN_AP3 -to mem1_dq[20] set_location_assignment PIN_AT2 -to mem1_dq[21] set_location_assignment PIN_AP1 -to mem1_dq[22] set_location_assignment PIN_AR1 -to mem1_dq[23] set_location_assignment PIN_AP5 -to mem1_dq[24] set_location_assignment PIN_AR8 -to mem1_dq[25] set_location_assignment PIN_AP6 -to mem1_dq[26] set_location_assignment PIN_AP10 -to mem1_dq[27] set_location_assignment PIN_AR6 -to mem1_dq[28] set_location_assignment PIN_AP11 -to mem1_dq[29] set_location_assignment PIN_AT6 -to mem1_dq[30] set_location_assignment PIN_AR7 -to mem1_dq[31] set_location_assignment PIN_AB13 -to mem1_dq[32] set_location_assignment PIN_AB9 -to mem1_dq[33] set_location_assignment PIN_AB12 -to mem1_dq[34] set_location_assignment PIN_AC10 -to mem1_dq[35] set_location_assignment PIN_AB10 -to mem1_dq[36] set_location_assignment PIN_AC11 -to mem1_dq[37] set_location_assignment PIN_AB7 -to mem1_dq[38] set_location_assignment PIN_AB8 -to mem1_dq[39] set_location_assignment PIN_AB5 -to mem1_dq[40] set_location_assignment PIN_AC6 -to mem1_dq[41] set_location_assignment PIN_AC3 -to mem1_dq[42] set_location_assignment PIN_AC5 -to mem1_dq[43] set_location_assignment PIN_AC2 -to mem1_dq[44] set_location_assignment PIN_AD5 -to mem1_dq[45] set_location_assignment PIN_AD4 -to mem1_dq[46] set_location_assignment PIN_AD3 -to mem1_dq[47] set_location_assignment PIN_AE4 -to mem1_dq[48] set_location_assignment PIN_AD1 -to mem1_dq[49] set_location_assignment PIN_AE2 -to mem1_dq[50] set_location_assignment PIN_AD6 -to mem1_dq[51] set_location_assignment PIN_AE3 -to mem1_dq[52] set_location_assignment PIN_AC1 -to mem1_dq[53] set_location_assignment PIN_AE1 -to mem1_dq[54] set_location_assignment PIN_AE6 -to mem1_dq[55] set_location_assignment PIN_AE9 -to mem1_dq[56] set_location_assignment PIN_AF12 -to mem1_dq[57] set_location_assignment PIN_AG9 -to mem1_dq[58] set_location_assignment PIN_AF11 -to mem1_dq[59] set_location_assignment PIN_AE8 -to mem1_dq[60] set_location_assignment PIN_AG10 -to mem1_dq[61] set_location_assignment PIN_AF9 -to mem1_dq[62] set_location_assignment PIN_AF10 -to mem1_dq[63] set_location_assignment PIN_AG8 -to mem1_dq[64] set_location_assignment PIN_AH12 -to mem1_dq[65] set_location_assignment PIN_AH8 -to mem1_dq[66] set_location_assignment PIN_AJ10 -to mem1_dq[67] set_location_assignment PIN_AG7 -to mem1_dq[68] set_location_assignment PIN_AH11 -to mem1_dq[69] set_location_assignment PIN_AJ8 -to mem1_dq[70] set_location_assignment PIN_AJ9 -to mem1_dq[71] set_location_assignment PIN_AG2 -to mem1_a[16] set_location_assignment PIN_AH2 -to mem1_a[15] set_location_assignment PIN_AG5 -to mem1_a[14] set_location_assignment PIN_AH5 -to mem1_a[13] set_location_assignment PIN_AG3 -to mem1_a[12] set_location_assignment PIN_AJ4 -to mem1_a[11] set_location_assignment PIN_AJ3 -to mem1_a[10] set_location_assignment PIN_AJ5 -to mem1_a[9] set_location_assignment PIN_AJ6 -to mem1_a[8] set_location_assignment PIN_AH1 -to mem1_a[7] set_location_assignment PIN_AJ1 -to mem1_a[6] set_location_assignment PIN_AK7 -to mem1_a[5] set_location_assignment PIN_AK6 -to mem1_a[4] set_location_assignment PIN_AK1 -to mem1_a[3] set_location_assignment PIN_AK2 -to mem1_a[2] set_location_assignment PIN_AK4 -to mem1_a[1] set_location_assignment PIN_AK3 -to mem1_a[0] set_location_assignment PIN_AK9 -to mem1_par set_location_assignment PIN_AK14 -to mem1_reset_n set_location_assignment PIN_AL11 -to mem1_odt set_location_assignment PIN_AH3 -to mem1_oct_rzqin set_location_assignment PIN_AH10 -to mem1_dqs[8] set_location_assignment PIN_AE12 -to mem1_dqs[7] set_location_assignment PIN_AE7 -to mem1_dqs[6] set_location_assignment PIN_AC7 -to mem1_dqs[5] set_location_assignment PIN_AC12 -to mem1_dqs[4] set_location_assignment PIN_AP8 -to mem1_dqs[3] set_location_assignment PIN_AR3 -to mem1_dqs[2] set_location_assignment PIN_AN5 -to mem1_dqs[1] set_location_assignment PIN_AN10 -to mem1_dqs[0] set_location_assignment PIN_AJ11 -to mem1_dqs_n[8] set_location_assignment PIN_AE11 -to mem1_dqs_n[7] set_location_assignment PIN_AF7 -to mem1_dqs_n[6] set_location_assignment PIN_AC8 -to mem1_dqs_n[5] set_location_assignment PIN_AC13 -to mem1_dqs_n[4] set_location_assignment PIN_AN8 -to mem1_dqs_n[3] set_location_assignment PIN_AR4 -to mem1_dqs_n[2] set_location_assignment PIN_AM5 -to mem1_dqs_n[1] set_location_assignment PIN_AN11 -to mem1_dqs_n[0] set_location_assignment PIN_AK12 -to mem1_ck set_location_assignment PIN_AK13 -to mem1_ck_n set_location_assignment PIN_AL7 -to mem1_cke set_location_assignment PIN_AL12 -to mem1_cs_n set_location_assignment PIN_AK11 -to mem1_act_n set_location_assignment PIN_AN12 -to mem1_alert_n set_location_assignment PIN_AF1 -to mem1_ba[1] set_location_assignment PIN_AF4 -to mem1_ba[0] set_location_assignment PIN_AL14 -to mem1_bg[1] set_location_assignment PIN_AF2 -to mem1_bg[0] # set_location_assignment PIN_AK8 -to mem1_c[1] # set_location_assignment PIN_AL10 -to mem1_c[0] set_location_assignment PIN_AH13 -to mem1_dbi_n[8] set_location_assignment PIN_AG12 -to mem1_dbi_n[7] set_location_assignment PIN_AF6 -to mem1_dbi_n[6] set_location_assignment PIN_AD9 -to mem1_dbi_n[5] set_location_assignment PIN_AD10 -to mem1_dbi_n[4] set_location_assignment PIN_AP9 -to mem1_dbi_n[3] set_location_assignment PIN_AT5 -to mem1_dbi_n[2] set_location_assignment PIN_AL6 -to mem1_dbi_n[1] set_location_assignment PIN_AN13 -to mem1_dbi_n[0] # DDR4 SDRAM #2 set_location_assignment PIN_K8 -to mem2_refclk set_location_assignment PIN_K7 -to "mem2_refclk(n)" set_instance_assignment -name IO_STANDARD LVDS -to mem2_refclk -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to "mem2_refclk(n)" -entity bist_top_lp1 set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to mem2_refclk -entity bist_top_lp1 set_location_assignment PIN_M2 -to mem2_dq[0] set_location_assignment PIN_R1 -to mem2_dq[1] set_location_assignment PIN_R4 -to mem2_dq[2] set_location_assignment PIN_R2 -to mem2_dq[3] set_location_assignment PIN_R3 -to mem2_dq[4] set_location_assignment PIN_T1 -to mem2_dq[5] set_location_assignment PIN_T2 -to mem2_dq[6] set_location_assignment PIN_N2 -to mem2_dq[7] set_location_assignment PIN_P11 -to mem2_dq[8] set_location_assignment PIN_R13 -to mem2_dq[9] set_location_assignment PIN_R11 -to mem2_dq[10] set_location_assignment PIN_T12 -to mem2_dq[11] set_location_assignment PIN_N11 -to mem2_dq[12] set_location_assignment PIN_R14 -to mem2_dq[13] set_location_assignment PIN_N12 -to mem2_dq[14] set_location_assignment PIN_R12 -to mem2_dq[15] set_location_assignment PIN_R7 -to mem2_dq[16] set_location_assignment PIN_T5 -to mem2_dq[17] set_location_assignment PIN_T4 -to mem2_dq[18] set_location_assignment PIN_U4 -to mem2_dq[19] set_location_assignment PIN_R8 -to mem2_dq[20] set_location_assignment PIN_U5 -to mem2_dq[21] set_location_assignment PIN_U2 -to mem2_dq[22] set_location_assignment PIN_U3 -to mem2_dq[23] set_location_assignment PIN_P4 -to mem2_dq[24] set_location_assignment PIN_N8 -to mem2_dq[25] set_location_assignment PIN_P5 -to mem2_dq[26] set_location_assignment PIN_N6 -to mem2_dq[27] set_location_assignment PIN_P6 -to mem2_dq[28] set_location_assignment PIN_N7 -to mem2_dq[29] set_location_assignment PIN_R6 -to mem2_dq[30] set_location_assignment PIN_N5 -to mem2_dq[31] set_location_assignment PIN_C6 -to mem2_dq[32] set_location_assignment PIN_A5 -to mem2_dq[33] set_location_assignment PIN_A7 -to mem2_dq[34] set_location_assignment PIN_A6 -to mem2_dq[35] set_location_assignment PIN_D6 -to mem2_dq[36] set_location_assignment PIN_B5 -to mem2_dq[37] set_location_assignment PIN_E8 -to mem2_dq[38] set_location_assignment PIN_E9 -to mem2_dq[39] set_location_assignment PIN_F9 -to mem2_dq[40] set_location_assignment PIN_F10 -to mem2_dq[41] set_location_assignment PIN_H11 -to mem2_dq[42] set_location_assignment PIN_J11 -to mem2_dq[43] set_location_assignment PIN_H12 -to mem2_dq[44] set_location_assignment PIN_J10 -to mem2_dq[45] set_location_assignment PIN_H13 -to mem2_dq[46] set_location_assignment PIN_J13 -to mem2_dq[47] set_location_assignment PIN_D1 -to mem2_dq[48] set_location_assignment PIN_E1 -to mem2_dq[49] set_location_assignment PIN_C3 -to mem2_dq[50] set_location_assignment PIN_B3 -to mem2_dq[51] set_location_assignment PIN_C2 -to mem2_dq[52] set_location_assignment PIN_A4 -to mem2_dq[53] set_location_assignment PIN_B2 -to mem2_dq[54] set_location_assignment PIN_B4 -to mem2_dq[55] set_location_assignment PIN_E2 -to mem2_dq[56] set_location_assignment PIN_J8 -to mem2_dq[57] set_location_assignment PIN_E3 -to mem2_dq[58] set_location_assignment PIN_H7 -to mem2_dq[59] set_location_assignment PIN_G7 -to mem2_dq[60] set_location_assignment PIN_J9 -to mem2_dq[61] set_location_assignment PIN_F7 -to mem2_dq[62] set_location_assignment PIN_H8 -to mem2_dq[63] set_location_assignment PIN_K11 -to mem2_dq[64] set_location_assignment PIN_M13 -to mem2_dq[65] set_location_assignment PIN_K9 -to mem2_dq[66] set_location_assignment PIN_L11 -to mem2_dq[67] set_location_assignment PIN_K12 -to mem2_dq[68] set_location_assignment PIN_M14 -to mem2_dq[69] set_location_assignment PIN_L9 -to mem2_dq[70] set_location_assignment PIN_L10 -to mem2_dq[71] set_location_assignment PIN_G3 -to mem2_a[16] set_location_assignment PIN_H3 -to mem2_a[15] set_location_assignment PIN_J6 -to mem2_a[14] set_location_assignment PIN_K6 -to mem2_a[13] set_location_assignment PIN_J4 -to mem2_a[12] set_location_assignment PIN_J3 -to mem2_a[11] set_location_assignment PIN_K3 -to mem2_a[10] set_location_assignment PIN_H2 -to mem2_a[9] set_location_assignment PIN_G2 -to mem2_a[8] set_location_assignment PIN_K1 -to mem2_a[7] set_location_assignment PIN_L1 -to mem2_a[6] set_location_assignment PIN_F1 -to mem2_a[5] set_location_assignment PIN_F2 -to mem2_a[4] set_location_assignment PIN_K2 -to mem2_a[3] set_location_assignment PIN_L2 -to mem2_a[2] set_location_assignment PIN_J1 -to mem2_a[1] set_location_assignment PIN_H1 -to mem2_a[0] set_location_assignment PIN_K4 -to mem2_par set_location_assignment PIN_M9 -to mem2_reset_n set_location_assignment PIN_M8 -to mem2_odt set_location_assignment PIN_J5 -to mem2_oct_rzqin set_location_assignment PIN_M12 -to mem2_dqs[8] set_location_assignment PIN_F4 -to mem2_dqs[7] set_location_assignment PIN_C5 -to mem2_dqs[6] set_location_assignment PIN_G8 -to mem2_dqs[5] set_location_assignment PIN_C7 -to mem2_dqs[4] set_location_assignment PIN_P9 -to mem2_dqs[3] set_location_assignment PIN_T6 -to mem2_dqs[2] set_location_assignment PIN_P13 -to mem2_dqs[1] set_location_assignment PIN_P1 -to mem2_dqs[0] set_location_assignment PIN_L12 -to mem2_dqs_n[8] set_location_assignment PIN_E4 -to mem2_dqs_n[7] set_location_assignment PIN_D5 -to mem2_dqs_n[6] set_location_assignment PIN_G9 -to mem2_dqs_n[5] set_location_assignment PIN_B7 -to mem2_dqs_n[4] set_location_assignment PIN_P8 -to mem2_dqs_n[3] set_location_assignment PIN_T7 -to mem2_dqs_n[2] set_location_assignment PIN_N13 -to mem2_dqs_n[1] set_location_assignment PIN_N1 -to mem2_dqs_n[0] set_location_assignment PIN_L6 -to mem2_ck set_location_assignment PIN_L7 -to mem2_ck_n set_location_assignment PIN_M4 -to mem2_cke set_location_assignment PIN_M5 -to mem2_cs_n set_location_assignment PIN_L5 -to mem2_act_n set_location_assignment PIN_N3 -to mem2_alert_n set_location_assignment PIN_G4 -to mem2_ba[1] set_location_assignment PIN_H6 -to mem2_ba[0] set_location_assignment PIN_M10 -to mem2_bg[1] set_location_assignment PIN_G5 -to mem2_bg[0] # set_location_assignment PIN_M3 -to mem2_c[1] # set_location_assignment PIN_M7 -to mem2_c[0] set_location_assignment PIN_K13 -to mem2_dbi_n[8] set_location_assignment PIN_F6 -to mem2_dbi_n[7] set_location_assignment PIN_D4 -to mem2_dbi_n[6] set_location_assignment PIN_G10 -to mem2_dbi_n[5] set_location_assignment PIN_E7 -to mem2_dbi_n[4] set_location_assignment PIN_N10 -to mem2_dbi_n[3] set_location_assignment PIN_T9 -to mem2_dbi_n[2] set_location_assignment PIN_T11 -to mem2_dbi_n[1] set_location_assignment PIN_P3 -to mem2_dbi_n[0] # DDR4 SDRAM #3 set_location_assignment PIN_D27 -to mem3_refclk set_location_assignment PIN_E27 -to "mem3_refclk(n)" set_instance_assignment -name IO_STANDARD LVDS -to mem3_refclk -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to "mem3_refclk(n)" -entity bist_top_lp1 set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to mem3_refclk -entity bist_top_lp1 set_location_assignment PIN_G17 -to mem3_dq[0] set_location_assignment PIN_H16 -to mem3_dq[1] set_location_assignment PIN_F17 -to mem3_dq[2] set_location_assignment PIN_L17 -to mem3_dq[3] set_location_assignment PIN_H17 -to mem3_dq[4] set_location_assignment PIN_M18 -to mem3_dq[5] set_location_assignment PIN_K17 -to mem3_dq[6] set_location_assignment PIN_N18 -to mem3_dq[7] set_location_assignment PIN_L15 -to mem3_dq[8] set_location_assignment PIN_P16 -to mem3_dq[9] set_location_assignment PIN_L16 -to mem3_dq[10] set_location_assignment PIN_N16 -to mem3_dq[11] set_location_assignment PIN_K16 -to mem3_dq[12] set_location_assignment PIN_N15 -to mem3_dq[13] set_location_assignment PIN_J16 -to mem3_dq[14] set_location_assignment PIN_M15 -to mem3_dq[15] set_location_assignment PIN_F15 -to mem3_dq[16] set_location_assignment PIN_G14 -to mem3_dq[17] set_location_assignment PIN_D14 -to mem3_dq[18] set_location_assignment PIN_G13 -to mem3_dq[19] set_location_assignment PIN_D15 -to mem3_dq[20] set_location_assignment PIN_H15 -to mem3_dq[21] set_location_assignment PIN_G15 -to mem3_dq[22] set_location_assignment PIN_J15 -to mem3_dq[23] set_location_assignment PIN_E12 -to mem3_dq[24] set_location_assignment PIN_C10 -to mem3_dq[25] set_location_assignment PIN_C11 -to mem3_dq[26] set_location_assignment PIN_D11 -to mem3_dq[27] set_location_assignment PIN_F12 -to mem3_dq[28] set_location_assignment PIN_F11 -to mem3_dq[29] set_location_assignment PIN_E11 -to mem3_dq[30] set_location_assignment PIN_G12 -to mem3_dq[31] set_location_assignment PIN_H22 -to mem3_dq[32] set_location_assignment PIN_G22 -to mem3_dq[33] set_location_assignment PIN_E22 -to mem3_dq[34] set_location_assignment PIN_E21 -to mem3_dq[35] set_location_assignment PIN_J21 -to mem3_dq[36] set_location_assignment PIN_F21 -to mem3_dq[37] set_location_assignment PIN_F22 -to mem3_dq[38] set_location_assignment PIN_H21 -to mem3_dq[39] set_location_assignment PIN_P24 -to mem3_dq[40] set_location_assignment PIN_M22 -to mem3_dq[41] set_location_assignment PIN_P23 -to mem3_dq[42] set_location_assignment PIN_K23 -to mem3_dq[43] set_location_assignment PIN_N22 -to mem3_dq[44] set_location_assignment PIN_L22 -to mem3_dq[45] set_location_assignment PIN_N23 -to mem3_dq[46] set_location_assignment PIN_K22 -to mem3_dq[47] set_location_assignment PIN_M25 -to mem3_dq[48] set_location_assignment PIN_J25 -to mem3_dq[49] set_location_assignment PIN_L25 -to mem3_dq[50] set_location_assignment PIN_J24 -to mem3_dq[51] set_location_assignment PIN_L24 -to mem3_dq[52] set_location_assignment PIN_G24 -to mem3_dq[53] set_location_assignment PIN_K24 -to mem3_dq[54] set_location_assignment PIN_G25 -to mem3_dq[55] set_location_assignment PIN_D23 -to mem3_dq[56] set_location_assignment PIN_E24 -to mem3_dq[57] set_location_assignment PIN_A22 -to mem3_dq[58] set_location_assignment PIN_E23 -to mem3_dq[59] set_location_assignment PIN_D24 -to mem3_dq[60] set_location_assignment PIN_G23 -to mem3_dq[61] set_location_assignment PIN_F24 -to mem3_dq[62] set_location_assignment PIN_A21 -to mem3_dq[63] set_location_assignment PIN_C26 -to mem3_dq[64] set_location_assignment PIN_C25 -to mem3_dq[65] set_location_assignment PIN_D26 -to mem3_dq[66] set_location_assignment PIN_D25 -to mem3_dq[67] set_location_assignment PIN_E26 -to mem3_dq[68] set_location_assignment PIN_F26 -to mem3_dq[69] set_location_assignment PIN_C27 -to mem3_dq[70] set_location_assignment PIN_F25 -to mem3_dq[71] set_location_assignment PIN_H30 -to mem3_a[16] set_location_assignment PIN_H31 -to mem3_a[15] set_location_assignment PIN_K28 -to mem3_a[14] set_location_assignment PIN_J28 -to mem3_a[13] set_location_assignment PIN_J29 -to mem3_a[12] set_location_assignment PIN_M27 -to mem3_a[11] set_location_assignment PIN_L27 -to mem3_a[10] set_location_assignment PIN_N27 -to mem3_a[9] set_location_assignment PIN_N26 -to mem3_a[8] set_location_assignment PIN_K27 -to mem3_a[7] set_location_assignment PIN_K26 -to mem3_a[6] set_location_assignment PIN_R27 -to mem3_a[5] set_location_assignment PIN_P28 -to mem3_a[4] set_location_assignment PIN_P26 -to mem3_a[3] set_location_assignment PIN_R26 -to mem3_a[2] set_location_assignment PIN_N28 -to mem3_a[1] set_location_assignment PIN_M28 -to mem3_a[0] set_location_assignment PIN_P29 -to mem3_par set_location_assignment PIN_P31 -to mem3_reset_n set_location_assignment PIN_K30 -to mem3_odt set_location_assignment PIN_J30 -to mem3_oct_rzqin set_location_assignment PIN_B24 -to mem3_dqs[8] set_location_assignment PIN_C23 -to mem3_dqs[7] set_location_assignment PIN_N25 -to mem3_dqs[6] set_location_assignment PIN_T23 -to mem3_dqs[5] set_location_assignment PIN_J23 -to mem3_dqs[4] set_location_assignment PIN_D8 -to mem3_dqs[3] set_location_assignment PIN_E14 -to mem3_dqs[2] set_location_assignment PIN_R17 -to mem3_dqs[1] set_location_assignment PIN_N17 -to mem3_dqs[0] set_location_assignment PIN_B25 -to mem3_dqs_n[8] set_location_assignment PIN_C22 -to mem3_dqs_n[7] set_location_assignment PIN_P25 -to mem3_dqs_n[6] set_location_assignment PIN_R24 -to mem3_dqs_n[5] set_location_assignment PIN_H23 -to mem3_dqs_n[4] set_location_assignment PIN_C8 -to mem3_dqs_n[3] set_location_assignment PIN_F14 -to mem3_dqs_n[2] set_location_assignment PIN_P18 -to mem3_dqs_n[1] set_location_assignment PIN_M17 -to mem3_dqs_n[0] set_location_assignment PIN_K31 -to mem3_ck set_location_assignment PIN_L30 -to mem3_ck_n set_location_assignment PIN_M30 -to mem3_cke set_location_assignment PIN_M29 -to mem3_cs_n set_location_assignment PIN_L29 -to mem3_act_n set_location_assignment PIN_F16 -to mem3_alert_n set_location_assignment PIN_G27 -to mem3_ba[1] set_location_assignment PIN_H27 -to mem3_ba[0] set_location_assignment PIN_N30 -to mem3_bg[1] set_location_assignment PIN_F27 -to mem3_bg[0] # set_location_assignment PIN_M31 -to mem3_c[1] # set_location_assignment PIN_K29 -to mem3_c[0] set_location_assignment PIN_A24 -to mem3_dbi_n[8] set_location_assignment PIN_B22 -to mem3_dbi_n[7] set_location_assignment PIN_H26 -to mem3_dbi_n[6] set_location_assignment PIN_M23 -to mem3_dbi_n[5] set_location_assignment PIN_D21 -to mem3_dbi_n[4] set_location_assignment PIN_D10 -to mem3_dbi_n[3] set_location_assignment PIN_E13 -to mem3_dbi_n[2] set_location_assignment PIN_P15 -to mem3_dbi_n[1] set_location_assignment PIN_E16 -to mem3_dbi_n[0] # XCVR set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_0[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_0[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_0[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_0[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_1[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_1[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_1[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_1[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_2[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_2[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_2[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_2[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_3[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_3[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_3[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data_3[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_0[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_0[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_0[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_0[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_1[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_1[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_1[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_1[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_2[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_2[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_2[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_2[0] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_3[3] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_3[2] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_3[1] -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_serial_data_3[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_0[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_0[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_0[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_0[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_0[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_0[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_0[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_0[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_1[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_1[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_1[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_1[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_1[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_1[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_1[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_1[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_2[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_2[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_2[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_2[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_2[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_2[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_2[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_2[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_3[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_3[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_3[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_3[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_3[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_3[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to rx_serial_data_3[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "rx_serial_data_3[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_0[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_0[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_0[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_0[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_0[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_0[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_0[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_0[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_1[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_1[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_1[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_1[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_1[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_1[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_1[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_1[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_2[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_2[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_2[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_2[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_2[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_2[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_2[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_2[0](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_3[3] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_3[3](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_3[2] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_3[2](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_3[1] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_3[1](n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to tx_serial_data_3[0] -entity bist_top_lp1 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "tx_serial_data_3[0](n)" -entity bist_top_lp1 set_location_assignment PIN_BA32 -to rx_serial_data_0[3] set_location_assignment PIN_BA31 -to "rx_serial_data_0[3](n)" set_location_assignment PIN_AW32 -to rx_serial_data_0[2] set_location_assignment PIN_AW31 -to "rx_serial_data_0[2](n)" set_location_assignment PIN_AY30 -to rx_serial_data_0[1] set_location_assignment PIN_AY29 -to "rx_serial_data_0[1](n)" set_location_assignment PIN_AV30 -to rx_serial_data_0[0] set_location_assignment PIN_AV29 -to "rx_serial_data_0[0](n)" set_location_assignment PIN_AT38 -to rx_serial_data_1[3] set_location_assignment PIN_AT37 -to "rx_serial_data_1[3](n)" set_location_assignment PIN_AN36 -to rx_serial_data_1[2] set_location_assignment PIN_AN35 -to "rx_serial_data_1[2](n)" set_location_assignment PIN_AW36 -to rx_serial_data_1[1] set_location_assignment PIN_AW35 -to "rx_serial_data_1[1](n)" set_location_assignment PIN_AU36 -to rx_serial_data_1[0] set_location_assignment PIN_AU35 -to "rx_serial_data_1[0](n)" set_location_assignment PIN_AH38 -to rx_serial_data_2[3] set_location_assignment PIN_AH37 -to "rx_serial_data_2[3](n)" set_location_assignment PIN_AJ36 -to rx_serial_data_2[2] set_location_assignment PIN_AJ35 -to "rx_serial_data_2[2](n)" set_location_assignment PIN_AM38 -to rx_serial_data_2[1] set_location_assignment PIN_AM37 -to "rx_serial_data_2[1](n)" set_location_assignment PIN_AL36 -to rx_serial_data_2[0] set_location_assignment PIN_AL35 -to "rx_serial_data_2[0](n)" set_location_assignment PIN_AC36 -to rx_serial_data_3[3] set_location_assignment PIN_AC35 -to "rx_serial_data_3[3](n)" set_location_assignment PIN_AB38 -to rx_serial_data_3[2] set_location_assignment PIN_AB37 -to "rx_serial_data_3[2](n)" set_location_assignment PIN_AD38 -to rx_serial_data_3[1] set_location_assignment PIN_AD37 -to "rx_serial_data_3[1](n)" set_location_assignment PIN_AG36 -to rx_serial_data_3[0] set_location_assignment PIN_AG35 -to "rx_serial_data_3[0](n)" set_location_assignment PIN_BA40 -to tx_serial_data_0[3] set_location_assignment PIN_BA39 -to "tx_serial_data_0[3](n)" set_location_assignment PIN_AY38 -to tx_serial_data_0[2] set_location_assignment PIN_AY37 -to "tx_serial_data_0[2](n)" set_location_assignment PIN_BA36 -to tx_serial_data_0[1] set_location_assignment PIN_BA35 -to "tx_serial_data_0[1](n)" set_location_assignment PIN_BB34 -to tx_serial_data_0[0] set_location_assignment PIN_BB33 -to "tx_serial_data_0[0](n)" set_location_assignment PIN_AR40 -to tx_serial_data_1[3] set_location_assignment PIN_AR39 -to "tx_serial_data_1[3](n)" set_location_assignment PIN_AT42 -to tx_serial_data_1[2] set_location_assignment PIN_AT41 -to "tx_serial_data_1[2](n)" set_location_assignment PIN_AV42 -to tx_serial_data_1[1] set_location_assignment PIN_AV41 -to "tx_serial_data_1[1](n)" set_location_assignment PIN_AW40 -to tx_serial_data_1[0] set_location_assignment PIN_AW39 -to "tx_serial_data_1[0](n)" set_location_assignment PIN_AJ40 -to tx_serial_data_2[3] set_location_assignment PIN_AJ39 -to "tx_serial_data_2[3](n)" set_location_assignment PIN_AK42 -to tx_serial_data_2[2] set_location_assignment PIN_AK41 -to "tx_serial_data_2[2](n)" set_location_assignment PIN_AM42 -to tx_serial_data_2[1] set_location_assignment PIN_AM41 -to "tx_serial_data_2[1](n)" set_location_assignment PIN_AN40 -to tx_serial_data_2[0] set_location_assignment PIN_AN39 -to "tx_serial_data_2[0](n)" set_location_assignment PIN_AC40 -to tx_serial_data_3[3] set_location_assignment PIN_AC39 -to "tx_serial_data_3[3](n)" set_location_assignment PIN_AD42 -to tx_serial_data_3[2] set_location_assignment PIN_AD41 -to "tx_serial_data_3[2](n)" set_location_assignment PIN_AF42 -to tx_serial_data_3[1] set_location_assignment PIN_AF41 -to "tx_serial_data_3[1](n)" set_location_assignment PIN_AG40 -to tx_serial_data_3[0] set_location_assignment PIN_AG39 -to "tx_serial_data_3[0](n)" # XCVR Reference Clocks set_location_assignment PIN_AT34 -to xcvr_refclk_0 set_location_assignment PIN_AT33 -to "xcvr_refclk_0(n)" set_location_assignment PIN_AM34 -to xcvr_refclk_1 set_location_assignment PIN_AM33 -to "xcvr_refclk_1(n)" set_location_assignment PIN_AH34 -to xcvr_refclk_2 set_location_assignment PIN_AH33 -to "xcvr_refclk_2(n)" set_location_assignment PIN_AD34 -to xcvr_refclk_3 set_location_assignment PIN_AD33 -to "xcvr_refclk_3(n)" set_instance_assignment -name IO_STANDARD LVDS -to xcvr_refclk_0 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to xcvr_refclk_1 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to xcvr_refclk_2 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to xcvr_refclk_3 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to xcvr_refclk_0 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "xcvr_refclk_0(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to xcvr_refclk_1 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "xcvr_refclk_1(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to xcvr_refclk_2 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "xcvr_refclk_2(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to xcvr_refclk_3 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "xcvr_refclk_3(n)" -entity bist_top_lp1 # Note: AC_COULPLING implements on-chip termination and on-chip signal biasing. # XCVR Recovered Clock Inputs set_location_assignment PIN_AV34 -to rcvrd_refclk_0 set_location_assignment PIN_AV33 -to "rcvrd_refclk_0(n)" set_location_assignment PIN_AP34 -to rcvrd_refclk_1 set_location_assignment PIN_AP33 -to "rcvrd_refclk_1(n)" set_location_assignment PIN_AK34 -to rcvrd_refclk_2 set_location_assignment PIN_AK33 -to "rcvrd_refclk_2(n)" set_location_assignment PIN_AF34 -to rcvrd_refclk_3 set_location_assignment PIN_AF33 -to "rcvrd_refclk_3(n)" set_instance_assignment -name IO_STANDARD LVDS -to rcvrd_refclk_0 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rcvrd_refclk_1 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rcvrd_refclk_2 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rcvrd_refclk_3 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to rcvrd_refclk_0 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "rcvrd_refclk_0(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to rcvrd_refclk_1 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "rcvrd_refclk_1(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to rcvrd_refclk_2 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "rcvrd_refclk_2(n)" -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to rcvrd_refclk_3 -entity bist_top_lp1 set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to "rcvrd_refclk_3(n)" -entity bist_top_lp1 # Note: AC_COULPLING implements on-chip termination and on-chip signal biasing. # XCVR Recovered Clock Outputs set_location_assignment PIN_V7 -to rx_clkout_0 set_location_assignment PIN_V6 -to "rx_clkout_0(n)" set_location_assignment PIN_W8 -to rx_clkout_1 set_location_assignment PIN_V8 -to "rx_clkout_1(n)" set_location_assignment PIN_V10 -to rx_clkout_2 set_location_assignment PIN_V11 -to "rx_clkout_2(n)" set_location_assignment PIN_W1 -to rx_clkout_3 set_location_assignment PIN_V1 -to "rx_clkout_3(n)" set_instance_assignment -name IO_STANDARD LVDS -to rx_clkout_0 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rx_clkout_1 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rx_clkout_2 -entity bist_top_lp1 set_instance_assignment -name IO_STANDARD LVDS -to rx_clkout_3 -entity bist_top_lp1 #-------------------------- # Floorplan for DDR4 SDRAM #-------------------------- set_instance_assignment -name PLACE_REGION "X21 Y1 X52 Y109" -to u50|u0 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u50|u0 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u50|u0 set_instance_assignment -name PLACE_REGION "X224 Y37 X255 Y145" -to u50|u1 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u50|u1 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u50|u1 set_instance_assignment -name PLACE_REGION "X224 Y319 X255 Y432" -to u50|u2 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u50|u2 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u50|u2 set_instance_assignment -name PLACE_REGION "X21 Y319 X52 Y432" -to u50|u3 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u50|u3 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u50|u3 set_instance_assignment -name PLACE_REGION "X21 Y1 X52 Y109" -to "u50|\\gen0:0:u1" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:0:u1" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:0:u1" set_instance_assignment -name PLACE_REGION "X224 Y37 X255 Y145" -to "u50|\\gen0:1:u1" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:1:u1" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:1:u1" set_instance_assignment -name PLACE_REGION "X224 Y319 X255 Y432" -to "u50|\\gen0:2:u1" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:2:u1" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:2:u1" set_instance_assignment -name PLACE_REGION "X21 Y319 X52 Y432" -to "u50|\\gen0:3:u1" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:3:u1" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:3:u1" set_instance_assignment -name PLACE_REGION "X21 Y1 X52 Y109" -to "u50|\\gen0:0:u2a" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:0:u2a" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:0:u2a" set_instance_assignment -name PLACE_REGION "X224 Y37 X255 Y145" -to "u50|\\gen0:1:u2a" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:1:u2a" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:1:u2a" set_instance_assignment -name PLACE_REGION "X224 Y319 X255 Y432" -to "u50|\\gen0:2:u2a" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:2:u2a" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:2:u2a" set_instance_assignment -name PLACE_REGION "X21 Y319 X52 Y432" -to "u50|\\gen0:3:u2a" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:3:u2a" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:3:u2a" set_instance_assignment -name PLACE_REGION "X21 Y1 X52 Y109" -to "u50|\\gen0:0:u2b" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:0:u2b" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:0:u2b" set_instance_assignment -name PLACE_REGION "X224 Y37 X255 Y145" -to "u50|\\gen0:1:u2b" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:1:u2b" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:1:u2b" set_instance_assignment -name PLACE_REGION "X224 Y319 X255 Y432" -to "u50|\\gen0:2:u2b" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:2:u2b" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:2:u2b" set_instance_assignment -name PLACE_REGION "X21 Y319 X52 Y432" -to "u50|\\gen0:3:u2b" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:3:u2b" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:3:u2b" set_instance_assignment -name PLACE_REGION "X21 Y1 X52 Y109" -to "u50|\\gen0:0:u3" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:0:u3" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:0:u3" set_instance_assignment -name PLACE_REGION "X224 Y37 X255 Y145" -to "u50|\\gen0:1:u3" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:1:u3" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:1:u3" set_instance_assignment -name PLACE_REGION "X224 Y319 X255 Y432" -to "u50|\\gen0:2:u3" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:2:u3" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:2:u3" set_instance_assignment -name PLACE_REGION "X21 Y319 X52 Y432" -to "u50|\\gen0:3:u3" set_instance_assignment -name RESERVE_PLACE_REGION OFF -to "u50|\\gen0:3:u3" set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to "u50|\\gen0:3:u3" #------------------------- # Floorplan for XCVR_BIST #------------------------- set_instance_assignment -name PLACE_REGION "X2 Y1 X20 Y139" -to u60 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u60 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u60 set_instance_assignment -name REGION_NAME XCVR_BIST -to u60 set_instance_assignment -name PLACE_REGION "X2 Y1 X20 Y139" -to u61 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u61 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u61 set_instance_assignment -name REGION_NAME XCVR_BIST -to u61 set_instance_assignment -name PLACE_REGION "X2 Y1 X20 Y139" -to u62 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u62 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u62 set_instance_assignment -name REGION_NAME XCVR_BIST -to u62 set_instance_assignment -name PLACE_REGION "X2 Y1 X20 Y139" -to u63 set_instance_assignment -name RESERVE_PLACE_REGION OFF -to u63 set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u63 set_instance_assignment -name REGION_NAME XCVR_BIST -to u63 #-------------------------------------- # Floorplan to Assist Cooker Placement #-------------------------------------- set_instance_assignment -name EMPTY_PLACE_REGION "X122 Y1 X150 Y24-R:C-keep_out_0" -to | set_instance_assignment -name EMPTY_PLACE_REGION "X190 Y1 X205 Y24-R:C-keep_out_1" -to | #-------------------------------- # System Manager IOPLL Placement #-------------------------------- set_location_assignment IOPLL_X224_Y0_N20 -to u30|qsys_sys_mgr|iopll_0|iopll_0|stratix10_altera_iopll_i|s10_iopll.fourteennm_pll~O_BLOCK_SELECT #----------------------- # IBIS Model Generation #----------------------- #set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL "IBIS (Signal Integrity)" #set_global_assignment -name EDA_OUTPUT_DATA_FORMAT IBIS -section_id eda_board_design_signal_integrity #set_global_assignment -name POWER_AUTO_COMPUTE_TJ OFF #------------------ # RTL and IP files #------------------ set_global_assignment -name QSYS_FILE ../qsys/qsys_top.qsys set_global_assignment -name VHDL_FILE ../../common_cores/cooker/rtl/sreg_cook_test.vhd set_global_assignment -name VHDL_FILE ../../common_cores/cooker/rtl/bram_cook_test.vhd set_global_assignment -name VHDL_FILE ../../common_cores/cooker/rtl/dsp_cook_test.vhd set_global_assignment -name VHDL_FILE ../../common_cores/general_fifo/rtl/general_fifo.vhd set_global_assignment -name VHDL_FILE ../../common_cores/heartbeat/rtl/heartbeat_50m.vhd set_global_assignment -name VHDL_FILE ../../common_cores/clock_gen/rtl/clock_gen.vhd set_global_assignment -name VHDL_FILE ../../common_cores/clock_gen/rtl/clock_gen_fast.vhd set_global_assignment -name VHDL_FILE ../../common_cores/pwr_on_rst/rtl/pwr_on_rst_dist.vhd set_global_assignment -name VHDL_FILE ../../common_cores/retime/rtl/bretime_async_rst.vhd set_global_assignment -name VHDL_FILE ../../common_cores/clock_test/rtl/counter32.vhd set_global_assignment -name VHDL_FILE ../../common_cores/clock_test/rtl/clock_test.vhd set_global_assignment -name VHDL_FILE ../../common_cores/ram/rtl/altera_dprw_ram.vhd set_global_assignment -name VHDL_FILE ../../common_cores/prbs/rtl/wide_prbs_gen.vhd set_global_assignment -name VHDL_FILE ../../common_cores/prbs/rtl/prbs_gen.vhd set_global_assignment -name VHDL_FILE ../../common_cores/prbs/rtl/prbs_checker.vhd set_global_assignment -name VHDL_FILE ../../common_cores/prbs/rtl/bit_checker.vhd set_global_assignment -name IP_FILE ../ip/s10_temperature.ip set_global_assignment -name IP_FILE ../ip/s10_voltage.ip set_global_assignment -name IP_FILE ../ip/s10_clock_mux.ip set_global_assignment -name IP_FILE ../ip/s10_chip_id.ip set_global_assignment -name VHDL_FILE ../rtl/s10_adc.vhd set_global_assignment -name VHDL_FILE ../rtl/s10_chip_id_wrap.vhd set_global_assignment -name VHDL_FILE ../rtl/pkg_svn_revision.vhd set_global_assignment -name VHDL_FILE ../rtl/pkg_user_registers.vhd set_global_assignment -name VHDL_FILE ../rtl/user_registers.vhd set_global_assignment -name VHDL_FILE ../rtl/cooker_wrapper.vhd set_global_assignment -name VHDL_FILE ../rtl/memory_bist_with_parity.vhd set_global_assignment -name VHDL_FILE ../rtl/memory_bist_wrapper.vhd set_global_assignment -name VHDL_FILE ../rtl/memory_peek_poke.vhd set_global_assignment -name VHDL_FILE ../rtl/ddr4_sdram_if.vhd set_global_assignment -name VHDL_FILE ../rtl/err_count_64.vhd set_global_assignment -name VHDL_FILE ../rtl/xcvr_bist.vhd set_global_assignment -name VHDL_FILE ../rtl/bist_top_lp1.vhd set_global_assignment -name SDC_FILE bist_top_lp1.sdc set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_clock_bridge_0.ip set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_clk_0.ip set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_clk_1.ip set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_pcie_s10_hip_avmm_bridge_0.ip set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_mm_clock_crossing_bridge_0.ip set_global_assignment -name IP_FILE ../qsys/ip/qsys_top/qsys_top_master_0.ip set_global_assignment -name IP_FILE ../ip/mem0.ip set_global_assignment -name IP_FILE ../ip/mem1.ip set_global_assignment -name IP_FILE ../ip/mem2.ip set_global_assignment -name IP_FILE ../ip/mem3.ip set_global_assignment -name IP_FILE ../ip/pipe_mm_bridge_0.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_clk_0.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_clk_2.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_flash_memory_buffer.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_if.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_reg_bridge0.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_mm_bridge_0.ip set_global_assignment -name IP_FILE ../qsys/ip/system_manager/system_manager_iopll_0.ip set_global_assignment -name QSYS_FILE ../qsys/system_manager.qsys set_global_assignment -name IP_FILE ../ip/l_tile_xcvr_phy_prod.ip set_global_assignment -name IP_FILE ../ip/l_tile_xcvr_fpll_prod.ip set_global_assignment -name IP_FILE ../ip/l_tile_xcvr_rst_tx.ip set_global_assignment -name IP_FILE ../ip/l_tile_xcvr_rst_rx.ip set_global_assignment -name IP_FILE ../ip/pll_cooker.ip