-- gts_axi_streaming_pcie_hal_top_phip_hal_2100_dn3iuli.vhd

-- Generated using ACDS version 25.1 129

library IEEE;
library phip_hal_2100;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity gts_axi_streaming_pcie_hal_top_phip_hal_2100_dn3iuli is
	generic (
		pcie_parity_bypass                         : string                        := "true";
		rxbuf_limit_bypass                         : integer                       := 7;
		maxpayload_size                            : string                        := "MAXPAYLOAD_SIZE_MAX_PAYLOAD_512";
		pldclk_rate                                : string                        := "PLDCLK_RATE_FAST";
		port_type                                  : string                        := "PORT_TYPE_RP";
		sris_enable                                : string                        := "SRIS_ENABLE_DISABLED";
		sris_mode                                  : string                        := "false";
		sim_mode                                   : string                        := "SIM_MODE_DISABLE_VSIM_MODE";
		sup_mode                                   : string                        := "SUP_MODE_USER_MODE";
		cvp_enable                                 : string                        := "CVP_ENABLE_DISABLED";
		cii_monitor_en                             : string                        := "CII_MONITOR_EN_DISABLE";
		pf0_cap_link_surprise_down_err_cap         : string                        := "PF0_CAP_LINK_SURPRISE_DOWN_ERR_CAP_DISABLE";
		link_rate                                  : string                        := "LINK_RATE_GEN3";
		link_width                                 : string                        := "LINK_WIDTH_X4";
		pf0_dsp_16g_tx_preset0                     : integer                       := 7;
		pf0_dsp_16g_tx_preset1                     : integer                       := 7;
		pf0_dsp_16g_tx_preset2                     : integer                       := 7;
		pf0_dsp_16g_tx_preset3                     : integer                       := 7;
		pf0_dsp_16g_tx_preset4                     : integer                       := 0;
		pf0_dsp_16g_tx_preset5                     : integer                       := 0;
		pf0_dsp_16g_tx_preset6                     : integer                       := 0;
		pf0_dsp_16g_tx_preset7                     : integer                       := 0;
		pf0_dsp_16g_tx_preset8                     : integer                       := 0;
		pf0_dsp_16g_tx_preset9                     : integer                       := 0;
		pf0_dsp_16g_tx_preset10                    : integer                       := 0;
		pf0_dsp_16g_tx_preset11                    : integer                       := 0;
		pf0_dsp_16g_tx_preset12                    : integer                       := 0;
		pf0_dsp_16g_tx_preset13                    : integer                       := 0;
		pf0_dsp_16g_tx_preset14                    : integer                       := 0;
		pf0_dsp_16g_tx_preset15                    : integer                       := 0;
		pf0_dsp_tx_preset0                         : integer                       := 9;
		pf0_dsp_tx_preset1                         : integer                       := 9;
		pf0_dsp_tx_preset2                         : integer                       := 9;
		pf0_dsp_tx_preset3                         : integer                       := 9;
		pf0_dsp_tx_preset4                         : integer                       := 0;
		pf0_dsp_tx_preset5                         : integer                       := 0;
		pf0_dsp_tx_preset6                         : integer                       := 0;
		pf0_dsp_tx_preset7                         : integer                       := 0;
		pf0_dsp_tx_preset8                         : integer                       := 0;
		pf0_dsp_tx_preset9                         : integer                       := 0;
		pf0_dsp_tx_preset10                        : integer                       := 0;
		pf0_dsp_tx_preset11                        : integer                       := 0;
		pf0_dsp_tx_preset12                        : integer                       := 0;
		pf0_dsp_tx_preset13                        : integer                       := 0;
		pf0_dsp_tx_preset14                        : integer                       := 0;
		pf0_dsp_tx_preset15                        : integer                       := 0;
		pf0_usp_16g_tx_preset0                     : integer                       := 7;
		pf0_usp_16g_tx_preset1                     : integer                       := 7;
		pf0_usp_16g_tx_preset2                     : integer                       := 7;
		pf0_usp_16g_tx_preset3                     : integer                       := 7;
		pf0_usp_16g_tx_preset4                     : integer                       := 0;
		pf0_usp_16g_tx_preset5                     : integer                       := 0;
		pf0_usp_16g_tx_preset6                     : integer                       := 0;
		pf0_usp_16g_tx_preset7                     : integer                       := 0;
		pf0_usp_16g_tx_preset8                     : integer                       := 0;
		pf0_usp_16g_tx_preset9                     : integer                       := 0;
		pf0_usp_16g_tx_preset10                    : integer                       := 0;
		pf0_usp_16g_tx_preset11                    : integer                       := 0;
		pf0_usp_16g_tx_preset12                    : integer                       := 0;
		pf0_usp_16g_tx_preset13                    : integer                       := 0;
		pf0_usp_16g_tx_preset14                    : integer                       := 0;
		pf0_usp_16g_tx_preset15                    : integer                       := 0;
		pf0_usp_tx_preset0                         : integer                       := 9;
		pf0_usp_tx_preset1                         : integer                       := 9;
		pf0_usp_tx_preset2                         : integer                       := 9;
		pf0_usp_tx_preset3                         : integer                       := 9;
		pf0_usp_tx_preset4                         : integer                       := 0;
		pf0_usp_tx_preset5                         : integer                       := 0;
		pf0_usp_tx_preset6                         : integer                       := 0;
		pf0_usp_tx_preset7                         : integer                       := 0;
		pf0_usp_tx_preset8                         : integer                       := 0;
		pf0_usp_tx_preset9                         : integer                       := 0;
		pf0_usp_tx_preset10                        : integer                       := 0;
		pf0_usp_tx_preset11                        : integer                       := 0;
		pf0_usp_tx_preset12                        : integer                       := 0;
		pf0_usp_tx_preset13                        : integer                       := 0;
		pf0_usp_tx_preset14                        : integer                       := 0;
		pf0_usp_tx_preset15                        : integer                       := 0;
		pf0_pci_type0_bar0_enabled                 : string                        := "PF0_PCI_TYPE0_BAR0_ENABLED_DISABLED";
		pf0_bar0_prefetch                          : string                        := "false";
		pf0_bar0_type                              : string                        := "PF0_BAR0_TYPE_BAR_MEM32";
		pf0_pci_type0_bar1_enabled                 : string                        := "PF0_PCI_TYPE0_BAR1_ENABLED_DISABLED";
		pf0_bar1_prefetch                          : string                        := "false";
		pf0_pci_type0_bar2_enabled                 : string                        := "PF0_PCI_TYPE0_BAR2_ENABLED_DISABLED";
		pf0_bar2_prefetch                          : string                        := "false";
		pf0_bar2_type                              : string                        := "PF0_BAR2_TYPE_BAR_MEM32";
		pf0_pci_type0_bar3_enabled                 : string                        := "PF0_PCI_TYPE0_BAR3_ENABLED_DISABLED";
		pf0_bar3_prefetch                          : string                        := "false";
		pf0_pci_type0_bar4_enabled                 : string                        := "PF0_PCI_TYPE0_BAR4_ENABLED_DISABLED";
		pf0_bar4_prefetch                          : string                        := "false";
		pf0_bar4_type                              : string                        := "PF0_BAR4_TYPE_BAR_MEM32";
		pf0_pci_type0_bar5_enabled                 : string                        := "PF0_PCI_TYPE0_BAR5_ENABLED_DISABLED";
		pf0_bar5_prefetch                          : string                        := "false";
		pf0_rom_bar_enable                         : string                        := "PF0_ROM_BAR_ENABLE_DISABLED";
		pf0_rom_mask                               : integer                       := 0;
		pf0_rom_bar_enabled                        : string                        := "PF0_ROM_BAR_ENABLED_DISABLED";
		pf0_rp_rom_bar_enabled                     : string                        := "PF0_RP_ROM_BAR_ENABLED_DISABLED";
		pf0_rp_rom_mask                            : integer                       := 0;
		pf0_sriov_vf_bar0_enabled                  : string                        := "PF0_SRIOV_VF_BAR0_ENABLED_DISABLED";
		pf0_sriov_vf_bar0_prefetch                 : string                        := "false";
		pf0_sriov_vf_bar0_type                     : string                        := "PF0_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32";
		pf0_sriov_vf_bar1_enabled                  : string                        := "PF0_SRIOV_VF_BAR1_ENABLED_DISABLED";
		pf0_sriov_vf_bar1_prefetch                 : string                        := "false";
		pf0_sriov_vf_bar2_enabled                  : string                        := "PF0_SRIOV_VF_BAR2_ENABLED_DISABLED";
		pf0_sriov_vf_bar2_prefetch                 : string                        := "false";
		pf0_sriov_vf_bar2_type                     : string                        := "PF0_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32";
		pf0_sriov_vf_bar3_enabled                  : string                        := "PF0_SRIOV_VF_BAR3_ENABLED_DISABLED";
		pf0_sriov_vf_bar3_prefetch                 : string                        := "false";
		pf0_sriov_vf_bar4_enabled                  : string                        := "PF0_SRIOV_VF_BAR4_ENABLED_DISABLED";
		pf0_sriov_vf_bar4_prefetch                 : string                        := "false";
		pf0_sriov_vf_bar4_type                     : string                        := "PF0_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32";
		pf0_sriov_vf_bar5_enabled                  : string                        := "PF0_SRIOV_VF_BAR5_ENABLED_DISABLED";
		pf0_sriov_vf_bar5_prefetch                 : string                        := "false";
		pf1_pci_type0_bar0_enabled                 : string                        := "PF1_PCI_TYPE0_BAR0_ENABLED_DISABLED";
		pf1_bar0_prefetch                          : string                        := "false";
		pf1_bar0_type                              : string                        := "PF1_BAR0_TYPE_BAR_MEM32";
		pf1_pci_type0_bar1_enabled                 : string                        := "PF1_PCI_TYPE0_BAR1_ENABLED_DISABLED";
		pf1_bar1_prefetch                          : string                        := "false";
		pf1_pci_type0_bar2_enabled                 : string                        := "PF1_PCI_TYPE0_BAR2_ENABLED_DISABLED";
		pf1_bar2_prefetch                          : string                        := "false";
		pf1_bar2_type                              : string                        := "PF1_BAR2_TYPE_BAR_MEM32";
		pf1_pci_type0_bar3_enabled                 : string                        := "PF1_PCI_TYPE0_BAR3_ENABLED_DISABLED";
		pf1_bar3_prefetch                          : string                        := "false";
		pf1_pci_type0_bar4_enabled                 : string                        := "PF1_PCI_TYPE0_BAR4_ENABLED_DISABLED";
		pf1_bar4_prefetch                          : string                        := "false";
		pf1_bar4_type                              : string                        := "PF1_BAR4_TYPE_BAR_MEM32";
		pf1_pci_type0_bar5_enabled                 : string                        := "PF1_PCI_TYPE0_BAR5_ENABLED_DISABLED";
		pf1_bar5_prefetch                          : string                        := "false";
		pf1_rom_bar_enable                         : string                        := "PF1_ROM_BAR_ENABLE_DISABLED";
		pf1_rom_mask                               : integer                       := 0;
		pf1_rom_bar_enabled                        : string                        := "PF1_ROM_BAR_ENABLED_DISABLED";
		pf1_sriov_vf_bar0_enabled                  : string                        := "PF1_SRIOV_VF_BAR0_ENABLED_DISABLED";
		pf1_sriov_vf_bar0_prefetch                 : string                        := "false";
		pf1_sriov_vf_bar0_type                     : string                        := "PF1_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32";
		pf1_sriov_vf_bar1_enabled                  : string                        := "PF1_SRIOV_VF_BAR1_ENABLED_DISABLED";
		pf1_sriov_vf_bar1_prefetch                 : string                        := "false";
		pf1_sriov_vf_bar2_enabled                  : string                        := "PF1_SRIOV_VF_BAR2_ENABLED_DISABLED";
		pf1_sriov_vf_bar2_prefetch                 : string                        := "false";
		pf1_sriov_vf_bar2_type                     : string                        := "PF1_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32";
		pf1_sriov_vf_bar3_enabled                  : string                        := "PF1_SRIOV_VF_BAR3_ENABLED_DISABLED";
		pf1_sriov_vf_bar3_prefetch                 : string                        := "false";
		pf1_sriov_vf_bar4_enabled                  : string                        := "PF1_SRIOV_VF_BAR4_ENABLED_DISABLED";
		pf1_sriov_vf_bar4_prefetch                 : string                        := "false";
		pf1_sriov_vf_bar4_type                     : string                        := "PF1_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32";
		pf1_sriov_vf_bar5_enabled                  : string                        := "PF1_SRIOV_VF_BAR5_ENABLED_DISABLED";
		pf1_sriov_vf_bar5_prefetch                 : string                        := "false";
		pf2_pci_type0_bar0_enabled                 : string                        := "PF2_PCI_TYPE0_BAR0_ENABLED_DISABLED";
		pf2_bar0_prefetch                          : string                        := "false";
		pf2_bar0_type                              : string                        := "PF2_BAR0_TYPE_BAR_MEM32";
		pf2_pci_type0_bar1_enabled                 : string                        := "PF2_PCI_TYPE0_BAR1_ENABLED_DISABLED";
		pf2_bar1_prefetch                          : string                        := "false";
		pf2_pci_type0_bar2_enabled                 : string                        := "PF2_PCI_TYPE0_BAR2_ENABLED_DISABLED";
		pf2_bar2_prefetch                          : string                        := "false";
		pf2_bar2_type                              : string                        := "PF2_BAR2_TYPE_BAR_MEM32";
		pf2_pci_type0_bar3_enabled                 : string                        := "PF2_PCI_TYPE0_BAR3_ENABLED_DISABLED";
		pf2_bar3_prefetch                          : string                        := "false";
		pf2_pci_type0_bar4_enabled                 : string                        := "PF2_PCI_TYPE0_BAR4_ENABLED_DISABLED";
		pf2_bar4_prefetch                          : string                        := "false";
		pf2_bar4_type                              : string                        := "PF2_BAR4_TYPE_BAR_MEM32";
		pf2_pci_type0_bar5_enabled                 : string                        := "PF2_PCI_TYPE0_BAR5_ENABLED_DISABLED";
		pf2_bar5_prefetch                          : string                        := "false";
		pf2_rom_bar_enable                         : string                        := "PF2_ROM_BAR_ENABLE_DISABLED";
		pf2_rom_mask                               : integer                       := 0;
		pf2_rom_bar_enabled                        : string                        := "PF2_ROM_BAR_ENABLED_DISABLED";
		pf2_sriov_vf_bar0_enabled                  : string                        := "PF2_SRIOV_VF_BAR0_ENABLED_DISABLED";
		pf2_sriov_vf_bar0_prefetch                 : string                        := "false";
		pf2_sriov_vf_bar0_type                     : string                        := "PF2_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32";
		pf2_sriov_vf_bar1_enabled                  : string                        := "PF2_SRIOV_VF_BAR1_ENABLED_DISABLED";
		pf2_sriov_vf_bar1_prefetch                 : string                        := "false";
		pf2_sriov_vf_bar2_enabled                  : string                        := "PF2_SRIOV_VF_BAR2_ENABLED_DISABLED";
		pf2_sriov_vf_bar2_prefetch                 : string                        := "false";
		pf2_sriov_vf_bar2_type                     : string                        := "PF2_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32";
		pf2_sriov_vf_bar3_enabled                  : string                        := "PF2_SRIOV_VF_BAR3_ENABLED_DISABLED";
		pf2_sriov_vf_bar3_prefetch                 : string                        := "false";
		pf2_sriov_vf_bar4_enabled                  : string                        := "PF2_SRIOV_VF_BAR4_ENABLED_DISABLED";
		pf2_sriov_vf_bar4_prefetch                 : string                        := "false";
		pf2_sriov_vf_bar4_type                     : string                        := "PF2_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32";
		pf2_sriov_vf_bar5_enabled                  : string                        := "PF2_SRIOV_VF_BAR5_ENABLED_DISABLED";
		pf2_sriov_vf_bar5_prefetch                 : string                        := "false";
		pf3_pci_type0_bar0_enabled                 : string                        := "PF3_PCI_TYPE0_BAR0_ENABLED_DISABLED";
		pf3_bar0_prefetch                          : string                        := "false";
		pf3_bar0_type                              : string                        := "PF3_BAR0_TYPE_BAR_MEM32";
		pf3_pci_type0_bar1_enabled                 : string                        := "PF3_PCI_TYPE0_BAR1_ENABLED_DISABLED";
		pf3_bar1_prefetch                          : string                        := "false";
		pf3_pci_type0_bar2_enabled                 : string                        := "PF3_PCI_TYPE0_BAR2_ENABLED_DISABLED";
		pf3_bar2_prefetch                          : string                        := "false";
		pf3_bar2_type                              : string                        := "PF3_BAR2_TYPE_BAR_MEM32";
		pf3_pci_type0_bar3_enabled                 : string                        := "PF3_PCI_TYPE0_BAR3_ENABLED_DISABLED";
		pf3_bar3_prefetch                          : string                        := "false";
		pf3_pci_type0_bar4_enabled                 : string                        := "PF3_PCI_TYPE0_BAR4_ENABLED_DISABLED";
		pf3_bar4_prefetch                          : string                        := "false";
		pf3_bar4_type                              : string                        := "PF3_BAR4_TYPE_BAR_MEM32";
		pf3_pci_type0_bar5_enabled                 : string                        := "PF3_PCI_TYPE0_BAR5_ENABLED_DISABLED";
		pf3_bar5_prefetch                          : string                        := "false";
		pf3_rom_bar_enable                         : string                        := "PF3_ROM_BAR_ENABLE_DISABLED";
		pf3_rom_mask                               : integer                       := 0;
		pf3_rom_bar_enabled                        : string                        := "PF3_ROM_BAR_ENABLED_DISABLED";
		pf3_sriov_vf_bar0_enabled                  : string                        := "PF3_SRIOV_VF_BAR0_ENABLED_DISABLED";
		pf3_sriov_vf_bar0_prefetch                 : string                        := "false";
		pf3_sriov_vf_bar0_type                     : string                        := "PF3_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32";
		pf3_sriov_vf_bar1_enabled                  : string                        := "PF3_SRIOV_VF_BAR1_ENABLED_DISABLED";
		pf3_sriov_vf_bar1_prefetch                 : string                        := "false";
		pf3_sriov_vf_bar2_enabled                  : string                        := "PF3_SRIOV_VF_BAR2_ENABLED_DISABLED";
		pf3_sriov_vf_bar2_prefetch                 : string                        := "false";
		pf3_sriov_vf_bar2_type                     : string                        := "PF3_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32";
		pf3_sriov_vf_bar3_enabled                  : string                        := "PF3_SRIOV_VF_BAR3_ENABLED_DISABLED";
		pf3_sriov_vf_bar3_prefetch                 : string                        := "false";
		pf3_sriov_vf_bar4_enabled                  : string                        := "PF3_SRIOV_VF_BAR4_ENABLED_DISABLED";
		pf3_sriov_vf_bar4_prefetch                 : string                        := "false";
		pf3_sriov_vf_bar4_type                     : string                        := "PF3_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32";
		pf3_sriov_vf_bar5_enabled                  : string                        := "PF3_SRIOV_VF_BAR5_ENABLED_DISABLED";
		pf3_sriov_vf_bar5_prefetch                 : string                        := "false";
		pf1_enable                                 : string                        := "PF1_ENABLE_DISABLED";
		pf2_enable                                 : string                        := "PF2_ENABLE_DISABLED";
		pf3_enable                                 : string                        := "PF3_ENABLE_DISABLED";
		pf0_sriov_enable                           : string                        := "PF0_SRIOV_ENABLE_DISABLED";
		pf1_sriov_enable                           : string                        := "PF1_SRIOV_ENABLE_DISABLED";
		pf2_sriov_enable                           : string                        := "PF2_SRIOV_ENABLE_DISABLED";
		pf3_sriov_enable                           : string                        := "PF3_SRIOV_ENABLE_DISABLED";
		pf0_sriov_cap_sup_page_size                : integer                       := 0;
		pf1_sriov_cap_sup_page_size                : integer                       := 0;
		pf2_sriov_cap_sup_page_size                : integer                       := 0;
		pf3_sriov_cap_sup_page_size                : integer                       := 0;
		pf0_sriov_num_vf                           : integer                       := 0;
		pf1_sriov_num_vf                           : integer                       := 0;
		pf2_sriov_num_vf                           : integer                       := 0;
		pf3_sriov_num_vf                           : integer                       := 0;
		pf0_msi_enable                             : string                        := "PF0_MSI_ENABLE_DISABLED";
		pf0_pci_msi_ext_data_cap                   : string                        := "false";
		pf0_pci_msi_ext_data_en                    : string                        := "false";
		pf0_pci_msi_64_bit_addr_cap                : string                        := "false";
		pf0_pci_msi_multiple_msg_cap               : string                        := "PF0_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1";
		pf0_msix_enable                            : string                        := "PF0_MSIX_ENABLE_DISABLED";
		pf0_pci_msix_table_size                    : integer                       := 0;
		pf0_pci_msix_table_offset                  : integer                       := 0;
		pf0_pci_msix_bir                           : integer                       := 0;
		pf0_pci_msix_pba                           : integer                       := 0;
		pf0_pci_msix_pba_offset                    : integer                       := 0;
		pf0_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
		pf0_exvf_msix_cap_enable                   : string                        := "PF0_EXVF_MSIX_CAP_ENABLE_DISABLED";
		exvf_msix_tablesize_pf0                    : integer                       := 0;
		exvf_msixtable_offset_pf0                  : integer                       := 0;
		exvf_msixtable_bir_pf0                     : integer                       := 0;
		exvf_msixpba_offset_pf0                    : integer                       := 0;
		exvf_msixpba_bir_pf0                       : integer                       := 0;
		pf1_msi_enable                             : string                        := "PF1_MSI_ENABLE_DISABLED";
		pf1_pci_msi_ext_data_cap                   : string                        := "false";
		pf1_pci_msi_ext_data_en                    : string                        := "false";
		pf1_pci_msi_64_bit_addr_cap                : string                        := "false";
		pf1_pci_msi_multiple_msg_cap               : string                        := "PF1_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1";
		pf1_msix_enable                            : string                        := "PF1_MSIX_ENABLE_DISABLED";
		pf1_pci_msix_table_size                    : integer                       := 0;
		pf1_pci_msix_table_offset                  : integer                       := 0;
		pf1_pci_msix_bir                           : integer                       := 0;
		pf1_pci_msix_pba                           : integer                       := 0;
		pf1_pci_msix_pba_offset                    : integer                       := 0;
		pf1_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
		pf1_exvf_msix_cap_enable                   : string                        := "PF1_EXVF_MSIX_CAP_ENABLE_DISABLED";
		exvf_msix_tablesize_pf1                    : integer                       := 0;
		exvf_msixtable_offset_pf1                  : integer                       := 0;
		exvf_msixtable_bir_pf1                     : integer                       := 0;
		exvf_msixpba_offset_pf1                    : integer                       := 0;
		exvf_msixpba_bir_pf1                       : integer                       := 0;
		pf2_msi_enable                             : string                        := "PF2_MSI_ENABLE_DISABLED";
		pf2_pci_msi_ext_data_cap                   : string                        := "false";
		pf2_pci_msi_ext_data_en                    : string                        := "false";
		pf2_pci_msi_64_bit_addr_cap                : string                        := "false";
		pf2_pci_msi_multiple_msg_cap               : string                        := "PF2_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1";
		pf2_msix_enable                            : string                        := "PF2_MSIX_ENABLE_DISABLED";
		pf2_pci_msix_bir                           : integer                       := 0;
		pf2_pci_msix_pba                           : integer                       := 0;
		pf2_pci_msix_pba_offset                    : integer                       := 0;
		pf2_pci_msix_table_offset                  : integer                       := 0;
		pf2_pci_msix_table_size                    : integer                       := 0;
		pf2_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
		pf2_exvf_msix_cap_enable                   : string                        := "PF2_EXVF_MSIX_CAP_ENABLE_DISABLED";
		exvf_msix_tablesize_pf2                    : integer                       := 0;
		exvf_msixtable_offset_pf2                  : integer                       := 0;
		exvf_msixtable_bir_pf2                     : integer                       := 0;
		exvf_msixpba_offset_pf2                    : integer                       := 0;
		exvf_msixpba_bir_pf2                       : integer                       := 0;
		pf3_msi_enable                             : string                        := "PF3_MSI_ENABLE_DISABLED";
		pf3_pci_msi_ext_data_cap                   : string                        := "false";
		pf3_pci_msi_ext_data_en                    : string                        := "false";
		pf3_pci_msi_64_bit_addr_cap                : string                        := "false";
		pf3_pci_msi_multiple_msg_cap               : string                        := "PF3_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1";
		pf3_msix_enable                            : string                        := "PF3_MSIX_ENABLE_DISABLED";
		pf3_pci_msix_bir                           : integer                       := 0;
		pf3_pci_msix_pba                           : integer                       := 0;
		pf3_pci_msix_pba_offset                    : integer                       := 0;
		pf3_pci_msix_table_offset                  : integer                       := 0;
		pf3_pci_msix_table_size                    : integer                       := 0;
		pf3_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
		pf3_exvf_msix_cap_enable                   : string                        := "PF3_EXVF_MSIX_CAP_ENABLE_DISABLED";
		exvf_msix_tablesize_pf3                    : integer                       := 0;
		exvf_msixtable_offset_pf3                  : integer                       := 0;
		exvf_msixtable_bir_pf3                     : integer                       := 0;
		exvf_msixpba_offset_pf3                    : integer                       := 0;
		exvf_msixpba_bir_pf3                       : integer                       := 0;
		pf0_prs_ext_cap_enable                     : string                        := "PF0_PRS_EXT_CAP_ENABLE_DISABLED";
		pf0_prs_ext_cap_outstanding_capacity       : integer                       := 0;
		pf1_prs_ext_cap_enable                     : string                        := "PF1_PRS_EXT_CAP_ENABLE_DISABLED";
		pf1_prs_ext_cap_outstanding_capacity       : integer                       := 0;
		pf2_prs_ext_cap_enable                     : string                        := "PF2_PRS_EXT_CAP_ENABLE_DISABLED";
		pf2_prs_ext_cap_outstanding_capacity       : integer                       := 0;
		pf3_prs_ext_cap_enable                     : string                        := "PF3_PRS_EXT_CAP_ENABLE_DISABLED";
		pf3_prs_ext_cap_outstanding_capacity       : integer                       := 0;
		pf0_pasid_cap_enable                       : string                        := "PF0_PASID_CAP_ENABLE_DISABLED";
		pf0_pasid_cap_execute_permission_supported : string                        := "PF0_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED";
		pf0_pasid_cap_max_pasid_width              : integer                       := 0;
		pf0_pasid_cap_privileged_mode_supported    : string                        := "PF0_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED";
		pf1_pasid_cap_enable                       : string                        := "PF1_PASID_CAP_ENABLE_DISABLED";
		pf1_pasid_cap_execute_permission_supported : string                        := "PF1_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED";
		pf1_pasid_cap_max_pasid_width              : integer                       := 0;
		pf1_pasid_cap_privileged_mode_supported    : string                        := "PF1_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED";
		pf2_pasid_cap_enable                       : string                        := "PF2_PASID_CAP_ENABLE_DISABLED";
		pf2_pasid_cap_execute_permission_supported : string                        := "PF2_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED";
		pf2_pasid_cap_max_pasid_width              : integer                       := 0;
		pf2_pasid_cap_privileged_mode_supported    : string                        := "PF2_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED";
		pf3_pasid_cap_enable                       : string                        := "PF3_PASID_CAP_ENABLE_DISABLED";
		pf3_pasid_cap_execute_permission_supported : string                        := "PF3_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED";
		pf3_pasid_cap_max_pasid_width              : integer                       := 0;
		pf3_pasid_cap_privileged_mode_supported    : string                        := "PF3_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED";
		pf0_sn_cap_enable                          : string                        := "PF0_SN_CAP_ENABLE_DISABLED";
		pf1_sn_cap_enable                          : string                        := "PF1_SN_CAP_ENABLE_DISABLED";
		pf2_sn_cap_enable                          : string                        := "PF2_SN_CAP_ENABLE_DISABLED";
		pf3_sn_cap_enable                          : string                        := "PF3_SN_CAP_ENABLE_DISABLED";
		pf0_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
		pf0_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
		pf0_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 7;
		pf0_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 7;
		pf1_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
		pf1_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
		pf1_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
		pf1_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
		pf2_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
		pf2_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
		pf2_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
		pf2_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
		pf3_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
		pf3_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
		pf3_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
		pf3_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
		aspm_support                               : string                        := "ASPM_SUPPORT_L0S_L1";
		dbi_ro_wr_disable                          : string                        := "DBI_RO_WR_DISABLE_ENABLE";
		pf0_gen3_eq_pset_req_vec                   : integer                       := 292;
		pf0_gen3_eq_pset_req_vec_atg4              : integer                       := 352;
		pf0_pcie_cap_flr_cap                       : string                        := "PF0_PCIE_CAP_FLR_CAP_NOT_CAPABLE";
		pf1_pcie_cap_flr_cap                       : string                        := "PF1_PCIE_CAP_FLR_CAP_NOT_CAPABLE";
		pf2_pcie_cap_flr_cap                       : string                        := "PF2_PCIE_CAP_FLR_CAP_NOT_CAPABLE";
		pf3_pcie_cap_flr_cap                       : string                        := "PF3_PCIE_CAP_FLR_CAP_NOT_CAPABLE";
		pf0_pcie_cap_port_num                      : integer                       := 1;
		pf1_pcie_cap_port_num                      : integer                       := 0;
		pf2_pcie_cap_port_num                      : integer                       := 0;
		pf3_pcie_cap_port_num                      : integer                       := 0;
		pf0_pcie_cap_slot_clk_config               : string                        := "true";
		pf1_pcie_cap_slot_clk_config               : string                        := "false";
		pf2_pcie_cap_slot_clk_config               : string                        := "false";
		pf3_pcie_cap_slot_clk_config               : string                        := "false";
		pf0_ltr_cap_enable                         : string                        := "PF0_LTR_CAP_ENABLE_DISABLED";
		pf0_pcie_slot_imp                          : string                        := "PF0_PCIE_SLOT_IMP_NOT_IMPLEMENTED";
		pf0_pcie_cap_slot_power_limit_scale        : integer                       := 0;
		pf0_pcie_cap_slot_power_limit_value        : integer                       := 0;
		pf0_pcie_cap_phy_slot_num                  : integer                       := 0;
		pf0_pcie_cap_hot_plug_capable              : string                        := "false";
		pf0_pcie_cap_ext_tag_en                    : string                        := "true";
		pf1_pcie_cap_ext_tag_en                    : string                        := "false";
		pf2_pcie_cap_ext_tag_en                    : string                        := "false";
		pf3_pcie_cap_ext_tag_en                    : string                        := "false";
		cfg_ptm_auto_update_signal                 : string                        := "false";
		ptm_autoupdate                             : string                        := "PTM_AUTOUPDATE_AUTOUPDATE_DISABLE";
		ptm_enable                                 : string                        := "PTM_ENABLE_DISABLE";
		pf0_ats_cap_enable                         : string                        := "PF0_ATS_CAP_ENABLE_DISABLED";
		pf0_exvf_ats_cap_enable                    : string                        := "PF0_EXVF_ATS_CAP_ENABLE_DISABLED";
		pf0_ats_cap_invalidate_q_depth             : integer                       := 0;
		pf0_ats_exvf_align_request                 : string                        := "PF0_ATS_EXVF_ALIGN_REQUEST_DISABLE";
		pf1_ats_cap_enable                         : string                        := "PF1_ATS_CAP_ENABLE_DISABLED";
		pf1_exvf_ats_cap_enable                    : string                        := "PF1_EXVF_ATS_CAP_ENABLE_DISABLED";
		pf1_ats_cap_invalidate_q_depth             : integer                       := 0;
		pf1_ats_exvf_align_request                 : string                        := "PF1_ATS_EXVF_ALIGN_REQUEST_DISABLE";
		pf2_ats_cap_enable                         : string                        := "PF2_ATS_CAP_ENABLE_DISABLED";
		pf2_exvf_ats_cap_enable                    : string                        := "PF2_EXVF_ATS_CAP_ENABLE_DISABLED";
		pf2_ats_cap_invalidate_q_depth             : integer                       := 0;
		pf2_ats_exvf_align_request                 : string                        := "PF2_ATS_EXVF_ALIGN_REQUEST_DISABLE";
		pf3_ats_cap_enable                         : string                        := "PF3_ATS_CAP_ENABLE_DISABLED";
		pf3_exvf_ats_cap_enable                    : string                        := "PF3_EXVF_ATS_CAP_ENABLE_DISABLED";
		pf3_ats_cap_invalidate_q_depth             : integer                       := 0;
		pf3_ats_exvf_align_request                 : string                        := "PF3_ATS_EXVF_ALIGN_REQUEST_DISABLE";
		pf0_tph_cap_enable                         : string                        := "PF0_TPH_CAP_ENABLE_DISABLED";
		pf0_tph_req_cap_int_vec                    : string                        := "PF0_TPH_REQ_CAP_INT_VEC_DISABLED";
		pf0_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "PF0_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED";
		pf0_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "PF0_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF";
		pf0_tph_req_cap_st_table_loc_1             : string                        := "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE";
		pf0_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF";
		pf0_tph_req_cap_st_table_size              : integer                       := 0;
		pf0_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
		pf0_tph_req_device_spec                    : string                        := "PF0_TPH_REQ_DEVICE_SPEC_DISABLED";
		pf0_tph_req_device_spec_vfcomm_cs2         : string                        := "PF0_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED";
		pf0_exvf_tph_cap_enable                    : string                        := "PF0_EXVF_TPH_CAP_ENABLE_DISABLED";
		exvf_tph_sttablelocation_pf0               : integer                       := 0;
		exvf_tph_sttablesize_pf0                   : integer                       := 0;
		pf1_tph_cap_enable                         : string                        := "PF1_TPH_CAP_ENABLE_DISABLED";
		pf1_tph_req_cap_int_vec                    : string                        := "PF1_TPH_REQ_CAP_INT_VEC_DISABLED";
		pf1_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "PF1_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED";
		pf1_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "PF1_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF";
		pf1_tph_req_cap_st_table_loc_1             : string                        := "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE";
		pf1_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF";
		pf1_tph_req_cap_st_table_size              : integer                       := 0;
		pf1_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
		pf1_tph_req_device_spec                    : string                        := "PF1_TPH_REQ_DEVICE_SPEC_DISABLED";
		pf1_tph_req_device_spec_vfcomm_cs2         : string                        := "PF1_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED";
		pf1_exvf_tph_cap_enable                    : string                        := "PF1_EXVF_TPH_CAP_ENABLE_DISABLED";
		exvf_tph_sttablelocation_pf1               : integer                       := 0;
		exvf_tph_sttablesize_pf1                   : integer                       := 0;
		pf2_tph_cap_enable                         : string                        := "PF2_TPH_CAP_ENABLE_DISABLED";
		pf2_tph_req_cap_int_vec                    : string                        := "PF2_TPH_REQ_CAP_INT_VEC_DISABLED";
		pf2_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "PF2_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED";
		pf2_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "PF2_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF";
		pf2_tph_req_cap_st_table_loc_1             : string                        := "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE";
		pf2_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF";
		pf2_tph_req_cap_st_table_size              : integer                       := 0;
		pf2_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
		pf2_tph_req_device_spec                    : string                        := "PF2_TPH_REQ_DEVICE_SPEC_DISABLED";
		pf2_tph_req_device_spec_vfcomm_cs2         : string                        := "PF2_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED";
		pf2_exvf_tph_cap_enable                    : string                        := "PF2_EXVF_TPH_CAP_ENABLE_DISABLED";
		exvf_tph_sttablelocation_pf2               : integer                       := 0;
		exvf_tph_sttablesize_pf2                   : integer                       := 0;
		pf3_tph_cap_enable                         : string                        := "PF3_TPH_CAP_ENABLE_DISABLED";
		pf3_tph_req_cap_int_vec                    : string                        := "PF3_TPH_REQ_CAP_INT_VEC_DISABLED";
		pf3_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "PF3_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED";
		pf3_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "PF3_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF";
		pf3_tph_req_cap_st_table_loc_1             : string                        := "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE";
		pf3_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF";
		pf3_tph_req_cap_st_table_size              : integer                       := 0;
		pf3_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
		pf3_tph_req_device_spec                    : string                        := "PF3_TPH_REQ_DEVICE_SPEC_DISABLED";
		pf3_tph_req_device_spec_vfcomm_cs2         : string                        := "PF3_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED";
		pf3_exvf_tph_cap_enable                    : string                        := "PF3_EXVF_TPH_CAP_ENABLE_DISABLED";
		exvf_tph_sttablelocation_pf3               : integer                       := 0;
		exvf_tph_sttablesize_pf3                   : integer                       := 0;
		pf0_acs_cap_enable                         : string                        := "PF0_ACS_CAP_ENABLE_DISABLED";
		pf0_exvf_acs_cap_enable                    : string                        := "PF0_EXVF_ACS_CAP_ENABLE_DISABLED";
		pf0_acs_cap_acs_src_valid                  : string                        := "PF0_ACS_CAP_ACS_SRC_VALID_DISABLED";
		pf0_acs_cap_acs_at_block                   : string                        := "PF0_ACS_CAP_ACS_AT_BLOCK_DISABLED";
		pf0_acs_cap_acs_p2p_req_redirect           : string                        := "PF0_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED";
		pf0_acs_cap_acs_p2p_cpl_redirect           : string                        := "PF0_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED";
		pf0_acs_cap_acs_usp_forwarding             : string                        := "PF0_ACS_CAP_ACS_USP_FORWARDING_DISABLED";
		pf0_acs_cap_acs_p2p_egress_control         : string                        := "PF0_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED";
		pf0_acs_cap_acs_egress_ctrl_size           : integer                       := 8;
		pf0_acs_cap_acs_direct_translated_p2p      : string                        := "PF0_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED";
		pf1_acs_cap_enable                         : string                        := "PF1_ACS_CAP_ENABLE_DISABLED";
		pf1_exvf_acs_cap_enable                    : string                        := "PF1_EXVF_ACS_CAP_ENABLE_DISABLED";
		pf1_acs_cap_acs_src_valid                  : string                        := "PF1_ACS_CAP_ACS_SRC_VALID_DISABLED";
		pf1_acs_cap_acs_at_block                   : string                        := "PF1_ACS_CAP_ACS_AT_BLOCK_DISABLED";
		pf1_acs_cap_acs_p2p_req_redirect           : string                        := "PF1_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED";
		pf1_acs_cap_acs_p2p_cpl_redirect           : string                        := "PF1_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED";
		pf1_acs_cap_acs_usp_forwarding             : string                        := "PF1_ACS_CAP_ACS_USP_FORWARDING_DISABLED";
		pf1_acs_cap_acs_p2p_egress_control         : string                        := "PF1_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED";
		pf1_acs_cap_acs_egress_ctrl_size           : integer                       := 8;
		pf1_acs_cap_acs_direct_translated_p2p      : string                        := "PF1_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED";
		pf2_acs_cap_enable                         : string                        := "PF2_ACS_CAP_ENABLE_DISABLED";
		pf2_exvf_acs_cap_enable                    : string                        := "PF2_EXVF_ACS_CAP_ENABLE_DISABLED";
		pf2_acs_cap_acs_src_valid                  : string                        := "PF2_ACS_CAP_ACS_SRC_VALID_DISABLED";
		pf2_acs_cap_acs_at_block                   : string                        := "PF2_ACS_CAP_ACS_AT_BLOCK_DISABLED";
		pf2_acs_cap_acs_p2p_req_redirect           : string                        := "PF2_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED";
		pf2_acs_cap_acs_p2p_cpl_redirect           : string                        := "PF2_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED";
		pf2_acs_cap_acs_usp_forwarding             : string                        := "PF2_ACS_CAP_ACS_USP_FORWARDING_DISABLED";
		pf2_acs_cap_acs_p2p_egress_control         : string                        := "PF2_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED";
		pf2_acs_cap_acs_egress_ctrl_size           : integer                       := 8;
		pf2_acs_cap_acs_direct_translated_p2p      : string                        := "PF2_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED";
		pf3_acs_cap_enable                         : string                        := "PF3_ACS_CAP_ENABLE_DISABLED";
		pf3_exvf_acs_cap_enable                    : string                        := "PF3_EXVF_ACS_CAP_ENABLE_DISABLED";
		pf3_acs_cap_acs_src_valid                  : string                        := "PF3_ACS_CAP_ACS_SRC_VALID_DISABLED";
		pf3_acs_cap_acs_at_block                   : string                        := "PF3_ACS_CAP_ACS_AT_BLOCK_DISABLED";
		pf3_acs_cap_acs_p2p_req_redirect           : string                        := "PF3_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED";
		pf3_acs_cap_acs_p2p_cpl_redirect           : string                        := "PF3_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED";
		pf3_acs_cap_acs_usp_forwarding             : string                        := "PF3_ACS_CAP_ACS_USP_FORWARDING_DISABLED";
		pf3_acs_cap_acs_p2p_egress_control         : string                        := "PF3_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED";
		pf3_acs_cap_acs_egress_ctrl_size           : integer                       := 8;
		pf3_acs_cap_acs_direct_translated_p2p      : string                        := "PF3_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED";
		pf0_virtio_en                              : string                        := "PF0_VIRTIO_EN_DISABLED";
		pf1_virtio_en                              : string                        := "PF1_VIRTIO_EN_DISABLED";
		pf2_virtio_en                              : string                        := "PF2_VIRTIO_EN_DISABLED";
		pf3_virtio_en                              : string                        := "PF3_VIRTIO_EN_DISABLED";
		pf0_exvf_virtio_en                         : string                        := "PF0_EXVF_VIRTIO_EN_DISABLED";
		pf1_exvf_virtio_en                         : string                        := "PF1_EXVF_VIRTIO_EN_DISABLED";
		pf2_exvf_virtio_en                         : string                        := "PF2_EXVF_VIRTIO_EN_DISABLED";
		pf3_exvf_virtio_en                         : string                        := "PF3_EXVF_VIRTIO_EN_DISABLED";
		pf0_pci_type0_device_id                    : integer                       := 0;
		pf0_pci_type0_vendor_id                    : integer                       := 4466;
		pf0_revision_id                            : integer                       := 1;
		pf0_base_class_code                        : integer                       := 255;
		pf0_subclass_code                          : integer                       := 0;
		pf0_program_interface                      : integer                       := 0;
		pf0_subsys_vendor_id                       : integer                       := 0;
		pf0_subsys_dev_id                          : integer                       := 0;
		pf0_sriov_vf_device_id                     : integer                       := 0;
		exvf_subsysid_pf0                          : integer                       := 0;
		pf1_pci_type0_vendor_id                    : integer                       := 0;
		pf1_pci_type0_device_id                    : integer                       := 0;
		pf1_revision_id                            : integer                       := 0;
		pf1_base_class_code                        : integer                       := 0;
		pf1_subclass_code                          : integer                       := 0;
		pf1_program_interface                      : integer                       := 0;
		pf1_subsys_vendor_id                       : integer                       := 0;
		pf1_subsys_dev_id                          : integer                       := 0;
		pf1_sriov_vf_device_id                     : integer                       := 0;
		exvf_subsysid_pf1                          : integer                       := 0;
		pf2_pci_type0_vendor_id                    : integer                       := 0;
		pf2_pci_type0_device_id                    : integer                       := 0;
		pf2_revision_id                            : integer                       := 0;
		pf2_base_class_code                        : integer                       := 0;
		pf2_subclass_code                          : integer                       := 0;
		pf2_program_interface                      : integer                       := 0;
		pf2_subsys_vendor_id                       : integer                       := 0;
		pf2_subsys_dev_id                          : integer                       := 0;
		pf2_sriov_vf_device_id                     : integer                       := 0;
		exvf_subsysid_pf2                          : integer                       := 0;
		pf3_pci_type0_vendor_id                    : integer                       := 0;
		pf3_pci_type0_device_id                    : integer                       := 0;
		pf3_revision_id                            : integer                       := 0;
		pf3_base_class_code                        : integer                       := 0;
		pf3_subclass_code                          : integer                       := 0;
		pf3_program_interface                      : integer                       := 0;
		pf3_subsys_vendor_id                       : integer                       := 0;
		pf3_subsys_dev_id                          : integer                       := 0;
		pf3_sriov_vf_device_id                     : integer                       := 0;
		exvf_subsysid_pf3                          : integer                       := 0;
		vsec_select                                : string                        := "false";
		pf0_user_vsec_cap_enable                   : string                        := "PF0_USER_VSEC_CAP_ENABLE_DISABLED";
		pf1_user_vsec_cap_enable                   : string                        := "PF1_USER_VSEC_CAP_ENABLE_DISABLED";
		pf2_user_vsec_cap_enable                   : string                        := "PF2_USER_VSEC_CAP_ENABLE_DISABLED";
		pf3_user_vsec_cap_enable                   : string                        := "PF3_USER_VSEC_CAP_ENABLE_DISABLED";
		vsec_next_offset                           : integer                       := 0;
		pf1_user_vsec_offset                       : integer                       := 0;
		pf2_user_vsec_offset                       : integer                       := 0;
		pf3_user_vsec_offset                       : integer                       := 0;
		cvp_vendor_specific_header_id              : integer                       := 0;
		drop_vendor0_msg                           : string                        := "FALSE";
		drop_vendor1_msg                           : string                        := "FALSE";
		num_of_lanes                               : string                        := "NUM_OF_LANES_NUM_4";
		pf0_int_pin                                : string                        := "PF0_INT_PIN_NO_INT";
		pf1_int_pin                                : string                        := "PF1_INT_PIN_NO_INT";
		pf2_int_pin                                : string                        := "PF2_INT_PIN_NO_INT";
		pf3_int_pin                                : string                        := "PF3_INT_PIN_NO_INT";
		dtk_mode_en                                : string                        := "DTK_MODE_EN_ENABLE";
		ecrc_strip                                 : string                        := "ECRC_STRIP_ENABLE";
		pf0_port_logic_fast_link_mode              : string                        := "PF0_PORT_LOGIC_FAST_LINK_MODE_DISABLE";
		pf0_prefetch_decode                        : string                        := "PF0_PREFETCH_DECODE_PREF32";
		sys_clk_hz                                 : std_logic_vector(31 downto 0) := "00010001111000011010001100000000";
		pclk_clk_hz                                : std_logic_vector(31 downto 0) := "00011101110011010110010100000000";
		pf0_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf0_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf1_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf2_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
		pf3_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000"
	);
	port (
		o_pcs0_pipe_rst_n                           : out std_logic;                                        -- phip_hal.o_pcs0_pipe_rst_n,                           Check User Guide for details
		i_rxpipe0_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe0_dirfeedback,                       Check User Guide for details
		i_rxpipe0_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe0_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe0_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe0_localfs,                           Check User Guide for details
		i_rxpipe0_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe0_locallf,                           Check User Guide for details
		i_rxpipe0_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe0_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe0_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe0_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe0_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe0_p2m_bus,                           Check User Guide for details
		i_rxpipe0_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe0_pclkchangeok,                      Check User Guide for details
		i_rxpipe0_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe0_phystatus,                         Check User Guide for details
		i_rxpipe0_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe0_rxdata,                            Check User Guide for details
		i_rxpipe0_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe0_rxdatak,                           Check User Guide for details
		i_rxpipe0_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe0_rxdatavalid,                       Check User Guide for details
		i_rxpipe0_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe0_rxelecidlea,                       Check User Guide for details
		i_rxpipe0_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe0_rxstandbystatus,                   Check User Guide for details
		i_rxpipe0_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe0_rxstartblock,                      Check User Guide for details
		i_rxpipe0_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe0_rxstatus,                          Check User Guide for details
		i_rxpipe0_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe0_rxsyncheader,                      Check User Guide for details
		i_rxpipe0_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe0_rxvalid,                           Check User Guide for details
		o_txpipe0_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe0_asyncpowerchangeack,               Check User Guide for details
		o_txpipe0_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe0_blockaligncontrol,                 Check User Guide for details
		o_txpipe0_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe0_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe0_dirchange                         : out std_logic;                                        --         .o_txpipe0_dirchange,                         Check User Guide for details
		o_txpipe0_ebuf_mode                         : out std_logic;                                        --         .o_txpipe0_ebuf_mode,                         Check User Guide for details
		o_txpipe0_encodedecodebypass                : out std_logic;                                        --         .o_txpipe0_encodedecodebypass,                Check User Guide for details
		o_txpipe0_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe0_fs,                                Check User Guide for details
		o_txpipe0_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe0_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe0_invalidrequest                    : out std_logic;                                        --         .o_txpipe0_invalidrequest,                    Check User Guide for details
		o_txpipe0_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe0_lf,                                Check User Guide for details
		o_txpipe0_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe0_localpresetindex,                  Check User Guide for details
		o_txpipe0_lowpin_nt                         : out std_logic;                                        --         .o_txpipe0_lowpin_nt,                         Check User Guide for details
		o_txpipe0_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe0_m2p_bus,                           Check User Guide for details
		o_txpipe0_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe0_pclk_rate,                         Check User Guide for details
		o_txpipe0_pclkchangeack                     : out std_logic;                                        --         .o_txpipe0_pclkchangeack,                     Check User Guide for details
		o_txpipe0_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe0_phy_mode_nt,                       Check User Guide for details
		o_txpipe0_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe0_powerdown,                         Check User Guide for details
		o_txpipe0_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe0_rate,                              Check User Guide for details
		o_txpipe0_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe0_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe0_rxeqclr                           : out std_logic;                                        --         .o_txpipe0_rxeqclr,                           Check User Guide for details
		o_txpipe0_rxeqeval                          : out std_logic;                                        --         .o_txpipe0_rxeqeval,                          Check User Guide for details
		o_txpipe0_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe0_rxeqinprogress,                    Check User Guide for details
		o_txpipe0_rxeqtraining                      : out std_logic;                                        --         .o_txpipe0_rxeqtraining,                      Check User Guide for details
		o_txpipe0_rxpolarity                        : out std_logic;                                        --         .o_txpipe0_rxpolarity,                        Check User Guide for details
		o_txpipe0_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe0_rxpresethint,                      Check User Guide for details
		o_txpipe0_rxstandby                         : out std_logic;                                        --         .o_txpipe0_rxstandby,                         Check User Guide for details
		o_txpipe0_rxtermination                     : out std_logic;                                        --         .o_txpipe0_rxtermination,                     Check User Guide for details
		o_txpipe0_srisenable                        : out std_logic;                                        --         .o_txpipe0_srisenable,                        Check User Guide for details
		o_txpipe0_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe0_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe0_txcompliance                      : out std_logic;                                        --         .o_txpipe0_txcompliance,                      Check User Guide for details
		o_txpipe0_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe0_txdata,                            Check User Guide for details
		o_txpipe0_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe0_txdatak,                           Check User Guide for details
		o_txpipe0_txdatavalid                       : out std_logic;                                        --         .o_txpipe0_txdatavalid,                       Check User Guide for details
		o_txpipe0_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe0_txdeemph,                          Check User Guide for details
		o_txpipe0_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe0_txdtctrx_lb,                       Check User Guide for details
		o_txpipe0_txelecidle                        : out std_logic;                                        --         .o_txpipe0_txelecidle,                        Check User Guide for details
		o_txpipe0_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe0_txmargin,                          Check User Guide for details
		o_txpipe0_txoneszeros                       : out std_logic;                                        --         .o_txpipe0_txoneszeros,                       Check User Guide for details
		o_txpipe0_txstartblock                      : out std_logic;                                        --         .o_txpipe0_txstartblock,                      Check User Guide for details
		o_txpipe0_txswing                           : out std_logic;                                        --         .o_txpipe0_txswing,                           Check User Guide for details
		o_txpipe0_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe0_txsyncheader,                      Check User Guide for details
		o_txpipe0_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe0_width,                             Check User Guide for details
		o_pcs1_pipe_rst_n                           : out std_logic;                                        --         .o_pcs1_pipe_rst_n,                           Check User Guide for details
		i_rxpipe1_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe1_dirfeedback,                       Check User Guide for details
		i_rxpipe1_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe1_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe1_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe1_localfs,                           Check User Guide for details
		i_rxpipe1_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe1_locallf,                           Check User Guide for details
		i_rxpipe1_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe1_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe1_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe1_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe1_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe1_p2m_bus,                           Check User Guide for details
		i_rxpipe1_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe1_pclkchangeok,                      Check User Guide for details
		i_rxpipe1_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe1_phystatus,                         Check User Guide for details
		i_rxpipe1_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe1_rxdata,                            Check User Guide for details
		i_rxpipe1_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe1_rxdatak,                           Check User Guide for details
		i_rxpipe1_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe1_rxdatavalid,                       Check User Guide for details
		i_rxpipe1_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe1_rxelecidlea,                       Check User Guide for details
		i_rxpipe1_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe1_rxstandbystatus,                   Check User Guide for details
		i_rxpipe1_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe1_rxstartblock,                      Check User Guide for details
		i_rxpipe1_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe1_rxstatus,                          Check User Guide for details
		i_rxpipe1_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe1_rxsyncheader,                      Check User Guide for details
		i_rxpipe1_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe1_rxvalid,                           Check User Guide for details
		o_txpipe1_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe1_asyncpowerchangeack,               Check User Guide for details
		o_txpipe1_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe1_blockaligncontrol,                 Check User Guide for details
		o_txpipe1_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe1_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe1_dirchange                         : out std_logic;                                        --         .o_txpipe1_dirchange,                         Check User Guide for details
		o_txpipe1_ebuf_mode                         : out std_logic;                                        --         .o_txpipe1_ebuf_mode,                         Check User Guide for details
		o_txpipe1_encodedecodebypass                : out std_logic;                                        --         .o_txpipe1_encodedecodebypass,                Check User Guide for details
		o_txpipe1_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe1_fs,                                Check User Guide for details
		o_txpipe1_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe1_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe1_invalidrequest                    : out std_logic;                                        --         .o_txpipe1_invalidrequest,                    Check User Guide for details
		o_txpipe1_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe1_lf,                                Check User Guide for details
		o_txpipe1_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe1_localpresetindex,                  Check User Guide for details
		o_txpipe1_lowpin_nt                         : out std_logic;                                        --         .o_txpipe1_lowpin_nt,                         Check User Guide for details
		o_txpipe1_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe1_m2p_bus,                           Check User Guide for details
		o_txpipe1_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe1_pclk_rate,                         Check User Guide for details
		o_txpipe1_pclkchangeack                     : out std_logic;                                        --         .o_txpipe1_pclkchangeack,                     Check User Guide for details
		o_txpipe1_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe1_phy_mode_nt,                       Check User Guide for details
		o_txpipe1_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe1_powerdown,                         Check User Guide for details
		o_txpipe1_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe1_rate,                              Check User Guide for details
		o_txpipe1_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe1_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe1_rxeqclr                           : out std_logic;                                        --         .o_txpipe1_rxeqclr,                           Check User Guide for details
		o_txpipe1_rxeqeval                          : out std_logic;                                        --         .o_txpipe1_rxeqeval,                          Check User Guide for details
		o_txpipe1_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe1_rxeqinprogress,                    Check User Guide for details
		o_txpipe1_rxeqtraining                      : out std_logic;                                        --         .o_txpipe1_rxeqtraining,                      Check User Guide for details
		o_txpipe1_rxpolarity                        : out std_logic;                                        --         .o_txpipe1_rxpolarity,                        Check User Guide for details
		o_txpipe1_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe1_rxpresethint,                      Check User Guide for details
		o_txpipe1_rxstandby                         : out std_logic;                                        --         .o_txpipe1_rxstandby,                         Check User Guide for details
		o_txpipe1_rxtermination                     : out std_logic;                                        --         .o_txpipe1_rxtermination,                     Check User Guide for details
		o_txpipe1_srisenable                        : out std_logic;                                        --         .o_txpipe1_srisenable,                        Check User Guide for details
		o_txpipe1_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe1_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe1_txcompliance                      : out std_logic;                                        --         .o_txpipe1_txcompliance,                      Check User Guide for details
		o_txpipe1_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe1_txdata,                            Check User Guide for details
		o_txpipe1_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe1_txdatak,                           Check User Guide for details
		o_txpipe1_txdatavalid                       : out std_logic;                                        --         .o_txpipe1_txdatavalid,                       Check User Guide for details
		o_txpipe1_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe1_txdeemph,                          Check User Guide for details
		o_txpipe1_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe1_txdtctrx_lb,                       Check User Guide for details
		o_txpipe1_txelecidle                        : out std_logic;                                        --         .o_txpipe1_txelecidle,                        Check User Guide for details
		o_txpipe1_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe1_txmargin,                          Check User Guide for details
		o_txpipe1_txoneszeros                       : out std_logic;                                        --         .o_txpipe1_txoneszeros,                       Check User Guide for details
		o_txpipe1_txstartblock                      : out std_logic;                                        --         .o_txpipe1_txstartblock,                      Check User Guide for details
		o_txpipe1_txswing                           : out std_logic;                                        --         .o_txpipe1_txswing,                           Check User Guide for details
		o_txpipe1_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe1_txsyncheader,                      Check User Guide for details
		o_txpipe1_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe1_width,                             Check User Guide for details
		o_pcs2_pipe_rst_n                           : out std_logic;                                        --         .o_pcs2_pipe_rst_n,                           Check User Guide for details
		i_rxpipe2_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe2_dirfeedback,                       Check User Guide for details
		i_rxpipe2_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe2_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe2_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe2_localfs,                           Check User Guide for details
		i_rxpipe2_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe2_locallf,                           Check User Guide for details
		i_rxpipe2_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe2_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe2_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe2_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe2_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe2_p2m_bus,                           Check User Guide for details
		i_rxpipe2_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe2_pclkchangeok,                      Check User Guide for details
		i_rxpipe2_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe2_phystatus,                         Check User Guide for details
		i_rxpipe2_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe2_rxdata,                            Check User Guide for details
		i_rxpipe2_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe2_rxdatak,                           Check User Guide for details
		i_rxpipe2_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe2_rxdatavalid,                       Check User Guide for details
		i_rxpipe2_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe2_rxelecidlea,                       Check User Guide for details
		i_rxpipe2_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe2_rxstandbystatus,                   Check User Guide for details
		i_rxpipe2_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe2_rxstartblock,                      Check User Guide for details
		i_rxpipe2_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe2_rxstatus,                          Check User Guide for details
		i_rxpipe2_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe2_rxsyncheader,                      Check User Guide for details
		i_rxpipe2_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe2_rxvalid,                           Check User Guide for details
		o_txpipe2_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe2_asyncpowerchangeack,               Check User Guide for details
		o_txpipe2_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe2_blockaligncontrol,                 Check User Guide for details
		o_txpipe2_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe2_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe2_dirchange                         : out std_logic;                                        --         .o_txpipe2_dirchange,                         Check User Guide for details
		o_txpipe2_ebuf_mode                         : out std_logic;                                        --         .o_txpipe2_ebuf_mode,                         Check User Guide for details
		o_txpipe2_encodedecodebypass                : out std_logic;                                        --         .o_txpipe2_encodedecodebypass,                Check User Guide for details
		o_txpipe2_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe2_fs,                                Check User Guide for details
		o_txpipe2_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe2_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe2_invalidrequest                    : out std_logic;                                        --         .o_txpipe2_invalidrequest,                    Check User Guide for details
		o_txpipe2_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe2_lf,                                Check User Guide for details
		o_txpipe2_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe2_localpresetindex,                  Check User Guide for details
		o_txpipe2_lowpin_nt                         : out std_logic;                                        --         .o_txpipe2_lowpin_nt,                         Check User Guide for details
		o_txpipe2_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe2_m2p_bus,                           Check User Guide for details
		o_txpipe2_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe2_pclk_rate,                         Check User Guide for details
		o_txpipe2_pclkchangeack                     : out std_logic;                                        --         .o_txpipe2_pclkchangeack,                     Check User Guide for details
		o_txpipe2_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe2_phy_mode_nt,                       Check User Guide for details
		o_txpipe2_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe2_powerdown,                         Check User Guide for details
		o_txpipe2_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe2_rate,                              Check User Guide for details
		o_txpipe2_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe2_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe2_rxeqclr                           : out std_logic;                                        --         .o_txpipe2_rxeqclr,                           Check User Guide for details
		o_txpipe2_rxeqeval                          : out std_logic;                                        --         .o_txpipe2_rxeqeval,                          Check User Guide for details
		o_txpipe2_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe2_rxeqinprogress,                    Check User Guide for details
		o_txpipe2_rxeqtraining                      : out std_logic;                                        --         .o_txpipe2_rxeqtraining,                      Check User Guide for details
		o_txpipe2_rxpolarity                        : out std_logic;                                        --         .o_txpipe2_rxpolarity,                        Check User Guide for details
		o_txpipe2_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe2_rxpresethint,                      Check User Guide for details
		o_txpipe2_rxstandby                         : out std_logic;                                        --         .o_txpipe2_rxstandby,                         Check User Guide for details
		o_txpipe2_rxtermination                     : out std_logic;                                        --         .o_txpipe2_rxtermination,                     Check User Guide for details
		o_txpipe2_srisenable                        : out std_logic;                                        --         .o_txpipe2_srisenable,                        Check User Guide for details
		o_txpipe2_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe2_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe2_txcompliance                      : out std_logic;                                        --         .o_txpipe2_txcompliance,                      Check User Guide for details
		o_txpipe2_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe2_txdata,                            Check User Guide for details
		o_txpipe2_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe2_txdatak,                           Check User Guide for details
		o_txpipe2_txdatavalid                       : out std_logic;                                        --         .o_txpipe2_txdatavalid,                       Check User Guide for details
		o_txpipe2_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe2_txdeemph,                          Check User Guide for details
		o_txpipe2_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe2_txdtctrx_lb,                       Check User Guide for details
		o_txpipe2_txelecidle                        : out std_logic;                                        --         .o_txpipe2_txelecidle,                        Check User Guide for details
		o_txpipe2_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe2_txmargin,                          Check User Guide for details
		o_txpipe2_txoneszeros                       : out std_logic;                                        --         .o_txpipe2_txoneszeros,                       Check User Guide for details
		o_txpipe2_txstartblock                      : out std_logic;                                        --         .o_txpipe2_txstartblock,                      Check User Guide for details
		o_txpipe2_txswing                           : out std_logic;                                        --         .o_txpipe2_txswing,                           Check User Guide for details
		o_txpipe2_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe2_txsyncheader,                      Check User Guide for details
		o_txpipe2_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe2_width,                             Check User Guide for details
		o_pcs3_pipe_rst_n                           : out std_logic;                                        --         .o_pcs3_pipe_rst_n,                           Check User Guide for details
		i_rxpipe3_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe3_dirfeedback,                       Check User Guide for details
		i_rxpipe3_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe3_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe3_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe3_localfs,                           Check User Guide for details
		i_rxpipe3_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe3_locallf,                           Check User Guide for details
		i_rxpipe3_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe3_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe3_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe3_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe3_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe3_p2m_bus,                           Check User Guide for details
		i_rxpipe3_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe3_pclkchangeok,                      Check User Guide for details
		i_rxpipe3_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe3_phystatus,                         Check User Guide for details
		i_rxpipe3_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe3_rxdata,                            Check User Guide for details
		i_rxpipe3_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe3_rxdatak,                           Check User Guide for details
		i_rxpipe3_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe3_rxdatavalid,                       Check User Guide for details
		i_rxpipe3_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe3_rxelecidlea,                       Check User Guide for details
		i_rxpipe3_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe3_rxstandbystatus,                   Check User Guide for details
		i_rxpipe3_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe3_rxstartblock,                      Check User Guide for details
		i_rxpipe3_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe3_rxstatus,                          Check User Guide for details
		i_rxpipe3_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe3_rxsyncheader,                      Check User Guide for details
		i_rxpipe3_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe3_rxvalid,                           Check User Guide for details
		o_txpipe3_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe3_asyncpowerchangeack,               Check User Guide for details
		o_txpipe3_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe3_blockaligncontrol,                 Check User Guide for details
		o_txpipe3_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe3_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe3_dirchange                         : out std_logic;                                        --         .o_txpipe3_dirchange,                         Check User Guide for details
		o_txpipe3_ebuf_mode                         : out std_logic;                                        --         .o_txpipe3_ebuf_mode,                         Check User Guide for details
		o_txpipe3_encodedecodebypass                : out std_logic;                                        --         .o_txpipe3_encodedecodebypass,                Check User Guide for details
		o_txpipe3_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe3_fs,                                Check User Guide for details
		o_txpipe3_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe3_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe3_invalidrequest                    : out std_logic;                                        --         .o_txpipe3_invalidrequest,                    Check User Guide for details
		o_txpipe3_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe3_lf,                                Check User Guide for details
		o_txpipe3_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe3_localpresetindex,                  Check User Guide for details
		o_txpipe3_lowpin_nt                         : out std_logic;                                        --         .o_txpipe3_lowpin_nt,                         Check User Guide for details
		o_txpipe3_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe3_m2p_bus,                           Check User Guide for details
		o_txpipe3_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe3_pclk_rate,                         Check User Guide for details
		o_txpipe3_pclkchangeack                     : out std_logic;                                        --         .o_txpipe3_pclkchangeack,                     Check User Guide for details
		o_txpipe3_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe3_phy_mode_nt,                       Check User Guide for details
		o_txpipe3_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe3_powerdown,                         Check User Guide for details
		o_txpipe3_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe3_rate,                              Check User Guide for details
		o_txpipe3_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe3_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe3_rxeqclr                           : out std_logic;                                        --         .o_txpipe3_rxeqclr,                           Check User Guide for details
		o_txpipe3_rxeqeval                          : out std_logic;                                        --         .o_txpipe3_rxeqeval,                          Check User Guide for details
		o_txpipe3_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe3_rxeqinprogress,                    Check User Guide for details
		o_txpipe3_rxeqtraining                      : out std_logic;                                        --         .o_txpipe3_rxeqtraining,                      Check User Guide for details
		o_txpipe3_rxpolarity                        : out std_logic;                                        --         .o_txpipe3_rxpolarity,                        Check User Guide for details
		o_txpipe3_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe3_rxpresethint,                      Check User Guide for details
		o_txpipe3_rxstandby                         : out std_logic;                                        --         .o_txpipe3_rxstandby,                         Check User Guide for details
		o_txpipe3_rxtermination                     : out std_logic;                                        --         .o_txpipe3_rxtermination,                     Check User Guide for details
		o_txpipe3_srisenable                        : out std_logic;                                        --         .o_txpipe3_srisenable,                        Check User Guide for details
		o_txpipe3_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe3_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe3_txcompliance                      : out std_logic;                                        --         .o_txpipe3_txcompliance,                      Check User Guide for details
		o_txpipe3_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe3_txdata,                            Check User Guide for details
		o_txpipe3_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe3_txdatak,                           Check User Guide for details
		o_txpipe3_txdatavalid                       : out std_logic;                                        --         .o_txpipe3_txdatavalid,                       Check User Guide for details
		o_txpipe3_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe3_txdeemph,                          Check User Guide for details
		o_txpipe3_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe3_txdtctrx_lb,                       Check User Guide for details
		o_txpipe3_txelecidle                        : out std_logic;                                        --         .o_txpipe3_txelecidle,                        Check User Guide for details
		o_txpipe3_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe3_txmargin,                          Check User Guide for details
		o_txpipe3_txoneszeros                       : out std_logic;                                        --         .o_txpipe3_txoneszeros,                       Check User Guide for details
		o_txpipe3_txstartblock                      : out std_logic;                                        --         .o_txpipe3_txstartblock,                      Check User Guide for details
		o_txpipe3_txswing                           : out std_logic;                                        --         .o_txpipe3_txswing,                           Check User Guide for details
		o_txpipe3_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe3_txsyncheader,                      Check User Guide for details
		o_txpipe3_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe3_width,                             Check User Guide for details
		o_pcs4_pipe_rst_n                           : out std_logic;                                        --         .o_pcs4_pipe_rst_n,                           Check User Guide for details
		i_rxpipe4_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe4_dirfeedback,                       Check User Guide for details
		i_rxpipe4_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe4_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe4_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe4_localfs,                           Check User Guide for details
		i_rxpipe4_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe4_locallf,                           Check User Guide for details
		i_rxpipe4_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe4_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe4_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe4_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe4_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe4_p2m_bus,                           Check User Guide for details
		i_rxpipe4_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe4_pclkchangeok,                      Check User Guide for details
		i_rxpipe4_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe4_phystatus,                         Check User Guide for details
		i_rxpipe4_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe4_rxdata,                            Check User Guide for details
		i_rxpipe4_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe4_rxdatak,                           Check User Guide for details
		i_rxpipe4_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe4_rxdatavalid,                       Check User Guide for details
		i_rxpipe4_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe4_rxelecidlea,                       Check User Guide for details
		i_rxpipe4_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe4_rxstandbystatus,                   Check User Guide for details
		i_rxpipe4_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe4_rxstartblock,                      Check User Guide for details
		i_rxpipe4_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe4_rxstatus,                          Check User Guide for details
		i_rxpipe4_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe4_rxsyncheader,                      Check User Guide for details
		i_rxpipe4_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe4_rxvalid,                           Check User Guide for details
		o_txpipe4_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe4_asyncpowerchangeack,               Check User Guide for details
		o_txpipe4_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe4_blockaligncontrol,                 Check User Guide for details
		o_txpipe4_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe4_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe4_dirchange                         : out std_logic;                                        --         .o_txpipe4_dirchange,                         Check User Guide for details
		o_txpipe4_ebuf_mode                         : out std_logic;                                        --         .o_txpipe4_ebuf_mode,                         Check User Guide for details
		o_txpipe4_encodedecodebypass                : out std_logic;                                        --         .o_txpipe4_encodedecodebypass,                Check User Guide for details
		o_txpipe4_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe4_fs,                                Check User Guide for details
		o_txpipe4_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe4_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe4_invalidrequest                    : out std_logic;                                        --         .o_txpipe4_invalidrequest,                    Check User Guide for details
		o_txpipe4_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe4_lf,                                Check User Guide for details
		o_txpipe4_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe4_localpresetindex,                  Check User Guide for details
		o_txpipe4_lowpin_nt                         : out std_logic;                                        --         .o_txpipe4_lowpin_nt,                         Check User Guide for details
		o_txpipe4_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe4_m2p_bus,                           Check User Guide for details
		o_txpipe4_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe4_pclk_rate,                         Check User Guide for details
		o_txpipe4_pclkchangeack                     : out std_logic;                                        --         .o_txpipe4_pclkchangeack,                     Check User Guide for details
		o_txpipe4_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe4_phy_mode_nt,                       Check User Guide for details
		o_txpipe4_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe4_powerdown,                         Check User Guide for details
		o_txpipe4_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe4_rate,                              Check User Guide for details
		o_txpipe4_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe4_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe4_rxeqclr                           : out std_logic;                                        --         .o_txpipe4_rxeqclr,                           Check User Guide for details
		o_txpipe4_rxeqeval                          : out std_logic;                                        --         .o_txpipe4_rxeqeval,                          Check User Guide for details
		o_txpipe4_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe4_rxeqinprogress,                    Check User Guide for details
		o_txpipe4_rxeqtraining                      : out std_logic;                                        --         .o_txpipe4_rxeqtraining,                      Check User Guide for details
		o_txpipe4_rxpolarity                        : out std_logic;                                        --         .o_txpipe4_rxpolarity,                        Check User Guide for details
		o_txpipe4_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe4_rxpresethint,                      Check User Guide for details
		o_txpipe4_rxstandby                         : out std_logic;                                        --         .o_txpipe4_rxstandby,                         Check User Guide for details
		o_txpipe4_rxtermination                     : out std_logic;                                        --         .o_txpipe4_rxtermination,                     Check User Guide for details
		o_txpipe4_srisenable                        : out std_logic;                                        --         .o_txpipe4_srisenable,                        Check User Guide for details
		o_txpipe4_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe4_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe4_txcompliance                      : out std_logic;                                        --         .o_txpipe4_txcompliance,                      Check User Guide for details
		o_txpipe4_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe4_txdata,                            Check User Guide for details
		o_txpipe4_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe4_txdatak,                           Check User Guide for details
		o_txpipe4_txdatavalid                       : out std_logic;                                        --         .o_txpipe4_txdatavalid,                       Check User Guide for details
		o_txpipe4_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe4_txdeemph,                          Check User Guide for details
		o_txpipe4_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe4_txdtctrx_lb,                       Check User Guide for details
		o_txpipe4_txelecidle                        : out std_logic;                                        --         .o_txpipe4_txelecidle,                        Check User Guide for details
		o_txpipe4_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe4_txmargin,                          Check User Guide for details
		o_txpipe4_txoneszeros                       : out std_logic;                                        --         .o_txpipe4_txoneszeros,                       Check User Guide for details
		o_txpipe4_txstartblock                      : out std_logic;                                        --         .o_txpipe4_txstartblock,                      Check User Guide for details
		o_txpipe4_txswing                           : out std_logic;                                        --         .o_txpipe4_txswing,                           Check User Guide for details
		o_txpipe4_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe4_txsyncheader,                      Check User Guide for details
		o_txpipe4_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe4_width,                             Check User Guide for details
		o_pcs5_pipe_rst_n                           : out std_logic;                                        --         .o_pcs5_pipe_rst_n,                           Check User Guide for details
		i_rxpipe5_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe5_dirfeedback,                       Check User Guide for details
		i_rxpipe5_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe5_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe5_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe5_localfs,                           Check User Guide for details
		i_rxpipe5_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe5_locallf,                           Check User Guide for details
		i_rxpipe5_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe5_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe5_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe5_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe5_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe5_p2m_bus,                           Check User Guide for details
		i_rxpipe5_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe5_pclkchangeok,                      Check User Guide for details
		i_rxpipe5_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe5_phystatus,                         Check User Guide for details
		i_rxpipe5_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe5_rxdata,                            Check User Guide for details
		i_rxpipe5_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe5_rxdatak,                           Check User Guide for details
		i_rxpipe5_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe5_rxdatavalid,                       Check User Guide for details
		i_rxpipe5_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe5_rxelecidlea,                       Check User Guide for details
		i_rxpipe5_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe5_rxstandbystatus,                   Check User Guide for details
		i_rxpipe5_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe5_rxstartblock,                      Check User Guide for details
		i_rxpipe5_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe5_rxstatus,                          Check User Guide for details
		i_rxpipe5_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe5_rxsyncheader,                      Check User Guide for details
		i_rxpipe5_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe5_rxvalid,                           Check User Guide for details
		o_txpipe5_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe5_asyncpowerchangeack,               Check User Guide for details
		o_txpipe5_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe5_blockaligncontrol,                 Check User Guide for details
		o_txpipe5_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe5_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe5_dirchange                         : out std_logic;                                        --         .o_txpipe5_dirchange,                         Check User Guide for details
		o_txpipe5_ebuf_mode                         : out std_logic;                                        --         .o_txpipe5_ebuf_mode,                         Check User Guide for details
		o_txpipe5_encodedecodebypass                : out std_logic;                                        --         .o_txpipe5_encodedecodebypass,                Check User Guide for details
		o_txpipe5_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe5_fs,                                Check User Guide for details
		o_txpipe5_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe5_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe5_invalidrequest                    : out std_logic;                                        --         .o_txpipe5_invalidrequest,                    Check User Guide for details
		o_txpipe5_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe5_lf,                                Check User Guide for details
		o_txpipe5_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe5_localpresetindex,                  Check User Guide for details
		o_txpipe5_lowpin_nt                         : out std_logic;                                        --         .o_txpipe5_lowpin_nt,                         Check User Guide for details
		o_txpipe5_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe5_m2p_bus,                           Check User Guide for details
		o_txpipe5_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe5_pclk_rate,                         Check User Guide for details
		o_txpipe5_pclkchangeack                     : out std_logic;                                        --         .o_txpipe5_pclkchangeack,                     Check User Guide for details
		o_txpipe5_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe5_phy_mode_nt,                       Check User Guide for details
		o_txpipe5_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe5_powerdown,                         Check User Guide for details
		o_txpipe5_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe5_rate,                              Check User Guide for details
		o_txpipe5_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe5_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe5_rxeqclr                           : out std_logic;                                        --         .o_txpipe5_rxeqclr,                           Check User Guide for details
		o_txpipe5_rxeqeval                          : out std_logic;                                        --         .o_txpipe5_rxeqeval,                          Check User Guide for details
		o_txpipe5_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe5_rxeqinprogress,                    Check User Guide for details
		o_txpipe5_rxeqtraining                      : out std_logic;                                        --         .o_txpipe5_rxeqtraining,                      Check User Guide for details
		o_txpipe5_rxpolarity                        : out std_logic;                                        --         .o_txpipe5_rxpolarity,                        Check User Guide for details
		o_txpipe5_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe5_rxpresethint,                      Check User Guide for details
		o_txpipe5_rxstandby                         : out std_logic;                                        --         .o_txpipe5_rxstandby,                         Check User Guide for details
		o_txpipe5_rxtermination                     : out std_logic;                                        --         .o_txpipe5_rxtermination,                     Check User Guide for details
		o_txpipe5_srisenable                        : out std_logic;                                        --         .o_txpipe5_srisenable,                        Check User Guide for details
		o_txpipe5_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe5_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe5_txcompliance                      : out std_logic;                                        --         .o_txpipe5_txcompliance,                      Check User Guide for details
		o_txpipe5_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe5_txdata,                            Check User Guide for details
		o_txpipe5_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe5_txdatak,                           Check User Guide for details
		o_txpipe5_txdatavalid                       : out std_logic;                                        --         .o_txpipe5_txdatavalid,                       Check User Guide for details
		o_txpipe5_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe5_txdeemph,                          Check User Guide for details
		o_txpipe5_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe5_txdtctrx_lb,                       Check User Guide for details
		o_txpipe5_txelecidle                        : out std_logic;                                        --         .o_txpipe5_txelecidle,                        Check User Guide for details
		o_txpipe5_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe5_txmargin,                          Check User Guide for details
		o_txpipe5_txoneszeros                       : out std_logic;                                        --         .o_txpipe5_txoneszeros,                       Check User Guide for details
		o_txpipe5_txstartblock                      : out std_logic;                                        --         .o_txpipe5_txstartblock,                      Check User Guide for details
		o_txpipe5_txswing                           : out std_logic;                                        --         .o_txpipe5_txswing,                           Check User Guide for details
		o_txpipe5_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe5_txsyncheader,                      Check User Guide for details
		o_txpipe5_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe5_width,                             Check User Guide for details
		o_pcs6_pipe_rst_n                           : out std_logic;                                        --         .o_pcs6_pipe_rst_n,                           Check User Guide for details
		i_rxpipe6_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe6_dirfeedback,                       Check User Guide for details
		i_rxpipe6_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe6_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe6_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe6_localfs,                           Check User Guide for details
		i_rxpipe6_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe6_locallf,                           Check User Guide for details
		i_rxpipe6_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe6_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe6_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe6_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe6_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe6_p2m_bus,                           Check User Guide for details
		i_rxpipe6_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe6_pclkchangeok,                      Check User Guide for details
		i_rxpipe6_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe6_phystatus,                         Check User Guide for details
		i_rxpipe6_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe6_rxdata,                            Check User Guide for details
		i_rxpipe6_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe6_rxdatak,                           Check User Guide for details
		i_rxpipe6_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe6_rxdatavalid,                       Check User Guide for details
		i_rxpipe6_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe6_rxelecidlea,                       Check User Guide for details
		i_rxpipe6_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe6_rxstandbystatus,                   Check User Guide for details
		i_rxpipe6_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe6_rxstartblock,                      Check User Guide for details
		i_rxpipe6_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe6_rxstatus,                          Check User Guide for details
		i_rxpipe6_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe6_rxsyncheader,                      Check User Guide for details
		i_rxpipe6_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe6_rxvalid,                           Check User Guide for details
		o_txpipe6_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe6_asyncpowerchangeack,               Check User Guide for details
		o_txpipe6_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe6_blockaligncontrol,                 Check User Guide for details
		o_txpipe6_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe6_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe6_dirchange                         : out std_logic;                                        --         .o_txpipe6_dirchange,                         Check User Guide for details
		o_txpipe6_ebuf_mode                         : out std_logic;                                        --         .o_txpipe6_ebuf_mode,                         Check User Guide for details
		o_txpipe6_encodedecodebypass                : out std_logic;                                        --         .o_txpipe6_encodedecodebypass,                Check User Guide for details
		o_txpipe6_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe6_fs,                                Check User Guide for details
		o_txpipe6_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe6_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe6_invalidrequest                    : out std_logic;                                        --         .o_txpipe6_invalidrequest,                    Check User Guide for details
		o_txpipe6_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe6_lf,                                Check User Guide for details
		o_txpipe6_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe6_localpresetindex,                  Check User Guide for details
		o_txpipe6_lowpin_nt                         : out std_logic;                                        --         .o_txpipe6_lowpin_nt,                         Check User Guide for details
		o_txpipe6_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe6_m2p_bus,                           Check User Guide for details
		o_txpipe6_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe6_pclk_rate,                         Check User Guide for details
		o_txpipe6_pclkchangeack                     : out std_logic;                                        --         .o_txpipe6_pclkchangeack,                     Check User Guide for details
		o_txpipe6_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe6_phy_mode_nt,                       Check User Guide for details
		o_txpipe6_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe6_powerdown,                         Check User Guide for details
		o_txpipe6_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe6_rate,                              Check User Guide for details
		o_txpipe6_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe6_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe6_rxeqclr                           : out std_logic;                                        --         .o_txpipe6_rxeqclr,                           Check User Guide for details
		o_txpipe6_rxeqeval                          : out std_logic;                                        --         .o_txpipe6_rxeqeval,                          Check User Guide for details
		o_txpipe6_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe6_rxeqinprogress,                    Check User Guide for details
		o_txpipe6_rxeqtraining                      : out std_logic;                                        --         .o_txpipe6_rxeqtraining,                      Check User Guide for details
		o_txpipe6_rxpolarity                        : out std_logic;                                        --         .o_txpipe6_rxpolarity,                        Check User Guide for details
		o_txpipe6_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe6_rxpresethint,                      Check User Guide for details
		o_txpipe6_rxstandby                         : out std_logic;                                        --         .o_txpipe6_rxstandby,                         Check User Guide for details
		o_txpipe6_rxtermination                     : out std_logic;                                        --         .o_txpipe6_rxtermination,                     Check User Guide for details
		o_txpipe6_srisenable                        : out std_logic;                                        --         .o_txpipe6_srisenable,                        Check User Guide for details
		o_txpipe6_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe6_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe6_txcompliance                      : out std_logic;                                        --         .o_txpipe6_txcompliance,                      Check User Guide for details
		o_txpipe6_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe6_txdata,                            Check User Guide for details
		o_txpipe6_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe6_txdatak,                           Check User Guide for details
		o_txpipe6_txdatavalid                       : out std_logic;                                        --         .o_txpipe6_txdatavalid,                       Check User Guide for details
		o_txpipe6_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe6_txdeemph,                          Check User Guide for details
		o_txpipe6_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe6_txdtctrx_lb,                       Check User Guide for details
		o_txpipe6_txelecidle                        : out std_logic;                                        --         .o_txpipe6_txelecidle,                        Check User Guide for details
		o_txpipe6_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe6_txmargin,                          Check User Guide for details
		o_txpipe6_txoneszeros                       : out std_logic;                                        --         .o_txpipe6_txoneszeros,                       Check User Guide for details
		o_txpipe6_txstartblock                      : out std_logic;                                        --         .o_txpipe6_txstartblock,                      Check User Guide for details
		o_txpipe6_txswing                           : out std_logic;                                        --         .o_txpipe6_txswing,                           Check User Guide for details
		o_txpipe6_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe6_txsyncheader,                      Check User Guide for details
		o_txpipe6_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe6_width,                             Check User Guide for details
		o_pcs7_pipe_rst_n                           : out std_logic;                                        --         .o_pcs7_pipe_rst_n,                           Check User Guide for details
		i_rxpipe7_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe7_dirfeedback,                       Check User Guide for details
		i_rxpipe7_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe7_linkevaluationfeedbackfiguremerit, Check User Guide for details
		i_rxpipe7_localfs                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe7_localfs,                           Check User Guide for details
		i_rxpipe7_locallf                           : in  std_logic_vector(5 downto 0)  := (others => '0'); --         .i_rxpipe7_locallf,                           Check User Guide for details
		i_rxpipe7_localtxcoefficientsvalid          : in  std_logic                     := '0';             --         .i_rxpipe7_localtxcoefficientsvalid,          Check User Guide for details
		i_rxpipe7_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => '0'); --         .i_rxpipe7_localtxpresetcoefficients,         Check User Guide for details
		i_rxpipe7_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_rxpipe7_p2m_bus,                           Check User Guide for details
		i_rxpipe7_pclkchangeok                      : in  std_logic                     := '0';             --         .i_rxpipe7_pclkchangeok,                      Check User Guide for details
		i_rxpipe7_phystatus                         : in  std_logic                     := '0';             --         .i_rxpipe7_phystatus,                         Check User Guide for details
		i_rxpipe7_rxdata                            : in  std_logic_vector(39 downto 0) := (others => '0'); --         .i_rxpipe7_rxdata,                            Check User Guide for details
		i_rxpipe7_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe7_rxdatak,                           Check User Guide for details
		i_rxpipe7_rxdatavalid                       : in  std_logic                     := '0';             --         .i_rxpipe7_rxdatavalid,                       Check User Guide for details
		i_rxpipe7_rxelecidlea                       : in  std_logic                     := '0';             --         .i_rxpipe7_rxelecidlea,                       Check User Guide for details
		i_rxpipe7_rxstandbystatus                   : in  std_logic                     := '0';             --         .i_rxpipe7_rxstandbystatus,                   Check User Guide for details
		i_rxpipe7_rxstartblock                      : in  std_logic                     := '0';             --         .i_rxpipe7_rxstartblock,                      Check User Guide for details
		i_rxpipe7_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => '0'); --         .i_rxpipe7_rxstatus,                          Check User Guide for details
		i_rxpipe7_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => '0'); --         .i_rxpipe7_rxsyncheader,                      Check User Guide for details
		i_rxpipe7_rxvalid                           : in  std_logic                     := '0';             --         .i_rxpipe7_rxvalid,                           Check User Guide for details
		o_txpipe7_asyncpowerchangeack               : out std_logic;                                        --         .o_txpipe7_asyncpowerchangeack,               Check User Guide for details
		o_txpipe7_blockaligncontrol                 : out std_logic;                                        --         .o_txpipe7_blockaligncontrol,                 Check User Guide for details
		o_txpipe7_cfg_hw_auto_sp_dis                : out std_logic;                                        --         .o_txpipe7_cfg_hw_auto_sp_dis,                Check User Guide for details
		o_txpipe7_dirchange                         : out std_logic;                                        --         .o_txpipe7_dirchange,                         Check User Guide for details
		o_txpipe7_ebuf_mode                         : out std_logic;                                        --         .o_txpipe7_ebuf_mode,                         Check User Guide for details
		o_txpipe7_encodedecodebypass                : out std_logic;                                        --         .o_txpipe7_encodedecodebypass,                Check User Guide for details
		o_txpipe7_fs                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe7_fs,                                Check User Guide for details
		o_txpipe7_getlocalpresetcoefficients        : out std_logic;                                        --         .o_txpipe7_getlocalpresetcoefficients,        Check User Guide for details
		o_txpipe7_invalidrequest                    : out std_logic;                                        --         .o_txpipe7_invalidrequest,                    Check User Guide for details
		o_txpipe7_lf                                : out std_logic_vector(5 downto 0);                     --         .o_txpipe7_lf,                                Check User Guide for details
		o_txpipe7_localpresetindex                  : out std_logic_vector(4 downto 0);                     --         .o_txpipe7_localpresetindex,                  Check User Guide for details
		o_txpipe7_lowpin_nt                         : out std_logic;                                        --         .o_txpipe7_lowpin_nt,                         Check User Guide for details
		o_txpipe7_m2p_bus                           : out std_logic_vector(7 downto 0);                     --         .o_txpipe7_m2p_bus,                           Check User Guide for details
		o_txpipe7_pclk_rate                         : out std_logic_vector(2 downto 0);                     --         .o_txpipe7_pclk_rate,                         Check User Guide for details
		o_txpipe7_pclkchangeack                     : out std_logic;                                        --         .o_txpipe7_pclkchangeack,                     Check User Guide for details
		o_txpipe7_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     --         .o_txpipe7_phy_mode_nt,                       Check User Guide for details
		o_txpipe7_powerdown                         : out std_logic_vector(3 downto 0);                     --         .o_txpipe7_powerdown,                         Check User Guide for details
		o_txpipe7_rate                              : out std_logic_vector(2 downto 0);                     --         .o_txpipe7_rate,                              Check User Guide for details
		o_txpipe7_rxelecidle_disable_a              : out std_logic;                                        --         .o_txpipe7_rxelecidle_disable_a,              Check User Guide for details
		o_txpipe7_rxeqclr                           : out std_logic;                                        --         .o_txpipe7_rxeqclr,                           Check User Guide for details
		o_txpipe7_rxeqeval                          : out std_logic;                                        --         .o_txpipe7_rxeqeval,                          Check User Guide for details
		o_txpipe7_rxeqinprogress                    : out std_logic;                                        --         .o_txpipe7_rxeqinprogress,                    Check User Guide for details
		o_txpipe7_rxeqtraining                      : out std_logic;                                        --         .o_txpipe7_rxeqtraining,                      Check User Guide for details
		o_txpipe7_rxpolarity                        : out std_logic;                                        --         .o_txpipe7_rxpolarity,                        Check User Guide for details
		o_txpipe7_rxpresethint                      : out std_logic_vector(2 downto 0);                     --         .o_txpipe7_rxpresethint,                      Check User Guide for details
		o_txpipe7_rxstandby                         : out std_logic;                                        --         .o_txpipe7_rxstandby,                         Check User Guide for details
		o_txpipe7_rxtermination                     : out std_logic;                                        --         .o_txpipe7_rxtermination,                     Check User Guide for details
		o_txpipe7_srisenable                        : out std_logic;                                        --         .o_txpipe7_srisenable,                        Check User Guide for details
		o_txpipe7_txcmnmode_disable_a               : out std_logic;                                        --         .o_txpipe7_txcmnmode_disable_a,               Check User Guide for details
		o_txpipe7_txcompliance                      : out std_logic;                                        --         .o_txpipe7_txcompliance,                      Check User Guide for details
		o_txpipe7_txdata                            : out std_logic_vector(39 downto 0);                    --         .o_txpipe7_txdata,                            Check User Guide for details
		o_txpipe7_txdatak                           : out std_logic_vector(3 downto 0);                     --         .o_txpipe7_txdatak,                           Check User Guide for details
		o_txpipe7_txdatavalid                       : out std_logic;                                        --         .o_txpipe7_txdatavalid,                       Check User Guide for details
		o_txpipe7_txdeemph                          : out std_logic_vector(17 downto 0);                    --         .o_txpipe7_txdeemph,                          Check User Guide for details
		o_txpipe7_txdtctrx_lb                       : out std_logic;                                        --         .o_txpipe7_txdtctrx_lb,                       Check User Guide for details
		o_txpipe7_txelecidle                        : out std_logic;                                        --         .o_txpipe7_txelecidle,                        Check User Guide for details
		o_txpipe7_txmargin                          : out std_logic_vector(2 downto 0);                     --         .o_txpipe7_txmargin,                          Check User Guide for details
		o_txpipe7_txoneszeros                       : out std_logic;                                        --         .o_txpipe7_txoneszeros,                       Check User Guide for details
		o_txpipe7_txstartblock                      : out std_logic;                                        --         .o_txpipe7_txstartblock,                      Check User Guide for details
		o_txpipe7_txswing                           : out std_logic;                                        --         .o_txpipe7_txswing,                           Check User Guide for details
		o_txpipe7_txsyncheader                      : out std_logic_vector(3 downto 0);                     --         .o_txpipe7_txsyncheader,                      Check User Guide for details
		o_txpipe7_width                             : out std_logic_vector(2 downto 0);                     --         .o_txpipe7_width,                             Check User Guide for details
		i_ch0_tx_data                               : in  std_logic_vector(79 downto 0) := (others => '0'); --         .i_ch0_tx_data,                               Check User Guide for details
		i_ch1_tx_data                               : in  std_logic_vector(79 downto 0) := (others => '0'); --         .i_ch1_tx_data,                               Check User Guide for details
		i_ch2_tx_data                               : in  std_logic_vector(79 downto 0) := (others => '0'); --         .i_ch2_tx_data,                               Check User Guide for details
		i_ch3_tx_data                               : in  std_logic_vector(79 downto 0) := (others => '0'); --         .i_ch3_tx_data,                               Check User Guide for details
		i_ch4_tx_data                               : in  std_logic_vector(79 downto 0) := (others => '0'); --         .i_ch4_tx_data,                               Check User Guide for details
		o_ch0_rx_data                               : out std_logic_vector(79 downto 0);                    --         .o_ch0_rx_data,                               Check User Guide for details
		o_ch1_rx_data                               : out std_logic_vector(79 downto 0);                    --         .o_ch1_rx_data,                               Check User Guide for details
		o_ch2_rx_data                               : out std_logic_vector(79 downto 0);                    --         .o_ch2_rx_data,                               Check User Guide for details
		o_ch3_rx_data                               : out std_logic_vector(79 downto 0);                    --         .o_ch3_rx_data,                               Check User Guide for details
		o_ch4_rx_data                               : out std_logic_vector(79 downto 0);                    --         .o_ch4_rx_data,                               Check User Guide for details
		i_ch0_rst_pld_clrhip                        : in  std_logic                     := '0';             --         .i_ch0_rst_pld_clrhip,                        Check User Guide for details
		i_ch0_rst_pld_clrpcs                        : in  std_logic                     := '0';             --         .i_ch0_rst_pld_clrpcs,                        Check User Guide for details
		i_ch0_rst_pld_perstn                        : in  std_logic                     := '0';             --         .i_ch0_rst_pld_perstn,                        Check User Guide for details
		i_ch0_pcie_ctrl_tx_async                    : in  std_logic_vector(87 downto 0) := (others => '0'); --         .i_ch0_pcie_ctrl_tx_async,                    Check User Guide for details
		i_ch0_pcie_ctrl_tx_direct                   : in  std_logic_vector(7 downto 0)  := (others => '0'); --         .i_ch0_pcie_ctrl_tx_direct,                   Check User Guide for details
		o_ch0_pcie_ctrl_rx_async                    : out std_logic_vector(87 downto 0);                    --         .o_ch0_pcie_ctrl_rx_async,                    Check User Guide for details
		o_ch0_pcie_ctrl_rx_direct                   : out std_logic_vector(7 downto 0);                     --         .o_ch0_pcie_ctrl_rx_direct,                   Check User Guide for details
		i_pld_pcie_clk                              : in  std_logic                     := '0';             --         .i_pld_pcie_clk,                              Check User Guide for details
		i_pcs0_pclk                                 : in  std_logic                     := '0';             --         .i_pcs0_pclk,                                 Check User Guide for details
		i_pin_perst_n                               : in  std_logic                     := '0';             --         .i_pin_perst_n,                               Check User Guide for details
		i_rst_ch0_flux0_cpi_cmn_busy                : in  std_logic                     := '0';             --         .i_rst_ch0_flux0_cpi_cmn_busy,                Check User Guide for details
		i_rst_ch1_flux0_cpi_cmn_busy                : in  std_logic                     := '0';             --         .i_rst_ch1_flux0_cpi_cmn_busy,                Check User Guide for details
		i_rst_ch2_flux0_cpi_cmn_busy                : in  std_logic                     := '0';             --         .i_rst_ch2_flux0_cpi_cmn_busy,                Check User Guide for details
		i_rst_ch3_flux0_cpi_cmn_busy                : in  std_logic                     := '0';             --         .i_rst_ch3_flux0_cpi_cmn_busy,                Check User Guide for details
		i_gbl_ctrl_syspll_locked                    : in  std_logic                     := '0'              --         .i_gbl_ctrl_syspll_locked,                    Check User Guide for details
	);
end entity gts_axi_streaming_pcie_hal_top_phip_hal_2100_dn3iuli;

architecture rtl of gts_axi_streaming_pcie_hal_top_phip_hal_2100_dn3iuli is
	component gts_axi_streaming_phip_hal_2100_lai7rjq_cmp is
		generic (
			pcie_parity_bypass                         : string                        := "";
			rxbuf_limit_bypass                         : integer                       := 0;
			maxpayload_size                            : string                        := "";
			pldclk_rate                                : string                        := "";
			port_type                                  : string                        := "";
			sris_enable                                : string                        := "";
			sris_mode                                  : string                        := "";
			sim_mode                                   : string                        := "";
			sup_mode                                   : string                        := "";
			cvp_enable                                 : string                        := "";
			cii_monitor_en                             : string                        := "";
			pf0_cap_link_surprise_down_err_cap         : string                        := "";
			link_rate                                  : string                        := "";
			link_width                                 : string                        := "";
			pf0_dsp_16g_tx_preset0                     : integer                       := 0;
			pf0_dsp_16g_tx_preset1                     : integer                       := 0;
			pf0_dsp_16g_tx_preset2                     : integer                       := 0;
			pf0_dsp_16g_tx_preset3                     : integer                       := 0;
			pf0_dsp_16g_tx_preset4                     : integer                       := 0;
			pf0_dsp_16g_tx_preset5                     : integer                       := 0;
			pf0_dsp_16g_tx_preset6                     : integer                       := 0;
			pf0_dsp_16g_tx_preset7                     : integer                       := 0;
			pf0_dsp_16g_tx_preset8                     : integer                       := 0;
			pf0_dsp_16g_tx_preset9                     : integer                       := 0;
			pf0_dsp_16g_tx_preset10                    : integer                       := 0;
			pf0_dsp_16g_tx_preset11                    : integer                       := 0;
			pf0_dsp_16g_tx_preset12                    : integer                       := 0;
			pf0_dsp_16g_tx_preset13                    : integer                       := 0;
			pf0_dsp_16g_tx_preset14                    : integer                       := 0;
			pf0_dsp_16g_tx_preset15                    : integer                       := 0;
			pf0_dsp_tx_preset0                         : integer                       := 0;
			pf0_dsp_tx_preset1                         : integer                       := 0;
			pf0_dsp_tx_preset2                         : integer                       := 0;
			pf0_dsp_tx_preset3                         : integer                       := 0;
			pf0_dsp_tx_preset4                         : integer                       := 0;
			pf0_dsp_tx_preset5                         : integer                       := 0;
			pf0_dsp_tx_preset6                         : integer                       := 0;
			pf0_dsp_tx_preset7                         : integer                       := 0;
			pf0_dsp_tx_preset8                         : integer                       := 0;
			pf0_dsp_tx_preset9                         : integer                       := 0;
			pf0_dsp_tx_preset10                        : integer                       := 0;
			pf0_dsp_tx_preset11                        : integer                       := 0;
			pf0_dsp_tx_preset12                        : integer                       := 0;
			pf0_dsp_tx_preset13                        : integer                       := 0;
			pf0_dsp_tx_preset14                        : integer                       := 0;
			pf0_dsp_tx_preset15                        : integer                       := 0;
			pf0_usp_16g_tx_preset0                     : integer                       := 0;
			pf0_usp_16g_tx_preset1                     : integer                       := 0;
			pf0_usp_16g_tx_preset2                     : integer                       := 0;
			pf0_usp_16g_tx_preset3                     : integer                       := 0;
			pf0_usp_16g_tx_preset4                     : integer                       := 0;
			pf0_usp_16g_tx_preset5                     : integer                       := 0;
			pf0_usp_16g_tx_preset6                     : integer                       := 0;
			pf0_usp_16g_tx_preset7                     : integer                       := 0;
			pf0_usp_16g_tx_preset8                     : integer                       := 0;
			pf0_usp_16g_tx_preset9                     : integer                       := 0;
			pf0_usp_16g_tx_preset10                    : integer                       := 0;
			pf0_usp_16g_tx_preset11                    : integer                       := 0;
			pf0_usp_16g_tx_preset12                    : integer                       := 0;
			pf0_usp_16g_tx_preset13                    : integer                       := 0;
			pf0_usp_16g_tx_preset14                    : integer                       := 0;
			pf0_usp_16g_tx_preset15                    : integer                       := 0;
			pf0_usp_tx_preset0                         : integer                       := 0;
			pf0_usp_tx_preset1                         : integer                       := 0;
			pf0_usp_tx_preset2                         : integer                       := 0;
			pf0_usp_tx_preset3                         : integer                       := 0;
			pf0_usp_tx_preset4                         : integer                       := 0;
			pf0_usp_tx_preset5                         : integer                       := 0;
			pf0_usp_tx_preset6                         : integer                       := 0;
			pf0_usp_tx_preset7                         : integer                       := 0;
			pf0_usp_tx_preset8                         : integer                       := 0;
			pf0_usp_tx_preset9                         : integer                       := 0;
			pf0_usp_tx_preset10                        : integer                       := 0;
			pf0_usp_tx_preset11                        : integer                       := 0;
			pf0_usp_tx_preset12                        : integer                       := 0;
			pf0_usp_tx_preset13                        : integer                       := 0;
			pf0_usp_tx_preset14                        : integer                       := 0;
			pf0_usp_tx_preset15                        : integer                       := 0;
			pf0_pci_type0_bar0_enabled                 : string                        := "";
			pf0_bar0_prefetch                          : string                        := "";
			pf0_bar0_type                              : string                        := "";
			pf0_pci_type0_bar1_enabled                 : string                        := "";
			pf0_bar1_prefetch                          : string                        := "";
			pf0_pci_type0_bar2_enabled                 : string                        := "";
			pf0_bar2_prefetch                          : string                        := "";
			pf0_bar2_type                              : string                        := "";
			pf0_pci_type0_bar3_enabled                 : string                        := "";
			pf0_bar3_prefetch                          : string                        := "";
			pf0_pci_type0_bar4_enabled                 : string                        := "";
			pf0_bar4_prefetch                          : string                        := "";
			pf0_bar4_type                              : string                        := "";
			pf0_pci_type0_bar5_enabled                 : string                        := "";
			pf0_bar5_prefetch                          : string                        := "";
			pf0_rom_bar_enable                         : string                        := "";
			pf0_rom_mask                               : integer                       := 0;
			pf0_rom_bar_enabled                        : string                        := "";
			pf0_rp_rom_bar_enabled                     : string                        := "";
			pf0_rp_rom_mask                            : integer                       := 0;
			pf0_sriov_vf_bar0_enabled                  : string                        := "";
			pf0_sriov_vf_bar0_prefetch                 : string                        := "";
			pf0_sriov_vf_bar0_type                     : string                        := "";
			pf0_sriov_vf_bar1_enabled                  : string                        := "";
			pf0_sriov_vf_bar1_prefetch                 : string                        := "";
			pf0_sriov_vf_bar2_enabled                  : string                        := "";
			pf0_sriov_vf_bar2_prefetch                 : string                        := "";
			pf0_sriov_vf_bar2_type                     : string                        := "";
			pf0_sriov_vf_bar3_enabled                  : string                        := "";
			pf0_sriov_vf_bar3_prefetch                 : string                        := "";
			pf0_sriov_vf_bar4_enabled                  : string                        := "";
			pf0_sriov_vf_bar4_prefetch                 : string                        := "";
			pf0_sriov_vf_bar4_type                     : string                        := "";
			pf0_sriov_vf_bar5_enabled                  : string                        := "";
			pf0_sriov_vf_bar5_prefetch                 : string                        := "";
			pf1_pci_type0_bar0_enabled                 : string                        := "";
			pf1_bar0_prefetch                          : string                        := "";
			pf1_bar0_type                              : string                        := "";
			pf1_pci_type0_bar1_enabled                 : string                        := "";
			pf1_bar1_prefetch                          : string                        := "";
			pf1_pci_type0_bar2_enabled                 : string                        := "";
			pf1_bar2_prefetch                          : string                        := "";
			pf1_bar2_type                              : string                        := "";
			pf1_pci_type0_bar3_enabled                 : string                        := "";
			pf1_bar3_prefetch                          : string                        := "";
			pf1_pci_type0_bar4_enabled                 : string                        := "";
			pf1_bar4_prefetch                          : string                        := "";
			pf1_bar4_type                              : string                        := "";
			pf1_pci_type0_bar5_enabled                 : string                        := "";
			pf1_bar5_prefetch                          : string                        := "";
			pf1_rom_bar_enable                         : string                        := "";
			pf1_rom_mask                               : integer                       := 0;
			pf1_rom_bar_enabled                        : string                        := "";
			pf1_sriov_vf_bar0_enabled                  : string                        := "";
			pf1_sriov_vf_bar0_prefetch                 : string                        := "";
			pf1_sriov_vf_bar0_type                     : string                        := "";
			pf1_sriov_vf_bar1_enabled                  : string                        := "";
			pf1_sriov_vf_bar1_prefetch                 : string                        := "";
			pf1_sriov_vf_bar2_enabled                  : string                        := "";
			pf1_sriov_vf_bar2_prefetch                 : string                        := "";
			pf1_sriov_vf_bar2_type                     : string                        := "";
			pf1_sriov_vf_bar3_enabled                  : string                        := "";
			pf1_sriov_vf_bar3_prefetch                 : string                        := "";
			pf1_sriov_vf_bar4_enabled                  : string                        := "";
			pf1_sriov_vf_bar4_prefetch                 : string                        := "";
			pf1_sriov_vf_bar4_type                     : string                        := "";
			pf1_sriov_vf_bar5_enabled                  : string                        := "";
			pf1_sriov_vf_bar5_prefetch                 : string                        := "";
			pf2_pci_type0_bar0_enabled                 : string                        := "";
			pf2_bar0_prefetch                          : string                        := "";
			pf2_bar0_type                              : string                        := "";
			pf2_pci_type0_bar1_enabled                 : string                        := "";
			pf2_bar1_prefetch                          : string                        := "";
			pf2_pci_type0_bar2_enabled                 : string                        := "";
			pf2_bar2_prefetch                          : string                        := "";
			pf2_bar2_type                              : string                        := "";
			pf2_pci_type0_bar3_enabled                 : string                        := "";
			pf2_bar3_prefetch                          : string                        := "";
			pf2_pci_type0_bar4_enabled                 : string                        := "";
			pf2_bar4_prefetch                          : string                        := "";
			pf2_bar4_type                              : string                        := "";
			pf2_pci_type0_bar5_enabled                 : string                        := "";
			pf2_bar5_prefetch                          : string                        := "";
			pf2_rom_bar_enable                         : string                        := "";
			pf2_rom_mask                               : integer                       := 0;
			pf2_rom_bar_enabled                        : string                        := "";
			pf2_sriov_vf_bar0_enabled                  : string                        := "";
			pf2_sriov_vf_bar0_prefetch                 : string                        := "";
			pf2_sriov_vf_bar0_type                     : string                        := "";
			pf2_sriov_vf_bar1_enabled                  : string                        := "";
			pf2_sriov_vf_bar1_prefetch                 : string                        := "";
			pf2_sriov_vf_bar2_enabled                  : string                        := "";
			pf2_sriov_vf_bar2_prefetch                 : string                        := "";
			pf2_sriov_vf_bar2_type                     : string                        := "";
			pf2_sriov_vf_bar3_enabled                  : string                        := "";
			pf2_sriov_vf_bar3_prefetch                 : string                        := "";
			pf2_sriov_vf_bar4_enabled                  : string                        := "";
			pf2_sriov_vf_bar4_prefetch                 : string                        := "";
			pf2_sriov_vf_bar4_type                     : string                        := "";
			pf2_sriov_vf_bar5_enabled                  : string                        := "";
			pf2_sriov_vf_bar5_prefetch                 : string                        := "";
			pf3_pci_type0_bar0_enabled                 : string                        := "";
			pf3_bar0_prefetch                          : string                        := "";
			pf3_bar0_type                              : string                        := "";
			pf3_pci_type0_bar1_enabled                 : string                        := "";
			pf3_bar1_prefetch                          : string                        := "";
			pf3_pci_type0_bar2_enabled                 : string                        := "";
			pf3_bar2_prefetch                          : string                        := "";
			pf3_bar2_type                              : string                        := "";
			pf3_pci_type0_bar3_enabled                 : string                        := "";
			pf3_bar3_prefetch                          : string                        := "";
			pf3_pci_type0_bar4_enabled                 : string                        := "";
			pf3_bar4_prefetch                          : string                        := "";
			pf3_bar4_type                              : string                        := "";
			pf3_pci_type0_bar5_enabled                 : string                        := "";
			pf3_bar5_prefetch                          : string                        := "";
			pf3_rom_bar_enable                         : string                        := "";
			pf3_rom_mask                               : integer                       := 0;
			pf3_rom_bar_enabled                        : string                        := "";
			pf3_sriov_vf_bar0_enabled                  : string                        := "";
			pf3_sriov_vf_bar0_prefetch                 : string                        := "";
			pf3_sriov_vf_bar0_type                     : string                        := "";
			pf3_sriov_vf_bar1_enabled                  : string                        := "";
			pf3_sriov_vf_bar1_prefetch                 : string                        := "";
			pf3_sriov_vf_bar2_enabled                  : string                        := "";
			pf3_sriov_vf_bar2_prefetch                 : string                        := "";
			pf3_sriov_vf_bar2_type                     : string                        := "";
			pf3_sriov_vf_bar3_enabled                  : string                        := "";
			pf3_sriov_vf_bar3_prefetch                 : string                        := "";
			pf3_sriov_vf_bar4_enabled                  : string                        := "";
			pf3_sriov_vf_bar4_prefetch                 : string                        := "";
			pf3_sriov_vf_bar4_type                     : string                        := "";
			pf3_sriov_vf_bar5_enabled                  : string                        := "";
			pf3_sriov_vf_bar5_prefetch                 : string                        := "";
			pf1_enable                                 : string                        := "";
			pf2_enable                                 : string                        := "";
			pf3_enable                                 : string                        := "";
			pf0_sriov_enable                           : string                        := "";
			pf1_sriov_enable                           : string                        := "";
			pf2_sriov_enable                           : string                        := "";
			pf3_sriov_enable                           : string                        := "";
			pf0_sriov_cap_sup_page_size                : integer                       := 0;
			pf1_sriov_cap_sup_page_size                : integer                       := 0;
			pf2_sriov_cap_sup_page_size                : integer                       := 0;
			pf3_sriov_cap_sup_page_size                : integer                       := 0;
			pf0_sriov_num_vf                           : integer                       := 0;
			pf1_sriov_num_vf                           : integer                       := 0;
			pf2_sriov_num_vf                           : integer                       := 0;
			pf3_sriov_num_vf                           : integer                       := 0;
			pf0_msi_enable                             : string                        := "";
			pf0_pci_msi_ext_data_cap                   : string                        := "";
			pf0_pci_msi_ext_data_en                    : string                        := "";
			pf0_pci_msi_64_bit_addr_cap                : string                        := "";
			pf0_pci_msi_multiple_msg_cap               : string                        := "";
			pf0_msix_enable                            : string                        := "";
			pf0_pci_msix_table_size                    : integer                       := 0;
			pf0_pci_msix_table_offset                  : integer                       := 0;
			pf0_pci_msix_bir                           : integer                       := 0;
			pf0_pci_msix_pba                           : integer                       := 0;
			pf0_pci_msix_pba_offset                    : integer                       := 0;
			pf0_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
			pf0_exvf_msix_cap_enable                   : string                        := "";
			exvf_msix_tablesize_pf0                    : integer                       := 0;
			exvf_msixtable_offset_pf0                  : integer                       := 0;
			exvf_msixtable_bir_pf0                     : integer                       := 0;
			exvf_msixpba_offset_pf0                    : integer                       := 0;
			exvf_msixpba_bir_pf0                       : integer                       := 0;
			pf1_msi_enable                             : string                        := "";
			pf1_pci_msi_ext_data_cap                   : string                        := "";
			pf1_pci_msi_ext_data_en                    : string                        := "";
			pf1_pci_msi_64_bit_addr_cap                : string                        := "";
			pf1_pci_msi_multiple_msg_cap               : string                        := "";
			pf1_msix_enable                            : string                        := "";
			pf1_pci_msix_table_size                    : integer                       := 0;
			pf1_pci_msix_table_offset                  : integer                       := 0;
			pf1_pci_msix_bir                           : integer                       := 0;
			pf1_pci_msix_pba                           : integer                       := 0;
			pf1_pci_msix_pba_offset                    : integer                       := 0;
			pf1_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
			pf1_exvf_msix_cap_enable                   : string                        := "";
			exvf_msix_tablesize_pf1                    : integer                       := 0;
			exvf_msixtable_offset_pf1                  : integer                       := 0;
			exvf_msixtable_bir_pf1                     : integer                       := 0;
			exvf_msixpba_offset_pf1                    : integer                       := 0;
			exvf_msixpba_bir_pf1                       : integer                       := 0;
			pf2_msi_enable                             : string                        := "";
			pf2_pci_msi_ext_data_cap                   : string                        := "";
			pf2_pci_msi_ext_data_en                    : string                        := "";
			pf2_pci_msi_64_bit_addr_cap                : string                        := "";
			pf2_pci_msi_multiple_msg_cap               : string                        := "";
			pf2_msix_enable                            : string                        := "";
			pf2_pci_msix_bir                           : integer                       := 0;
			pf2_pci_msix_pba                           : integer                       := 0;
			pf2_pci_msix_pba_offset                    : integer                       := 0;
			pf2_pci_msix_table_offset                  : integer                       := 0;
			pf2_pci_msix_table_size                    : integer                       := 0;
			pf2_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
			pf2_exvf_msix_cap_enable                   : string                        := "";
			exvf_msix_tablesize_pf2                    : integer                       := 0;
			exvf_msixtable_offset_pf2                  : integer                       := 0;
			exvf_msixtable_bir_pf2                     : integer                       := 0;
			exvf_msixpba_offset_pf2                    : integer                       := 0;
			exvf_msixpba_bir_pf2                       : integer                       := 0;
			pf3_msi_enable                             : string                        := "";
			pf3_pci_msi_ext_data_cap                   : string                        := "";
			pf3_pci_msi_ext_data_en                    : string                        := "";
			pf3_pci_msi_64_bit_addr_cap                : string                        := "";
			pf3_pci_msi_multiple_msg_cap               : string                        := "";
			pf3_msix_enable                            : string                        := "";
			pf3_pci_msix_bir                           : integer                       := 0;
			pf3_pci_msix_pba                           : integer                       := 0;
			pf3_pci_msix_pba_offset                    : integer                       := 0;
			pf3_pci_msix_table_offset                  : integer                       := 0;
			pf3_pci_msix_table_size                    : integer                       := 0;
			pf3_pci_msix_table_size_vfcomm_cs2         : integer                       := 0;
			pf3_exvf_msix_cap_enable                   : string                        := "";
			exvf_msix_tablesize_pf3                    : integer                       := 0;
			exvf_msixtable_offset_pf3                  : integer                       := 0;
			exvf_msixtable_bir_pf3                     : integer                       := 0;
			exvf_msixpba_offset_pf3                    : integer                       := 0;
			exvf_msixpba_bir_pf3                       : integer                       := 0;
			pf0_prs_ext_cap_enable                     : string                        := "";
			pf0_prs_ext_cap_outstanding_capacity       : integer                       := 0;
			pf1_prs_ext_cap_enable                     : string                        := "";
			pf1_prs_ext_cap_outstanding_capacity       : integer                       := 0;
			pf2_prs_ext_cap_enable                     : string                        := "";
			pf2_prs_ext_cap_outstanding_capacity       : integer                       := 0;
			pf3_prs_ext_cap_enable                     : string                        := "";
			pf3_prs_ext_cap_outstanding_capacity       : integer                       := 0;
			pf0_pasid_cap_enable                       : string                        := "";
			pf0_pasid_cap_execute_permission_supported : string                        := "";
			pf0_pasid_cap_max_pasid_width              : integer                       := 0;
			pf0_pasid_cap_privileged_mode_supported    : string                        := "";
			pf1_pasid_cap_enable                       : string                        := "";
			pf1_pasid_cap_execute_permission_supported : string                        := "";
			pf1_pasid_cap_max_pasid_width              : integer                       := 0;
			pf1_pasid_cap_privileged_mode_supported    : string                        := "";
			pf2_pasid_cap_enable                       : string                        := "";
			pf2_pasid_cap_execute_permission_supported : string                        := "";
			pf2_pasid_cap_max_pasid_width              : integer                       := 0;
			pf2_pasid_cap_privileged_mode_supported    : string                        := "";
			pf3_pasid_cap_enable                       : string                        := "";
			pf3_pasid_cap_execute_permission_supported : string                        := "";
			pf3_pasid_cap_max_pasid_width              : integer                       := 0;
			pf3_pasid_cap_privileged_mode_supported    : string                        := "";
			pf0_sn_cap_enable                          : string                        := "";
			pf1_sn_cap_enable                          : string                        := "";
			pf2_sn_cap_enable                          : string                        := "";
			pf3_sn_cap_enable                          : string                        := "";
			pf0_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
			pf0_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
			pf0_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
			pf0_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
			pf1_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
			pf1_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
			pf1_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
			pf1_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
			pf2_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
			pf2_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
			pf2_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
			pf2_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
			pf3_pcie_cap_ep_l0s_accpt_latency          : integer                       := 0;
			pf3_pcie_cap_ep_l1_accpt_latency           : integer                       := 0;
			pf3_pcie_cap_l0s_exit_latency_commclk_dis  : integer                       := 0;
			pf3_pcie_cap_l1_exit_latency_commclk_dis   : integer                       := 0;
			aspm_support                               : string                        := "";
			dbi_ro_wr_disable                          : string                        := "";
			pf0_gen3_eq_pset_req_vec                   : integer                       := 0;
			pf0_gen3_eq_pset_req_vec_atg4              : integer                       := 0;
			pf0_pcie_cap_flr_cap                       : string                        := "";
			pf1_pcie_cap_flr_cap                       : string                        := "";
			pf2_pcie_cap_flr_cap                       : string                        := "";
			pf3_pcie_cap_flr_cap                       : string                        := "";
			pf0_pcie_cap_port_num                      : integer                       := 0;
			pf1_pcie_cap_port_num                      : integer                       := 0;
			pf2_pcie_cap_port_num                      : integer                       := 0;
			pf3_pcie_cap_port_num                      : integer                       := 0;
			pf0_pcie_cap_slot_clk_config               : string                        := "";
			pf1_pcie_cap_slot_clk_config               : string                        := "";
			pf2_pcie_cap_slot_clk_config               : string                        := "";
			pf3_pcie_cap_slot_clk_config               : string                        := "";
			pf0_ltr_cap_enable                         : string                        := "";
			pf0_pcie_slot_imp                          : string                        := "";
			pf0_pcie_cap_slot_power_limit_scale        : integer                       := 0;
			pf0_pcie_cap_slot_power_limit_value        : integer                       := 0;
			pf0_pcie_cap_phy_slot_num                  : integer                       := 0;
			pf0_pcie_cap_hot_plug_capable              : string                        := "";
			pf0_pcie_cap_ext_tag_en                    : string                        := "";
			pf1_pcie_cap_ext_tag_en                    : string                        := "";
			pf2_pcie_cap_ext_tag_en                    : string                        := "";
			pf3_pcie_cap_ext_tag_en                    : string                        := "";
			cfg_ptm_auto_update_signal                 : string                        := "";
			ptm_autoupdate                             : string                        := "";
			ptm_enable                                 : string                        := "";
			pf0_ats_cap_enable                         : string                        := "";
			pf0_exvf_ats_cap_enable                    : string                        := "";
			pf0_ats_cap_invalidate_q_depth             : integer                       := 0;
			pf0_ats_exvf_align_request                 : string                        := "";
			pf1_ats_cap_enable                         : string                        := "";
			pf1_exvf_ats_cap_enable                    : string                        := "";
			pf1_ats_cap_invalidate_q_depth             : integer                       := 0;
			pf1_ats_exvf_align_request                 : string                        := "";
			pf2_ats_cap_enable                         : string                        := "";
			pf2_exvf_ats_cap_enable                    : string                        := "";
			pf2_ats_cap_invalidate_q_depth             : integer                       := 0;
			pf2_ats_exvf_align_request                 : string                        := "";
			pf3_ats_cap_enable                         : string                        := "";
			pf3_exvf_ats_cap_enable                    : string                        := "";
			pf3_ats_cap_invalidate_q_depth             : integer                       := 0;
			pf3_ats_exvf_align_request                 : string                        := "";
			pf0_tph_cap_enable                         : string                        := "";
			pf0_tph_req_cap_int_vec                    : string                        := "";
			pf0_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "";
			pf0_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "";
			pf0_tph_req_cap_st_table_loc_1             : string                        := "";
			pf0_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "";
			pf0_tph_req_cap_st_table_size              : integer                       := 0;
			pf0_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
			pf0_tph_req_device_spec                    : string                        := "";
			pf0_tph_req_device_spec_vfcomm_cs2         : string                        := "";
			pf0_exvf_tph_cap_enable                    : string                        := "";
			exvf_tph_sttablelocation_pf0               : integer                       := 0;
			exvf_tph_sttablesize_pf0                   : integer                       := 0;
			pf1_tph_cap_enable                         : string                        := "";
			pf1_tph_req_cap_int_vec                    : string                        := "";
			pf1_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "";
			pf1_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "";
			pf1_tph_req_cap_st_table_loc_1             : string                        := "";
			pf1_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "";
			pf1_tph_req_cap_st_table_size              : integer                       := 0;
			pf1_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
			pf1_tph_req_device_spec                    : string                        := "";
			pf1_tph_req_device_spec_vfcomm_cs2         : string                        := "";
			pf1_exvf_tph_cap_enable                    : string                        := "";
			exvf_tph_sttablelocation_pf1               : integer                       := 0;
			exvf_tph_sttablesize_pf1                   : integer                       := 0;
			pf2_tph_cap_enable                         : string                        := "";
			pf2_tph_req_cap_int_vec                    : string                        := "";
			pf2_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "";
			pf2_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "";
			pf2_tph_req_cap_st_table_loc_1             : string                        := "";
			pf2_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "";
			pf2_tph_req_cap_st_table_size              : integer                       := 0;
			pf2_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
			pf2_tph_req_device_spec                    : string                        := "";
			pf2_tph_req_device_spec_vfcomm_cs2         : string                        := "";
			pf2_exvf_tph_cap_enable                    : string                        := "";
			exvf_tph_sttablelocation_pf2               : integer                       := 0;
			exvf_tph_sttablesize_pf2                   : integer                       := 0;
			pf3_tph_cap_enable                         : string                        := "";
			pf3_tph_req_cap_int_vec                    : string                        := "";
			pf3_tph_req_cap_int_vec_vfcomm_cs2         : string                        := "";
			pf3_tph_req_cap_st_table_loc_0_vfcomm_cs2  : string                        := "";
			pf3_tph_req_cap_st_table_loc_1             : string                        := "";
			pf3_tph_req_cap_st_table_loc_1_vfcomm_cs2  : string                        := "";
			pf3_tph_req_cap_st_table_size              : integer                       := 0;
			pf3_tph_req_cap_st_table_size_vfcomm_cs2   : integer                       := 0;
			pf3_tph_req_device_spec                    : string                        := "";
			pf3_tph_req_device_spec_vfcomm_cs2         : string                        := "";
			pf3_exvf_tph_cap_enable                    : string                        := "";
			exvf_tph_sttablelocation_pf3               : integer                       := 0;
			exvf_tph_sttablesize_pf3                   : integer                       := 0;
			pf0_acs_cap_enable                         : string                        := "";
			pf0_exvf_acs_cap_enable                    : string                        := "";
			pf0_acs_cap_acs_src_valid                  : string                        := "";
			pf0_acs_cap_acs_at_block                   : string                        := "";
			pf0_acs_cap_acs_p2p_req_redirect           : string                        := "";
			pf0_acs_cap_acs_p2p_cpl_redirect           : string                        := "";
			pf0_acs_cap_acs_usp_forwarding             : string                        := "";
			pf0_acs_cap_acs_p2p_egress_control         : string                        := "";
			pf0_acs_cap_acs_egress_ctrl_size           : integer                       := 0;
			pf0_acs_cap_acs_direct_translated_p2p      : string                        := "";
			pf1_acs_cap_enable                         : string                        := "";
			pf1_exvf_acs_cap_enable                    : string                        := "";
			pf1_acs_cap_acs_src_valid                  : string                        := "";
			pf1_acs_cap_acs_at_block                   : string                        := "";
			pf1_acs_cap_acs_p2p_req_redirect           : string                        := "";
			pf1_acs_cap_acs_p2p_cpl_redirect           : string                        := "";
			pf1_acs_cap_acs_usp_forwarding             : string                        := "";
			pf1_acs_cap_acs_p2p_egress_control         : string                        := "";
			pf1_acs_cap_acs_egress_ctrl_size           : integer                       := 0;
			pf1_acs_cap_acs_direct_translated_p2p      : string                        := "";
			pf2_acs_cap_enable                         : string                        := "";
			pf2_exvf_acs_cap_enable                    : string                        := "";
			pf2_acs_cap_acs_src_valid                  : string                        := "";
			pf2_acs_cap_acs_at_block                   : string                        := "";
			pf2_acs_cap_acs_p2p_req_redirect           : string                        := "";
			pf2_acs_cap_acs_p2p_cpl_redirect           : string                        := "";
			pf2_acs_cap_acs_usp_forwarding             : string                        := "";
			pf2_acs_cap_acs_p2p_egress_control         : string                        := "";
			pf2_acs_cap_acs_egress_ctrl_size           : integer                       := 0;
			pf2_acs_cap_acs_direct_translated_p2p      : string                        := "";
			pf3_acs_cap_enable                         : string                        := "";
			pf3_exvf_acs_cap_enable                    : string                        := "";
			pf3_acs_cap_acs_src_valid                  : string                        := "";
			pf3_acs_cap_acs_at_block                   : string                        := "";
			pf3_acs_cap_acs_p2p_req_redirect           : string                        := "";
			pf3_acs_cap_acs_p2p_cpl_redirect           : string                        := "";
			pf3_acs_cap_acs_usp_forwarding             : string                        := "";
			pf3_acs_cap_acs_p2p_egress_control         : string                        := "";
			pf3_acs_cap_acs_egress_ctrl_size           : integer                       := 0;
			pf3_acs_cap_acs_direct_translated_p2p      : string                        := "";
			pf0_virtio_en                              : string                        := "";
			pf1_virtio_en                              : string                        := "";
			pf2_virtio_en                              : string                        := "";
			pf3_virtio_en                              : string                        := "";
			pf0_exvf_virtio_en                         : string                        := "";
			pf1_exvf_virtio_en                         : string                        := "";
			pf2_exvf_virtio_en                         : string                        := "";
			pf3_exvf_virtio_en                         : string                        := "";
			pf0_pci_type0_device_id                    : integer                       := 0;
			pf0_pci_type0_vendor_id                    : integer                       := 0;
			pf0_revision_id                            : integer                       := 0;
			pf0_base_class_code                        : integer                       := 0;
			pf0_subclass_code                          : integer                       := 0;
			pf0_program_interface                      : integer                       := 0;
			pf0_subsys_vendor_id                       : integer                       := 0;
			pf0_subsys_dev_id                          : integer                       := 0;
			pf0_sriov_vf_device_id                     : integer                       := 0;
			exvf_subsysid_pf0                          : integer                       := 0;
			pf1_pci_type0_vendor_id                    : integer                       := 0;
			pf1_pci_type0_device_id                    : integer                       := 0;
			pf1_revision_id                            : integer                       := 0;
			pf1_base_class_code                        : integer                       := 0;
			pf1_subclass_code                          : integer                       := 0;
			pf1_program_interface                      : integer                       := 0;
			pf1_subsys_vendor_id                       : integer                       := 0;
			pf1_subsys_dev_id                          : integer                       := 0;
			pf1_sriov_vf_device_id                     : integer                       := 0;
			exvf_subsysid_pf1                          : integer                       := 0;
			pf2_pci_type0_vendor_id                    : integer                       := 0;
			pf2_pci_type0_device_id                    : integer                       := 0;
			pf2_revision_id                            : integer                       := 0;
			pf2_base_class_code                        : integer                       := 0;
			pf2_subclass_code                          : integer                       := 0;
			pf2_program_interface                      : integer                       := 0;
			pf2_subsys_vendor_id                       : integer                       := 0;
			pf2_subsys_dev_id                          : integer                       := 0;
			pf2_sriov_vf_device_id                     : integer                       := 0;
			exvf_subsysid_pf2                          : integer                       := 0;
			pf3_pci_type0_vendor_id                    : integer                       := 0;
			pf3_pci_type0_device_id                    : integer                       := 0;
			pf3_revision_id                            : integer                       := 0;
			pf3_base_class_code                        : integer                       := 0;
			pf3_subclass_code                          : integer                       := 0;
			pf3_program_interface                      : integer                       := 0;
			pf3_subsys_vendor_id                       : integer                       := 0;
			pf3_subsys_dev_id                          : integer                       := 0;
			pf3_sriov_vf_device_id                     : integer                       := 0;
			exvf_subsysid_pf3                          : integer                       := 0;
			vsec_select                                : string                        := "";
			pf0_user_vsec_cap_enable                   : string                        := "";
			pf1_user_vsec_cap_enable                   : string                        := "";
			pf2_user_vsec_cap_enable                   : string                        := "";
			pf3_user_vsec_cap_enable                   : string                        := "";
			vsec_next_offset                           : integer                       := 0;
			pf1_user_vsec_offset                       : integer                       := 0;
			pf2_user_vsec_offset                       : integer                       := 0;
			pf3_user_vsec_offset                       : integer                       := 0;
			cvp_vendor_specific_header_id              : integer                       := 0;
			drop_vendor0_msg                           : string                        := "";
			drop_vendor1_msg                           : string                        := "";
			num_of_lanes                               : string                        := "";
			pf0_int_pin                                : string                        := "";
			pf1_int_pin                                : string                        := "";
			pf2_int_pin                                : string                        := "";
			pf3_int_pin                                : string                        := "";
			dtk_mode_en                                : string                        := "";
			ecrc_strip                                 : string                        := "";
			pf0_port_logic_fast_link_mode              : string                        := "";
			pf0_prefetch_decode                        : string                        := "";
			sys_clk_hz                                 : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pclk_clk_hz                                : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sn_ser_num_reg_1_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sn_ser_num_reg_2_dw                    : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar0_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar1_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar2_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar3_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar4_mask_31_1               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_pci_type0_bar5_mask_31_0               : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf0_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf1_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf2_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar0_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar1_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar2_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar3_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar4_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000";
			pf3_sriov_vf_bar5_mask                     : std_logic_vector(31 downto 0) := "00000000000000000000000000000000"
		);
		port (
			o_pcs0_pipe_rst_n                           : out std_logic;                                        -- o_pcs0_pipe_rst_n
			i_rxpipe0_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe0_dirfeedback
			i_rxpipe0_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe0_linkevaluationfeedbackfiguremerit
			i_rxpipe0_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe0_localfs
			i_rxpipe0_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe0_locallf
			i_rxpipe0_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe0_localtxcoefficientsvalid
			i_rxpipe0_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe0_localtxpresetcoefficients
			i_rxpipe0_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe0_p2m_bus
			i_rxpipe0_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe0_pclkchangeok
			i_rxpipe0_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe0_phystatus
			i_rxpipe0_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe0_rxdata
			i_rxpipe0_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe0_rxdatak
			i_rxpipe0_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe0_rxdatavalid
			i_rxpipe0_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe0_rxelecidlea
			i_rxpipe0_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe0_rxstandbystatus
			i_rxpipe0_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe0_rxstartblock
			i_rxpipe0_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe0_rxstatus
			i_rxpipe0_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe0_rxsyncheader
			i_rxpipe0_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe0_rxvalid
			o_txpipe0_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe0_asyncpowerchangeack
			o_txpipe0_blockaligncontrol                 : out std_logic;                                        -- o_txpipe0_blockaligncontrol
			o_txpipe0_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe0_cfg_hw_auto_sp_dis
			o_txpipe0_dirchange                         : out std_logic;                                        -- o_txpipe0_dirchange
			o_txpipe0_ebuf_mode                         : out std_logic;                                        -- o_txpipe0_ebuf_mode
			o_txpipe0_encodedecodebypass                : out std_logic;                                        -- o_txpipe0_encodedecodebypass
			o_txpipe0_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe0_fs
			o_txpipe0_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe0_getlocalpresetcoefficients
			o_txpipe0_invalidrequest                    : out std_logic;                                        -- o_txpipe0_invalidrequest
			o_txpipe0_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe0_lf
			o_txpipe0_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe0_localpresetindex
			o_txpipe0_lowpin_nt                         : out std_logic;                                        -- o_txpipe0_lowpin_nt
			o_txpipe0_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe0_m2p_bus
			o_txpipe0_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe0_pclk_rate
			o_txpipe0_pclkchangeack                     : out std_logic;                                        -- o_txpipe0_pclkchangeack
			o_txpipe0_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe0_phy_mode_nt
			o_txpipe0_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe0_powerdown
			o_txpipe0_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe0_rate
			o_txpipe0_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe0_rxelecidle_disable_a
			o_txpipe0_rxeqclr                           : out std_logic;                                        -- o_txpipe0_rxeqclr
			o_txpipe0_rxeqeval                          : out std_logic;                                        -- o_txpipe0_rxeqeval
			o_txpipe0_rxeqinprogress                    : out std_logic;                                        -- o_txpipe0_rxeqinprogress
			o_txpipe0_rxeqtraining                      : out std_logic;                                        -- o_txpipe0_rxeqtraining
			o_txpipe0_rxpolarity                        : out std_logic;                                        -- o_txpipe0_rxpolarity
			o_txpipe0_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe0_rxpresethint
			o_txpipe0_rxstandby                         : out std_logic;                                        -- o_txpipe0_rxstandby
			o_txpipe0_rxtermination                     : out std_logic;                                        -- o_txpipe0_rxtermination
			o_txpipe0_srisenable                        : out std_logic;                                        -- o_txpipe0_srisenable
			o_txpipe0_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe0_txcmnmode_disable_a
			o_txpipe0_txcompliance                      : out std_logic;                                        -- o_txpipe0_txcompliance
			o_txpipe0_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe0_txdata
			o_txpipe0_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe0_txdatak
			o_txpipe0_txdatavalid                       : out std_logic;                                        -- o_txpipe0_txdatavalid
			o_txpipe0_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe0_txdeemph
			o_txpipe0_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe0_txdtctrx_lb
			o_txpipe0_txelecidle                        : out std_logic;                                        -- o_txpipe0_txelecidle
			o_txpipe0_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe0_txmargin
			o_txpipe0_txoneszeros                       : out std_logic;                                        -- o_txpipe0_txoneszeros
			o_txpipe0_txstartblock                      : out std_logic;                                        -- o_txpipe0_txstartblock
			o_txpipe0_txswing                           : out std_logic;                                        -- o_txpipe0_txswing
			o_txpipe0_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe0_txsyncheader
			o_txpipe0_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe0_width
			o_pcs1_pipe_rst_n                           : out std_logic;                                        -- o_pcs1_pipe_rst_n
			i_rxpipe1_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe1_dirfeedback
			i_rxpipe1_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe1_linkevaluationfeedbackfiguremerit
			i_rxpipe1_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe1_localfs
			i_rxpipe1_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe1_locallf
			i_rxpipe1_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe1_localtxcoefficientsvalid
			i_rxpipe1_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe1_localtxpresetcoefficients
			i_rxpipe1_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe1_p2m_bus
			i_rxpipe1_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe1_pclkchangeok
			i_rxpipe1_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe1_phystatus
			i_rxpipe1_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe1_rxdata
			i_rxpipe1_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe1_rxdatak
			i_rxpipe1_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe1_rxdatavalid
			i_rxpipe1_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe1_rxelecidlea
			i_rxpipe1_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe1_rxstandbystatus
			i_rxpipe1_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe1_rxstartblock
			i_rxpipe1_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe1_rxstatus
			i_rxpipe1_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe1_rxsyncheader
			i_rxpipe1_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe1_rxvalid
			o_txpipe1_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe1_asyncpowerchangeack
			o_txpipe1_blockaligncontrol                 : out std_logic;                                        -- o_txpipe1_blockaligncontrol
			o_txpipe1_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe1_cfg_hw_auto_sp_dis
			o_txpipe1_dirchange                         : out std_logic;                                        -- o_txpipe1_dirchange
			o_txpipe1_ebuf_mode                         : out std_logic;                                        -- o_txpipe1_ebuf_mode
			o_txpipe1_encodedecodebypass                : out std_logic;                                        -- o_txpipe1_encodedecodebypass
			o_txpipe1_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe1_fs
			o_txpipe1_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe1_getlocalpresetcoefficients
			o_txpipe1_invalidrequest                    : out std_logic;                                        -- o_txpipe1_invalidrequest
			o_txpipe1_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe1_lf
			o_txpipe1_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe1_localpresetindex
			o_txpipe1_lowpin_nt                         : out std_logic;                                        -- o_txpipe1_lowpin_nt
			o_txpipe1_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe1_m2p_bus
			o_txpipe1_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe1_pclk_rate
			o_txpipe1_pclkchangeack                     : out std_logic;                                        -- o_txpipe1_pclkchangeack
			o_txpipe1_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe1_phy_mode_nt
			o_txpipe1_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe1_powerdown
			o_txpipe1_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe1_rate
			o_txpipe1_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe1_rxelecidle_disable_a
			o_txpipe1_rxeqclr                           : out std_logic;                                        -- o_txpipe1_rxeqclr
			o_txpipe1_rxeqeval                          : out std_logic;                                        -- o_txpipe1_rxeqeval
			o_txpipe1_rxeqinprogress                    : out std_logic;                                        -- o_txpipe1_rxeqinprogress
			o_txpipe1_rxeqtraining                      : out std_logic;                                        -- o_txpipe1_rxeqtraining
			o_txpipe1_rxpolarity                        : out std_logic;                                        -- o_txpipe1_rxpolarity
			o_txpipe1_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe1_rxpresethint
			o_txpipe1_rxstandby                         : out std_logic;                                        -- o_txpipe1_rxstandby
			o_txpipe1_rxtermination                     : out std_logic;                                        -- o_txpipe1_rxtermination
			o_txpipe1_srisenable                        : out std_logic;                                        -- o_txpipe1_srisenable
			o_txpipe1_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe1_txcmnmode_disable_a
			o_txpipe1_txcompliance                      : out std_logic;                                        -- o_txpipe1_txcompliance
			o_txpipe1_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe1_txdata
			o_txpipe1_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe1_txdatak
			o_txpipe1_txdatavalid                       : out std_logic;                                        -- o_txpipe1_txdatavalid
			o_txpipe1_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe1_txdeemph
			o_txpipe1_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe1_txdtctrx_lb
			o_txpipe1_txelecidle                        : out std_logic;                                        -- o_txpipe1_txelecidle
			o_txpipe1_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe1_txmargin
			o_txpipe1_txoneszeros                       : out std_logic;                                        -- o_txpipe1_txoneszeros
			o_txpipe1_txstartblock                      : out std_logic;                                        -- o_txpipe1_txstartblock
			o_txpipe1_txswing                           : out std_logic;                                        -- o_txpipe1_txswing
			o_txpipe1_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe1_txsyncheader
			o_txpipe1_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe1_width
			o_pcs2_pipe_rst_n                           : out std_logic;                                        -- o_pcs2_pipe_rst_n
			i_rxpipe2_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe2_dirfeedback
			i_rxpipe2_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe2_linkevaluationfeedbackfiguremerit
			i_rxpipe2_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe2_localfs
			i_rxpipe2_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe2_locallf
			i_rxpipe2_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe2_localtxcoefficientsvalid
			i_rxpipe2_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe2_localtxpresetcoefficients
			i_rxpipe2_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe2_p2m_bus
			i_rxpipe2_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe2_pclkchangeok
			i_rxpipe2_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe2_phystatus
			i_rxpipe2_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe2_rxdata
			i_rxpipe2_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe2_rxdatak
			i_rxpipe2_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe2_rxdatavalid
			i_rxpipe2_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe2_rxelecidlea
			i_rxpipe2_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe2_rxstandbystatus
			i_rxpipe2_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe2_rxstartblock
			i_rxpipe2_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe2_rxstatus
			i_rxpipe2_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe2_rxsyncheader
			i_rxpipe2_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe2_rxvalid
			o_txpipe2_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe2_asyncpowerchangeack
			o_txpipe2_blockaligncontrol                 : out std_logic;                                        -- o_txpipe2_blockaligncontrol
			o_txpipe2_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe2_cfg_hw_auto_sp_dis
			o_txpipe2_dirchange                         : out std_logic;                                        -- o_txpipe2_dirchange
			o_txpipe2_ebuf_mode                         : out std_logic;                                        -- o_txpipe2_ebuf_mode
			o_txpipe2_encodedecodebypass                : out std_logic;                                        -- o_txpipe2_encodedecodebypass
			o_txpipe2_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe2_fs
			o_txpipe2_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe2_getlocalpresetcoefficients
			o_txpipe2_invalidrequest                    : out std_logic;                                        -- o_txpipe2_invalidrequest
			o_txpipe2_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe2_lf
			o_txpipe2_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe2_localpresetindex
			o_txpipe2_lowpin_nt                         : out std_logic;                                        -- o_txpipe2_lowpin_nt
			o_txpipe2_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe2_m2p_bus
			o_txpipe2_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe2_pclk_rate
			o_txpipe2_pclkchangeack                     : out std_logic;                                        -- o_txpipe2_pclkchangeack
			o_txpipe2_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe2_phy_mode_nt
			o_txpipe2_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe2_powerdown
			o_txpipe2_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe2_rate
			o_txpipe2_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe2_rxelecidle_disable_a
			o_txpipe2_rxeqclr                           : out std_logic;                                        -- o_txpipe2_rxeqclr
			o_txpipe2_rxeqeval                          : out std_logic;                                        -- o_txpipe2_rxeqeval
			o_txpipe2_rxeqinprogress                    : out std_logic;                                        -- o_txpipe2_rxeqinprogress
			o_txpipe2_rxeqtraining                      : out std_logic;                                        -- o_txpipe2_rxeqtraining
			o_txpipe2_rxpolarity                        : out std_logic;                                        -- o_txpipe2_rxpolarity
			o_txpipe2_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe2_rxpresethint
			o_txpipe2_rxstandby                         : out std_logic;                                        -- o_txpipe2_rxstandby
			o_txpipe2_rxtermination                     : out std_logic;                                        -- o_txpipe2_rxtermination
			o_txpipe2_srisenable                        : out std_logic;                                        -- o_txpipe2_srisenable
			o_txpipe2_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe2_txcmnmode_disable_a
			o_txpipe2_txcompliance                      : out std_logic;                                        -- o_txpipe2_txcompliance
			o_txpipe2_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe2_txdata
			o_txpipe2_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe2_txdatak
			o_txpipe2_txdatavalid                       : out std_logic;                                        -- o_txpipe2_txdatavalid
			o_txpipe2_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe2_txdeemph
			o_txpipe2_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe2_txdtctrx_lb
			o_txpipe2_txelecidle                        : out std_logic;                                        -- o_txpipe2_txelecidle
			o_txpipe2_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe2_txmargin
			o_txpipe2_txoneszeros                       : out std_logic;                                        -- o_txpipe2_txoneszeros
			o_txpipe2_txstartblock                      : out std_logic;                                        -- o_txpipe2_txstartblock
			o_txpipe2_txswing                           : out std_logic;                                        -- o_txpipe2_txswing
			o_txpipe2_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe2_txsyncheader
			o_txpipe2_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe2_width
			o_pcs3_pipe_rst_n                           : out std_logic;                                        -- o_pcs3_pipe_rst_n
			i_rxpipe3_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe3_dirfeedback
			i_rxpipe3_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe3_linkevaluationfeedbackfiguremerit
			i_rxpipe3_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe3_localfs
			i_rxpipe3_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe3_locallf
			i_rxpipe3_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe3_localtxcoefficientsvalid
			i_rxpipe3_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe3_localtxpresetcoefficients
			i_rxpipe3_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe3_p2m_bus
			i_rxpipe3_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe3_pclkchangeok
			i_rxpipe3_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe3_phystatus
			i_rxpipe3_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe3_rxdata
			i_rxpipe3_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe3_rxdatak
			i_rxpipe3_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe3_rxdatavalid
			i_rxpipe3_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe3_rxelecidlea
			i_rxpipe3_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe3_rxstandbystatus
			i_rxpipe3_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe3_rxstartblock
			i_rxpipe3_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe3_rxstatus
			i_rxpipe3_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe3_rxsyncheader
			i_rxpipe3_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe3_rxvalid
			o_txpipe3_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe3_asyncpowerchangeack
			o_txpipe3_blockaligncontrol                 : out std_logic;                                        -- o_txpipe3_blockaligncontrol
			o_txpipe3_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe3_cfg_hw_auto_sp_dis
			o_txpipe3_dirchange                         : out std_logic;                                        -- o_txpipe3_dirchange
			o_txpipe3_ebuf_mode                         : out std_logic;                                        -- o_txpipe3_ebuf_mode
			o_txpipe3_encodedecodebypass                : out std_logic;                                        -- o_txpipe3_encodedecodebypass
			o_txpipe3_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe3_fs
			o_txpipe3_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe3_getlocalpresetcoefficients
			o_txpipe3_invalidrequest                    : out std_logic;                                        -- o_txpipe3_invalidrequest
			o_txpipe3_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe3_lf
			o_txpipe3_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe3_localpresetindex
			o_txpipe3_lowpin_nt                         : out std_logic;                                        -- o_txpipe3_lowpin_nt
			o_txpipe3_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe3_m2p_bus
			o_txpipe3_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe3_pclk_rate
			o_txpipe3_pclkchangeack                     : out std_logic;                                        -- o_txpipe3_pclkchangeack
			o_txpipe3_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe3_phy_mode_nt
			o_txpipe3_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe3_powerdown
			o_txpipe3_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe3_rate
			o_txpipe3_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe3_rxelecidle_disable_a
			o_txpipe3_rxeqclr                           : out std_logic;                                        -- o_txpipe3_rxeqclr
			o_txpipe3_rxeqeval                          : out std_logic;                                        -- o_txpipe3_rxeqeval
			o_txpipe3_rxeqinprogress                    : out std_logic;                                        -- o_txpipe3_rxeqinprogress
			o_txpipe3_rxeqtraining                      : out std_logic;                                        -- o_txpipe3_rxeqtraining
			o_txpipe3_rxpolarity                        : out std_logic;                                        -- o_txpipe3_rxpolarity
			o_txpipe3_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe3_rxpresethint
			o_txpipe3_rxstandby                         : out std_logic;                                        -- o_txpipe3_rxstandby
			o_txpipe3_rxtermination                     : out std_logic;                                        -- o_txpipe3_rxtermination
			o_txpipe3_srisenable                        : out std_logic;                                        -- o_txpipe3_srisenable
			o_txpipe3_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe3_txcmnmode_disable_a
			o_txpipe3_txcompliance                      : out std_logic;                                        -- o_txpipe3_txcompliance
			o_txpipe3_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe3_txdata
			o_txpipe3_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe3_txdatak
			o_txpipe3_txdatavalid                       : out std_logic;                                        -- o_txpipe3_txdatavalid
			o_txpipe3_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe3_txdeemph
			o_txpipe3_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe3_txdtctrx_lb
			o_txpipe3_txelecidle                        : out std_logic;                                        -- o_txpipe3_txelecidle
			o_txpipe3_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe3_txmargin
			o_txpipe3_txoneszeros                       : out std_logic;                                        -- o_txpipe3_txoneszeros
			o_txpipe3_txstartblock                      : out std_logic;                                        -- o_txpipe3_txstartblock
			o_txpipe3_txswing                           : out std_logic;                                        -- o_txpipe3_txswing
			o_txpipe3_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe3_txsyncheader
			o_txpipe3_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe3_width
			o_pcs4_pipe_rst_n                           : out std_logic;                                        -- o_pcs4_pipe_rst_n
			i_rxpipe4_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe4_dirfeedback
			i_rxpipe4_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe4_linkevaluationfeedbackfiguremerit
			i_rxpipe4_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe4_localfs
			i_rxpipe4_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe4_locallf
			i_rxpipe4_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe4_localtxcoefficientsvalid
			i_rxpipe4_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe4_localtxpresetcoefficients
			i_rxpipe4_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe4_p2m_bus
			i_rxpipe4_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe4_pclkchangeok
			i_rxpipe4_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe4_phystatus
			i_rxpipe4_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe4_rxdata
			i_rxpipe4_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe4_rxdatak
			i_rxpipe4_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe4_rxdatavalid
			i_rxpipe4_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe4_rxelecidlea
			i_rxpipe4_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe4_rxstandbystatus
			i_rxpipe4_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe4_rxstartblock
			i_rxpipe4_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe4_rxstatus
			i_rxpipe4_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe4_rxsyncheader
			i_rxpipe4_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe4_rxvalid
			o_txpipe4_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe4_asyncpowerchangeack
			o_txpipe4_blockaligncontrol                 : out std_logic;                                        -- o_txpipe4_blockaligncontrol
			o_txpipe4_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe4_cfg_hw_auto_sp_dis
			o_txpipe4_dirchange                         : out std_logic;                                        -- o_txpipe4_dirchange
			o_txpipe4_ebuf_mode                         : out std_logic;                                        -- o_txpipe4_ebuf_mode
			o_txpipe4_encodedecodebypass                : out std_logic;                                        -- o_txpipe4_encodedecodebypass
			o_txpipe4_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe4_fs
			o_txpipe4_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe4_getlocalpresetcoefficients
			o_txpipe4_invalidrequest                    : out std_logic;                                        -- o_txpipe4_invalidrequest
			o_txpipe4_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe4_lf
			o_txpipe4_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe4_localpresetindex
			o_txpipe4_lowpin_nt                         : out std_logic;                                        -- o_txpipe4_lowpin_nt
			o_txpipe4_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe4_m2p_bus
			o_txpipe4_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe4_pclk_rate
			o_txpipe4_pclkchangeack                     : out std_logic;                                        -- o_txpipe4_pclkchangeack
			o_txpipe4_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe4_phy_mode_nt
			o_txpipe4_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe4_powerdown
			o_txpipe4_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe4_rate
			o_txpipe4_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe4_rxelecidle_disable_a
			o_txpipe4_rxeqclr                           : out std_logic;                                        -- o_txpipe4_rxeqclr
			o_txpipe4_rxeqeval                          : out std_logic;                                        -- o_txpipe4_rxeqeval
			o_txpipe4_rxeqinprogress                    : out std_logic;                                        -- o_txpipe4_rxeqinprogress
			o_txpipe4_rxeqtraining                      : out std_logic;                                        -- o_txpipe4_rxeqtraining
			o_txpipe4_rxpolarity                        : out std_logic;                                        -- o_txpipe4_rxpolarity
			o_txpipe4_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe4_rxpresethint
			o_txpipe4_rxstandby                         : out std_logic;                                        -- o_txpipe4_rxstandby
			o_txpipe4_rxtermination                     : out std_logic;                                        -- o_txpipe4_rxtermination
			o_txpipe4_srisenable                        : out std_logic;                                        -- o_txpipe4_srisenable
			o_txpipe4_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe4_txcmnmode_disable_a
			o_txpipe4_txcompliance                      : out std_logic;                                        -- o_txpipe4_txcompliance
			o_txpipe4_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe4_txdata
			o_txpipe4_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe4_txdatak
			o_txpipe4_txdatavalid                       : out std_logic;                                        -- o_txpipe4_txdatavalid
			o_txpipe4_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe4_txdeemph
			o_txpipe4_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe4_txdtctrx_lb
			o_txpipe4_txelecidle                        : out std_logic;                                        -- o_txpipe4_txelecidle
			o_txpipe4_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe4_txmargin
			o_txpipe4_txoneszeros                       : out std_logic;                                        -- o_txpipe4_txoneszeros
			o_txpipe4_txstartblock                      : out std_logic;                                        -- o_txpipe4_txstartblock
			o_txpipe4_txswing                           : out std_logic;                                        -- o_txpipe4_txswing
			o_txpipe4_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe4_txsyncheader
			o_txpipe4_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe4_width
			o_pcs5_pipe_rst_n                           : out std_logic;                                        -- o_pcs5_pipe_rst_n
			i_rxpipe5_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe5_dirfeedback
			i_rxpipe5_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe5_linkevaluationfeedbackfiguremerit
			i_rxpipe5_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe5_localfs
			i_rxpipe5_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe5_locallf
			i_rxpipe5_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe5_localtxcoefficientsvalid
			i_rxpipe5_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe5_localtxpresetcoefficients
			i_rxpipe5_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe5_p2m_bus
			i_rxpipe5_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe5_pclkchangeok
			i_rxpipe5_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe5_phystatus
			i_rxpipe5_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe5_rxdata
			i_rxpipe5_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe5_rxdatak
			i_rxpipe5_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe5_rxdatavalid
			i_rxpipe5_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe5_rxelecidlea
			i_rxpipe5_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe5_rxstandbystatus
			i_rxpipe5_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe5_rxstartblock
			i_rxpipe5_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe5_rxstatus
			i_rxpipe5_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe5_rxsyncheader
			i_rxpipe5_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe5_rxvalid
			o_txpipe5_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe5_asyncpowerchangeack
			o_txpipe5_blockaligncontrol                 : out std_logic;                                        -- o_txpipe5_blockaligncontrol
			o_txpipe5_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe5_cfg_hw_auto_sp_dis
			o_txpipe5_dirchange                         : out std_logic;                                        -- o_txpipe5_dirchange
			o_txpipe5_ebuf_mode                         : out std_logic;                                        -- o_txpipe5_ebuf_mode
			o_txpipe5_encodedecodebypass                : out std_logic;                                        -- o_txpipe5_encodedecodebypass
			o_txpipe5_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe5_fs
			o_txpipe5_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe5_getlocalpresetcoefficients
			o_txpipe5_invalidrequest                    : out std_logic;                                        -- o_txpipe5_invalidrequest
			o_txpipe5_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe5_lf
			o_txpipe5_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe5_localpresetindex
			o_txpipe5_lowpin_nt                         : out std_logic;                                        -- o_txpipe5_lowpin_nt
			o_txpipe5_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe5_m2p_bus
			o_txpipe5_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe5_pclk_rate
			o_txpipe5_pclkchangeack                     : out std_logic;                                        -- o_txpipe5_pclkchangeack
			o_txpipe5_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe5_phy_mode_nt
			o_txpipe5_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe5_powerdown
			o_txpipe5_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe5_rate
			o_txpipe5_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe5_rxelecidle_disable_a
			o_txpipe5_rxeqclr                           : out std_logic;                                        -- o_txpipe5_rxeqclr
			o_txpipe5_rxeqeval                          : out std_logic;                                        -- o_txpipe5_rxeqeval
			o_txpipe5_rxeqinprogress                    : out std_logic;                                        -- o_txpipe5_rxeqinprogress
			o_txpipe5_rxeqtraining                      : out std_logic;                                        -- o_txpipe5_rxeqtraining
			o_txpipe5_rxpolarity                        : out std_logic;                                        -- o_txpipe5_rxpolarity
			o_txpipe5_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe5_rxpresethint
			o_txpipe5_rxstandby                         : out std_logic;                                        -- o_txpipe5_rxstandby
			o_txpipe5_rxtermination                     : out std_logic;                                        -- o_txpipe5_rxtermination
			o_txpipe5_srisenable                        : out std_logic;                                        -- o_txpipe5_srisenable
			o_txpipe5_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe5_txcmnmode_disable_a
			o_txpipe5_txcompliance                      : out std_logic;                                        -- o_txpipe5_txcompliance
			o_txpipe5_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe5_txdata
			o_txpipe5_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe5_txdatak
			o_txpipe5_txdatavalid                       : out std_logic;                                        -- o_txpipe5_txdatavalid
			o_txpipe5_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe5_txdeemph
			o_txpipe5_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe5_txdtctrx_lb
			o_txpipe5_txelecidle                        : out std_logic;                                        -- o_txpipe5_txelecidle
			o_txpipe5_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe5_txmargin
			o_txpipe5_txoneszeros                       : out std_logic;                                        -- o_txpipe5_txoneszeros
			o_txpipe5_txstartblock                      : out std_logic;                                        -- o_txpipe5_txstartblock
			o_txpipe5_txswing                           : out std_logic;                                        -- o_txpipe5_txswing
			o_txpipe5_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe5_txsyncheader
			o_txpipe5_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe5_width
			o_pcs6_pipe_rst_n                           : out std_logic;                                        -- o_pcs6_pipe_rst_n
			i_rxpipe6_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe6_dirfeedback
			i_rxpipe6_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe6_linkevaluationfeedbackfiguremerit
			i_rxpipe6_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe6_localfs
			i_rxpipe6_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe6_locallf
			i_rxpipe6_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe6_localtxcoefficientsvalid
			i_rxpipe6_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe6_localtxpresetcoefficients
			i_rxpipe6_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe6_p2m_bus
			i_rxpipe6_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe6_pclkchangeok
			i_rxpipe6_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe6_phystatus
			i_rxpipe6_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe6_rxdata
			i_rxpipe6_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe6_rxdatak
			i_rxpipe6_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe6_rxdatavalid
			i_rxpipe6_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe6_rxelecidlea
			i_rxpipe6_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe6_rxstandbystatus
			i_rxpipe6_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe6_rxstartblock
			i_rxpipe6_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe6_rxstatus
			i_rxpipe6_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe6_rxsyncheader
			i_rxpipe6_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe6_rxvalid
			o_txpipe6_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe6_asyncpowerchangeack
			o_txpipe6_blockaligncontrol                 : out std_logic;                                        -- o_txpipe6_blockaligncontrol
			o_txpipe6_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe6_cfg_hw_auto_sp_dis
			o_txpipe6_dirchange                         : out std_logic;                                        -- o_txpipe6_dirchange
			o_txpipe6_ebuf_mode                         : out std_logic;                                        -- o_txpipe6_ebuf_mode
			o_txpipe6_encodedecodebypass                : out std_logic;                                        -- o_txpipe6_encodedecodebypass
			o_txpipe6_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe6_fs
			o_txpipe6_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe6_getlocalpresetcoefficients
			o_txpipe6_invalidrequest                    : out std_logic;                                        -- o_txpipe6_invalidrequest
			o_txpipe6_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe6_lf
			o_txpipe6_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe6_localpresetindex
			o_txpipe6_lowpin_nt                         : out std_logic;                                        -- o_txpipe6_lowpin_nt
			o_txpipe6_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe6_m2p_bus
			o_txpipe6_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe6_pclk_rate
			o_txpipe6_pclkchangeack                     : out std_logic;                                        -- o_txpipe6_pclkchangeack
			o_txpipe6_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe6_phy_mode_nt
			o_txpipe6_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe6_powerdown
			o_txpipe6_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe6_rate
			o_txpipe6_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe6_rxelecidle_disable_a
			o_txpipe6_rxeqclr                           : out std_logic;                                        -- o_txpipe6_rxeqclr
			o_txpipe6_rxeqeval                          : out std_logic;                                        -- o_txpipe6_rxeqeval
			o_txpipe6_rxeqinprogress                    : out std_logic;                                        -- o_txpipe6_rxeqinprogress
			o_txpipe6_rxeqtraining                      : out std_logic;                                        -- o_txpipe6_rxeqtraining
			o_txpipe6_rxpolarity                        : out std_logic;                                        -- o_txpipe6_rxpolarity
			o_txpipe6_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe6_rxpresethint
			o_txpipe6_rxstandby                         : out std_logic;                                        -- o_txpipe6_rxstandby
			o_txpipe6_rxtermination                     : out std_logic;                                        -- o_txpipe6_rxtermination
			o_txpipe6_srisenable                        : out std_logic;                                        -- o_txpipe6_srisenable
			o_txpipe6_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe6_txcmnmode_disable_a
			o_txpipe6_txcompliance                      : out std_logic;                                        -- o_txpipe6_txcompliance
			o_txpipe6_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe6_txdata
			o_txpipe6_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe6_txdatak
			o_txpipe6_txdatavalid                       : out std_logic;                                        -- o_txpipe6_txdatavalid
			o_txpipe6_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe6_txdeemph
			o_txpipe6_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe6_txdtctrx_lb
			o_txpipe6_txelecidle                        : out std_logic;                                        -- o_txpipe6_txelecidle
			o_txpipe6_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe6_txmargin
			o_txpipe6_txoneszeros                       : out std_logic;                                        -- o_txpipe6_txoneszeros
			o_txpipe6_txstartblock                      : out std_logic;                                        -- o_txpipe6_txstartblock
			o_txpipe6_txswing                           : out std_logic;                                        -- o_txpipe6_txswing
			o_txpipe6_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe6_txsyncheader
			o_txpipe6_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe6_width
			o_pcs7_pipe_rst_n                           : out std_logic;                                        -- o_pcs7_pipe_rst_n
			i_rxpipe7_dirfeedback                       : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe7_dirfeedback
			i_rxpipe7_linkevaluationfeedbackfiguremerit : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe7_linkevaluationfeedbackfiguremerit
			i_rxpipe7_localfs                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe7_localfs
			i_rxpipe7_locallf                           : in  std_logic_vector(5 downto 0)  := (others => 'X'); -- i_rxpipe7_locallf
			i_rxpipe7_localtxcoefficientsvalid          : in  std_logic                     := 'X';             -- i_rxpipe7_localtxcoefficientsvalid
			i_rxpipe7_localtxpresetcoefficients         : in  std_logic_vector(17 downto 0) := (others => 'X'); -- i_rxpipe7_localtxpresetcoefficients
			i_rxpipe7_p2m_bus                           : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_rxpipe7_p2m_bus
			i_rxpipe7_pclkchangeok                      : in  std_logic                     := 'X';             -- i_rxpipe7_pclkchangeok
			i_rxpipe7_phystatus                         : in  std_logic                     := 'X';             -- i_rxpipe7_phystatus
			i_rxpipe7_rxdata                            : in  std_logic_vector(39 downto 0) := (others => 'X'); -- i_rxpipe7_rxdata
			i_rxpipe7_rxdatak                           : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe7_rxdatak
			i_rxpipe7_rxdatavalid                       : in  std_logic                     := 'X';             -- i_rxpipe7_rxdatavalid
			i_rxpipe7_rxelecidlea                       : in  std_logic                     := 'X';             -- i_rxpipe7_rxelecidlea
			i_rxpipe7_rxstandbystatus                   : in  std_logic                     := 'X';             -- i_rxpipe7_rxstandbystatus
			i_rxpipe7_rxstartblock                      : in  std_logic                     := 'X';             -- i_rxpipe7_rxstartblock
			i_rxpipe7_rxstatus                          : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- i_rxpipe7_rxstatus
			i_rxpipe7_rxsyncheader                      : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- i_rxpipe7_rxsyncheader
			i_rxpipe7_rxvalid                           : in  std_logic                     := 'X';             -- i_rxpipe7_rxvalid
			o_txpipe7_asyncpowerchangeack               : out std_logic;                                        -- o_txpipe7_asyncpowerchangeack
			o_txpipe7_blockaligncontrol                 : out std_logic;                                        -- o_txpipe7_blockaligncontrol
			o_txpipe7_cfg_hw_auto_sp_dis                : out std_logic;                                        -- o_txpipe7_cfg_hw_auto_sp_dis
			o_txpipe7_dirchange                         : out std_logic;                                        -- o_txpipe7_dirchange
			o_txpipe7_ebuf_mode                         : out std_logic;                                        -- o_txpipe7_ebuf_mode
			o_txpipe7_encodedecodebypass                : out std_logic;                                        -- o_txpipe7_encodedecodebypass
			o_txpipe7_fs                                : out std_logic_vector(5 downto 0);                     -- o_txpipe7_fs
			o_txpipe7_getlocalpresetcoefficients        : out std_logic;                                        -- o_txpipe7_getlocalpresetcoefficients
			o_txpipe7_invalidrequest                    : out std_logic;                                        -- o_txpipe7_invalidrequest
			o_txpipe7_lf                                : out std_logic_vector(5 downto 0);                     -- o_txpipe7_lf
			o_txpipe7_localpresetindex                  : out std_logic_vector(4 downto 0);                     -- o_txpipe7_localpresetindex
			o_txpipe7_lowpin_nt                         : out std_logic;                                        -- o_txpipe7_lowpin_nt
			o_txpipe7_m2p_bus                           : out std_logic_vector(7 downto 0);                     -- o_txpipe7_m2p_bus
			o_txpipe7_pclk_rate                         : out std_logic_vector(2 downto 0);                     -- o_txpipe7_pclk_rate
			o_txpipe7_pclkchangeack                     : out std_logic;                                        -- o_txpipe7_pclkchangeack
			o_txpipe7_phy_mode_nt                       : out std_logic_vector(3 downto 0);                     -- o_txpipe7_phy_mode_nt
			o_txpipe7_powerdown                         : out std_logic_vector(3 downto 0);                     -- o_txpipe7_powerdown
			o_txpipe7_rate                              : out std_logic_vector(2 downto 0);                     -- o_txpipe7_rate
			o_txpipe7_rxelecidle_disable_a              : out std_logic;                                        -- o_txpipe7_rxelecidle_disable_a
			o_txpipe7_rxeqclr                           : out std_logic;                                        -- o_txpipe7_rxeqclr
			o_txpipe7_rxeqeval                          : out std_logic;                                        -- o_txpipe7_rxeqeval
			o_txpipe7_rxeqinprogress                    : out std_logic;                                        -- o_txpipe7_rxeqinprogress
			o_txpipe7_rxeqtraining                      : out std_logic;                                        -- o_txpipe7_rxeqtraining
			o_txpipe7_rxpolarity                        : out std_logic;                                        -- o_txpipe7_rxpolarity
			o_txpipe7_rxpresethint                      : out std_logic_vector(2 downto 0);                     -- o_txpipe7_rxpresethint
			o_txpipe7_rxstandby                         : out std_logic;                                        -- o_txpipe7_rxstandby
			o_txpipe7_rxtermination                     : out std_logic;                                        -- o_txpipe7_rxtermination
			o_txpipe7_srisenable                        : out std_logic;                                        -- o_txpipe7_srisenable
			o_txpipe7_txcmnmode_disable_a               : out std_logic;                                        -- o_txpipe7_txcmnmode_disable_a
			o_txpipe7_txcompliance                      : out std_logic;                                        -- o_txpipe7_txcompliance
			o_txpipe7_txdata                            : out std_logic_vector(39 downto 0);                    -- o_txpipe7_txdata
			o_txpipe7_txdatak                           : out std_logic_vector(3 downto 0);                     -- o_txpipe7_txdatak
			o_txpipe7_txdatavalid                       : out std_logic;                                        -- o_txpipe7_txdatavalid
			o_txpipe7_txdeemph                          : out std_logic_vector(17 downto 0);                    -- o_txpipe7_txdeemph
			o_txpipe7_txdtctrx_lb                       : out std_logic;                                        -- o_txpipe7_txdtctrx_lb
			o_txpipe7_txelecidle                        : out std_logic;                                        -- o_txpipe7_txelecidle
			o_txpipe7_txmargin                          : out std_logic_vector(2 downto 0);                     -- o_txpipe7_txmargin
			o_txpipe7_txoneszeros                       : out std_logic;                                        -- o_txpipe7_txoneszeros
			o_txpipe7_txstartblock                      : out std_logic;                                        -- o_txpipe7_txstartblock
			o_txpipe7_txswing                           : out std_logic;                                        -- o_txpipe7_txswing
			o_txpipe7_txsyncheader                      : out std_logic_vector(3 downto 0);                     -- o_txpipe7_txsyncheader
			o_txpipe7_width                             : out std_logic_vector(2 downto 0);                     -- o_txpipe7_width
			i_ch0_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch0_tx_data
			i_ch1_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch1_tx_data
			i_ch2_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch2_tx_data
			i_ch3_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch3_tx_data
			i_ch4_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch4_tx_data
			o_ch0_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch0_rx_data
			o_ch1_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch1_rx_data
			o_ch2_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch2_rx_data
			o_ch3_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch3_rx_data
			o_ch4_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch4_rx_data
			i_ch0_rst_pld_clrhip                        : in  std_logic                     := 'X';             -- i_ch0_rst_pld_clrhip
			i_ch0_rst_pld_clrpcs                        : in  std_logic                     := 'X';             -- i_ch0_rst_pld_clrpcs
			i_ch0_rst_pld_perstn                        : in  std_logic                     := 'X';             -- i_ch0_rst_pld_perstn
			i_ch0_pcie_ctrl_tx_async                    : in  std_logic_vector(87 downto 0) := (others => 'X'); -- i_ch0_pcie_ctrl_tx_async
			i_ch0_pcie_ctrl_tx_direct                   : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- i_ch0_pcie_ctrl_tx_direct
			o_ch0_pcie_ctrl_rx_async                    : out std_logic_vector(87 downto 0);                    -- o_ch0_pcie_ctrl_rx_async
			o_ch0_pcie_ctrl_rx_direct                   : out std_logic_vector(7 downto 0);                     -- o_ch0_pcie_ctrl_rx_direct
			i_pld_pcie_clk                              : in  std_logic                     := 'X';             -- i_pld_pcie_clk
			i_pcs0_pclk                                 : in  std_logic                     := 'X';             -- i_pcs0_pclk
			i_pin_perst_n                               : in  std_logic                     := 'X';             -- i_pin_perst_n
			i_rst_ch0_flux0_cpi_cmn_busy                : in  std_logic                     := 'X';             -- i_rst_ch0_flux0_cpi_cmn_busy
			i_rst_ch1_flux0_cpi_cmn_busy                : in  std_logic                     := 'X';             -- i_rst_ch1_flux0_cpi_cmn_busy
			i_rst_ch2_flux0_cpi_cmn_busy                : in  std_logic                     := 'X';             -- i_rst_ch2_flux0_cpi_cmn_busy
			i_rst_ch3_flux0_cpi_cmn_busy                : in  std_logic                     := 'X';             -- i_rst_ch3_flux0_cpi_cmn_busy
			i_gbl_ctrl_syspll_locked                    : in  std_logic                     := 'X';             -- i_gbl_ctrl_syspll_locked
			i_ch5_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch5_tx_data
			i_ch6_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch6_tx_data
			i_ch7_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch7_tx_data
			i_ch8_tx_data                               : in  std_logic_vector(79 downto 0) := (others => 'X'); -- i_ch8_tx_data
			o_ch5_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch5_rx_data
			o_ch6_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch6_rx_data
			o_ch7_rx_data                               : out std_logic_vector(79 downto 0);                    -- o_ch7_rx_data
			o_ch8_rx_data                               : out std_logic_vector(79 downto 0)                     -- o_ch8_rx_data
		);
	end component gts_axi_streaming_phip_hal_2100_lai7rjq_cmp;

	for pcie_phip_hal_ctrltop : gts_axi_streaming_phip_hal_2100_lai7rjq_cmp
		use entity phip_hal_2100.gts_axi_streaming_phip_hal_2100_lai7rjq;
begin

	pcie_parity_bypass_check : if pcie_parity_bypass /= "true" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	rxbuf_limit_bypass_check : if rxbuf_limit_bypass /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	maxpayload_size_check : if maxpayload_size /= "MAXPAYLOAD_SIZE_MAX_PAYLOAD_512" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pldclk_rate_check : if pldclk_rate /= "PLDCLK_RATE_FAST" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	port_type_check : if port_type /= "PORT_TYPE_RP" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	sris_enable_check : if sris_enable /= "SRIS_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	sris_mode_check : if sris_mode /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	sim_mode_check : if sim_mode /= "SIM_MODE_DISABLE_VSIM_MODE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	sup_mode_check : if sup_mode /= "SUP_MODE_USER_MODE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	cvp_enable_check : if cvp_enable /= "CVP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	cii_monitor_en_check : if cii_monitor_en /= "CII_MONITOR_EN_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_cap_link_surprise_down_err_cap_check : if pf0_cap_link_surprise_down_err_cap /= "PF0_CAP_LINK_SURPRISE_DOWN_ERR_CAP_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	link_rate_check : if link_rate /= "LINK_RATE_GEN3" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	link_width_check : if link_width /= "LINK_WIDTH_X4" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset0_check : if pf0_dsp_16g_tx_preset0 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset1_check : if pf0_dsp_16g_tx_preset1 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset2_check : if pf0_dsp_16g_tx_preset2 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset3_check : if pf0_dsp_16g_tx_preset3 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset4_check : if pf0_dsp_16g_tx_preset4 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset5_check : if pf0_dsp_16g_tx_preset5 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset6_check : if pf0_dsp_16g_tx_preset6 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset7_check : if pf0_dsp_16g_tx_preset7 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset8_check : if pf0_dsp_16g_tx_preset8 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset9_check : if pf0_dsp_16g_tx_preset9 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset10_check : if pf0_dsp_16g_tx_preset10 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset11_check : if pf0_dsp_16g_tx_preset11 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset12_check : if pf0_dsp_16g_tx_preset12 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset13_check : if pf0_dsp_16g_tx_preset13 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset14_check : if pf0_dsp_16g_tx_preset14 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_16g_tx_preset15_check : if pf0_dsp_16g_tx_preset15 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset0_check : if pf0_dsp_tx_preset0 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset1_check : if pf0_dsp_tx_preset1 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset2_check : if pf0_dsp_tx_preset2 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset3_check : if pf0_dsp_tx_preset3 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset4_check : if pf0_dsp_tx_preset4 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset5_check : if pf0_dsp_tx_preset5 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset6_check : if pf0_dsp_tx_preset6 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset7_check : if pf0_dsp_tx_preset7 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset8_check : if pf0_dsp_tx_preset8 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset9_check : if pf0_dsp_tx_preset9 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset10_check : if pf0_dsp_tx_preset10 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset11_check : if pf0_dsp_tx_preset11 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset12_check : if pf0_dsp_tx_preset12 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset13_check : if pf0_dsp_tx_preset13 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset14_check : if pf0_dsp_tx_preset14 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_dsp_tx_preset15_check : if pf0_dsp_tx_preset15 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset0_check : if pf0_usp_16g_tx_preset0 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset1_check : if pf0_usp_16g_tx_preset1 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset2_check : if pf0_usp_16g_tx_preset2 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset3_check : if pf0_usp_16g_tx_preset3 /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset4_check : if pf0_usp_16g_tx_preset4 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset5_check : if pf0_usp_16g_tx_preset5 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset6_check : if pf0_usp_16g_tx_preset6 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset7_check : if pf0_usp_16g_tx_preset7 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset8_check : if pf0_usp_16g_tx_preset8 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset9_check : if pf0_usp_16g_tx_preset9 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset10_check : if pf0_usp_16g_tx_preset10 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset11_check : if pf0_usp_16g_tx_preset11 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset12_check : if pf0_usp_16g_tx_preset12 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset13_check : if pf0_usp_16g_tx_preset13 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset14_check : if pf0_usp_16g_tx_preset14 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_16g_tx_preset15_check : if pf0_usp_16g_tx_preset15 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset0_check : if pf0_usp_tx_preset0 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset1_check : if pf0_usp_tx_preset1 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset2_check : if pf0_usp_tx_preset2 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset3_check : if pf0_usp_tx_preset3 /= 9 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset4_check : if pf0_usp_tx_preset4 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset5_check : if pf0_usp_tx_preset5 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset6_check : if pf0_usp_tx_preset6 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset7_check : if pf0_usp_tx_preset7 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset8_check : if pf0_usp_tx_preset8 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset9_check : if pf0_usp_tx_preset9 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset10_check : if pf0_usp_tx_preset10 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset11_check : if pf0_usp_tx_preset11 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset12_check : if pf0_usp_tx_preset12 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset13_check : if pf0_usp_tx_preset13 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset14_check : if pf0_usp_tx_preset14 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_usp_tx_preset15_check : if pf0_usp_tx_preset15 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar0_enabled_check : if pf0_pci_type0_bar0_enabled /= "PF0_PCI_TYPE0_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar0_prefetch_check : if pf0_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar0_type_check : if pf0_bar0_type /= "PF0_BAR0_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar1_enabled_check : if pf0_pci_type0_bar1_enabled /= "PF0_PCI_TYPE0_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar1_prefetch_check : if pf0_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar2_enabled_check : if pf0_pci_type0_bar2_enabled /= "PF0_PCI_TYPE0_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar2_prefetch_check : if pf0_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar2_type_check : if pf0_bar2_type /= "PF0_BAR2_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar3_enabled_check : if pf0_pci_type0_bar3_enabled /= "PF0_PCI_TYPE0_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar3_prefetch_check : if pf0_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar4_enabled_check : if pf0_pci_type0_bar4_enabled /= "PF0_PCI_TYPE0_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar4_prefetch_check : if pf0_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar4_type_check : if pf0_bar4_type /= "PF0_BAR4_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar5_enabled_check : if pf0_pci_type0_bar5_enabled /= "PF0_PCI_TYPE0_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_bar5_prefetch_check : if pf0_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_rom_bar_enable_check : if pf0_rom_bar_enable /= "PF0_ROM_BAR_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_rom_mask_check : if pf0_rom_mask /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_rom_bar_enabled_check : if pf0_rom_bar_enabled /= "PF0_ROM_BAR_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_rp_rom_bar_enabled_check : if pf0_rp_rom_bar_enabled /= "PF0_RP_ROM_BAR_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_rp_rom_mask_check : if pf0_rp_rom_mask /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar0_enabled_check : if pf0_sriov_vf_bar0_enabled /= "PF0_SRIOV_VF_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar0_prefetch_check : if pf0_sriov_vf_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar0_type_check : if pf0_sriov_vf_bar0_type /= "PF0_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar1_enabled_check : if pf0_sriov_vf_bar1_enabled /= "PF0_SRIOV_VF_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar1_prefetch_check : if pf0_sriov_vf_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar2_enabled_check : if pf0_sriov_vf_bar2_enabled /= "PF0_SRIOV_VF_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar2_prefetch_check : if pf0_sriov_vf_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar2_type_check : if pf0_sriov_vf_bar2_type /= "PF0_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar3_enabled_check : if pf0_sriov_vf_bar3_enabled /= "PF0_SRIOV_VF_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar3_prefetch_check : if pf0_sriov_vf_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar4_enabled_check : if pf0_sriov_vf_bar4_enabled /= "PF0_SRIOV_VF_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar4_prefetch_check : if pf0_sriov_vf_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar4_type_check : if pf0_sriov_vf_bar4_type /= "PF0_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar5_enabled_check : if pf0_sriov_vf_bar5_enabled /= "PF0_SRIOV_VF_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar5_prefetch_check : if pf0_sriov_vf_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar0_enabled_check : if pf1_pci_type0_bar0_enabled /= "PF1_PCI_TYPE0_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar0_prefetch_check : if pf1_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar0_type_check : if pf1_bar0_type /= "PF1_BAR0_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar1_enabled_check : if pf1_pci_type0_bar1_enabled /= "PF1_PCI_TYPE0_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar1_prefetch_check : if pf1_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar2_enabled_check : if pf1_pci_type0_bar2_enabled /= "PF1_PCI_TYPE0_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar2_prefetch_check : if pf1_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar2_type_check : if pf1_bar2_type /= "PF1_BAR2_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar3_enabled_check : if pf1_pci_type0_bar3_enabled /= "PF1_PCI_TYPE0_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar3_prefetch_check : if pf1_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar4_enabled_check : if pf1_pci_type0_bar4_enabled /= "PF1_PCI_TYPE0_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar4_prefetch_check : if pf1_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar4_type_check : if pf1_bar4_type /= "PF1_BAR4_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar5_enabled_check : if pf1_pci_type0_bar5_enabled /= "PF1_PCI_TYPE0_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_bar5_prefetch_check : if pf1_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_rom_bar_enable_check : if pf1_rom_bar_enable /= "PF1_ROM_BAR_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_rom_mask_check : if pf1_rom_mask /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_rom_bar_enabled_check : if pf1_rom_bar_enabled /= "PF1_ROM_BAR_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar0_enabled_check : if pf1_sriov_vf_bar0_enabled /= "PF1_SRIOV_VF_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar0_prefetch_check : if pf1_sriov_vf_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar0_type_check : if pf1_sriov_vf_bar0_type /= "PF1_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar1_enabled_check : if pf1_sriov_vf_bar1_enabled /= "PF1_SRIOV_VF_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar1_prefetch_check : if pf1_sriov_vf_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar2_enabled_check : if pf1_sriov_vf_bar2_enabled /= "PF1_SRIOV_VF_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar2_prefetch_check : if pf1_sriov_vf_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar2_type_check : if pf1_sriov_vf_bar2_type /= "PF1_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar3_enabled_check : if pf1_sriov_vf_bar3_enabled /= "PF1_SRIOV_VF_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar3_prefetch_check : if pf1_sriov_vf_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar4_enabled_check : if pf1_sriov_vf_bar4_enabled /= "PF1_SRIOV_VF_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar4_prefetch_check : if pf1_sriov_vf_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar4_type_check : if pf1_sriov_vf_bar4_type /= "PF1_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar5_enabled_check : if pf1_sriov_vf_bar5_enabled /= "PF1_SRIOV_VF_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar5_prefetch_check : if pf1_sriov_vf_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar0_enabled_check : if pf2_pci_type0_bar0_enabled /= "PF2_PCI_TYPE0_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar0_prefetch_check : if pf2_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar0_type_check : if pf2_bar0_type /= "PF2_BAR0_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar1_enabled_check : if pf2_pci_type0_bar1_enabled /= "PF2_PCI_TYPE0_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar1_prefetch_check : if pf2_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar2_enabled_check : if pf2_pci_type0_bar2_enabled /= "PF2_PCI_TYPE0_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar2_prefetch_check : if pf2_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar2_type_check : if pf2_bar2_type /= "PF2_BAR2_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar3_enabled_check : if pf2_pci_type0_bar3_enabled /= "PF2_PCI_TYPE0_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar3_prefetch_check : if pf2_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar4_enabled_check : if pf2_pci_type0_bar4_enabled /= "PF2_PCI_TYPE0_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar4_prefetch_check : if pf2_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar4_type_check : if pf2_bar4_type /= "PF2_BAR4_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar5_enabled_check : if pf2_pci_type0_bar5_enabled /= "PF2_PCI_TYPE0_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_bar5_prefetch_check : if pf2_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_rom_bar_enable_check : if pf2_rom_bar_enable /= "PF2_ROM_BAR_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_rom_mask_check : if pf2_rom_mask /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_rom_bar_enabled_check : if pf2_rom_bar_enabled /= "PF2_ROM_BAR_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar0_enabled_check : if pf2_sriov_vf_bar0_enabled /= "PF2_SRIOV_VF_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar0_prefetch_check : if pf2_sriov_vf_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar0_type_check : if pf2_sriov_vf_bar0_type /= "PF2_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar1_enabled_check : if pf2_sriov_vf_bar1_enabled /= "PF2_SRIOV_VF_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar1_prefetch_check : if pf2_sriov_vf_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar2_enabled_check : if pf2_sriov_vf_bar2_enabled /= "PF2_SRIOV_VF_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar2_prefetch_check : if pf2_sriov_vf_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar2_type_check : if pf2_sriov_vf_bar2_type /= "PF2_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar3_enabled_check : if pf2_sriov_vf_bar3_enabled /= "PF2_SRIOV_VF_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar3_prefetch_check : if pf2_sriov_vf_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar4_enabled_check : if pf2_sriov_vf_bar4_enabled /= "PF2_SRIOV_VF_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar4_prefetch_check : if pf2_sriov_vf_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar4_type_check : if pf2_sriov_vf_bar4_type /= "PF2_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar5_enabled_check : if pf2_sriov_vf_bar5_enabled /= "PF2_SRIOV_VF_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar5_prefetch_check : if pf2_sriov_vf_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar0_enabled_check : if pf3_pci_type0_bar0_enabled /= "PF3_PCI_TYPE0_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar0_prefetch_check : if pf3_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar0_type_check : if pf3_bar0_type /= "PF3_BAR0_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar1_enabled_check : if pf3_pci_type0_bar1_enabled /= "PF3_PCI_TYPE0_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar1_prefetch_check : if pf3_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar2_enabled_check : if pf3_pci_type0_bar2_enabled /= "PF3_PCI_TYPE0_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar2_prefetch_check : if pf3_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar2_type_check : if pf3_bar2_type /= "PF3_BAR2_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar3_enabled_check : if pf3_pci_type0_bar3_enabled /= "PF3_PCI_TYPE0_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar3_prefetch_check : if pf3_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar4_enabled_check : if pf3_pci_type0_bar4_enabled /= "PF3_PCI_TYPE0_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar4_prefetch_check : if pf3_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar4_type_check : if pf3_bar4_type /= "PF3_BAR4_TYPE_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar5_enabled_check : if pf3_pci_type0_bar5_enabled /= "PF3_PCI_TYPE0_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_bar5_prefetch_check : if pf3_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_rom_bar_enable_check : if pf3_rom_bar_enable /= "PF3_ROM_BAR_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_rom_mask_check : if pf3_rom_mask /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_rom_bar_enabled_check : if pf3_rom_bar_enabled /= "PF3_ROM_BAR_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar0_enabled_check : if pf3_sriov_vf_bar0_enabled /= "PF3_SRIOV_VF_BAR0_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar0_prefetch_check : if pf3_sriov_vf_bar0_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar0_type_check : if pf3_sriov_vf_bar0_type /= "PF3_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar1_enabled_check : if pf3_sriov_vf_bar1_enabled /= "PF3_SRIOV_VF_BAR1_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar1_prefetch_check : if pf3_sriov_vf_bar1_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar2_enabled_check : if pf3_sriov_vf_bar2_enabled /= "PF3_SRIOV_VF_BAR2_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar2_prefetch_check : if pf3_sriov_vf_bar2_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar2_type_check : if pf3_sriov_vf_bar2_type /= "PF3_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar3_enabled_check : if pf3_sriov_vf_bar3_enabled /= "PF3_SRIOV_VF_BAR3_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar3_prefetch_check : if pf3_sriov_vf_bar3_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar4_enabled_check : if pf3_sriov_vf_bar4_enabled /= "PF3_SRIOV_VF_BAR4_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar4_prefetch_check : if pf3_sriov_vf_bar4_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar4_type_check : if pf3_sriov_vf_bar4_type /= "PF3_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar5_enabled_check : if pf3_sriov_vf_bar5_enabled /= "PF3_SRIOV_VF_BAR5_ENABLED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar5_prefetch_check : if pf3_sriov_vf_bar5_prefetch /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_enable_check : if pf1_enable /= "PF1_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_enable_check : if pf2_enable /= "PF2_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_enable_check : if pf3_enable /= "PF3_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_enable_check : if pf0_sriov_enable /= "PF0_SRIOV_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_enable_check : if pf1_sriov_enable /= "PF1_SRIOV_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_enable_check : if pf2_sriov_enable /= "PF2_SRIOV_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_enable_check : if pf3_sriov_enable /= "PF3_SRIOV_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_cap_sup_page_size_check : if pf0_sriov_cap_sup_page_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_cap_sup_page_size_check : if pf1_sriov_cap_sup_page_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_cap_sup_page_size_check : if pf2_sriov_cap_sup_page_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_cap_sup_page_size_check : if pf3_sriov_cap_sup_page_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_num_vf_check : if pf0_sriov_num_vf /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_num_vf_check : if pf1_sriov_num_vf /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_num_vf_check : if pf2_sriov_num_vf /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_num_vf_check : if pf3_sriov_num_vf /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_msi_enable_check : if pf0_msi_enable /= "PF0_MSI_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msi_ext_data_cap_check : if pf0_pci_msi_ext_data_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msi_ext_data_en_check : if pf0_pci_msi_ext_data_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msi_64_bit_addr_cap_check : if pf0_pci_msi_64_bit_addr_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msi_multiple_msg_cap_check : if pf0_pci_msi_multiple_msg_cap /= "PF0_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_msix_enable_check : if pf0_msix_enable /= "PF0_MSIX_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_table_size_check : if pf0_pci_msix_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_table_offset_check : if pf0_pci_msix_table_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_bir_check : if pf0_pci_msix_bir /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_pba_check : if pf0_pci_msix_pba /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_pba_offset_check : if pf0_pci_msix_pba_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_msix_table_size_vfcomm_cs2_check : if pf0_pci_msix_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_exvf_msix_cap_enable_check : if pf0_exvf_msix_cap_enable /= "PF0_EXVF_MSIX_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msix_tablesize_pf0_check : if exvf_msix_tablesize_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_offset_pf0_check : if exvf_msixtable_offset_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_bir_pf0_check : if exvf_msixtable_bir_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_offset_pf0_check : if exvf_msixpba_offset_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_bir_pf0_check : if exvf_msixpba_bir_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_msi_enable_check : if pf1_msi_enable /= "PF1_MSI_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msi_ext_data_cap_check : if pf1_pci_msi_ext_data_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msi_ext_data_en_check : if pf1_pci_msi_ext_data_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msi_64_bit_addr_cap_check : if pf1_pci_msi_64_bit_addr_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msi_multiple_msg_cap_check : if pf1_pci_msi_multiple_msg_cap /= "PF1_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_msix_enable_check : if pf1_msix_enable /= "PF1_MSIX_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_table_size_check : if pf1_pci_msix_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_table_offset_check : if pf1_pci_msix_table_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_bir_check : if pf1_pci_msix_bir /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_pba_check : if pf1_pci_msix_pba /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_pba_offset_check : if pf1_pci_msix_pba_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_msix_table_size_vfcomm_cs2_check : if pf1_pci_msix_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_exvf_msix_cap_enable_check : if pf1_exvf_msix_cap_enable /= "PF1_EXVF_MSIX_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msix_tablesize_pf1_check : if exvf_msix_tablesize_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_offset_pf1_check : if exvf_msixtable_offset_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_bir_pf1_check : if exvf_msixtable_bir_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_offset_pf1_check : if exvf_msixpba_offset_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_bir_pf1_check : if exvf_msixpba_bir_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_msi_enable_check : if pf2_msi_enable /= "PF2_MSI_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msi_ext_data_cap_check : if pf2_pci_msi_ext_data_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msi_ext_data_en_check : if pf2_pci_msi_ext_data_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msi_64_bit_addr_cap_check : if pf2_pci_msi_64_bit_addr_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msi_multiple_msg_cap_check : if pf2_pci_msi_multiple_msg_cap /= "PF2_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_msix_enable_check : if pf2_msix_enable /= "PF2_MSIX_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_bir_check : if pf2_pci_msix_bir /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_pba_check : if pf2_pci_msix_pba /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_pba_offset_check : if pf2_pci_msix_pba_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_table_offset_check : if pf2_pci_msix_table_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_table_size_check : if pf2_pci_msix_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_msix_table_size_vfcomm_cs2_check : if pf2_pci_msix_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_exvf_msix_cap_enable_check : if pf2_exvf_msix_cap_enable /= "PF2_EXVF_MSIX_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msix_tablesize_pf2_check : if exvf_msix_tablesize_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_offset_pf2_check : if exvf_msixtable_offset_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_bir_pf2_check : if exvf_msixtable_bir_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_offset_pf2_check : if exvf_msixpba_offset_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_bir_pf2_check : if exvf_msixpba_bir_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_msi_enable_check : if pf3_msi_enable /= "PF3_MSI_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msi_ext_data_cap_check : if pf3_pci_msi_ext_data_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msi_ext_data_en_check : if pf3_pci_msi_ext_data_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msi_64_bit_addr_cap_check : if pf3_pci_msi_64_bit_addr_cap /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msi_multiple_msg_cap_check : if pf3_pci_msi_multiple_msg_cap /= "PF3_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_msix_enable_check : if pf3_msix_enable /= "PF3_MSIX_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_bir_check : if pf3_pci_msix_bir /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_pba_check : if pf3_pci_msix_pba /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_pba_offset_check : if pf3_pci_msix_pba_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_table_offset_check : if pf3_pci_msix_table_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_table_size_check : if pf3_pci_msix_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_msix_table_size_vfcomm_cs2_check : if pf3_pci_msix_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_exvf_msix_cap_enable_check : if pf3_exvf_msix_cap_enable /= "PF3_EXVF_MSIX_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msix_tablesize_pf3_check : if exvf_msix_tablesize_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_offset_pf3_check : if exvf_msixtable_offset_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixtable_bir_pf3_check : if exvf_msixtable_bir_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_offset_pf3_check : if exvf_msixpba_offset_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_msixpba_bir_pf3_check : if exvf_msixpba_bir_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_prs_ext_cap_enable_check : if pf0_prs_ext_cap_enable /= "PF0_PRS_EXT_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_prs_ext_cap_outstanding_capacity_check : if pf0_prs_ext_cap_outstanding_capacity /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_prs_ext_cap_enable_check : if pf1_prs_ext_cap_enable /= "PF1_PRS_EXT_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_prs_ext_cap_outstanding_capacity_check : if pf1_prs_ext_cap_outstanding_capacity /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_prs_ext_cap_enable_check : if pf2_prs_ext_cap_enable /= "PF2_PRS_EXT_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_prs_ext_cap_outstanding_capacity_check : if pf2_prs_ext_cap_outstanding_capacity /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_prs_ext_cap_enable_check : if pf3_prs_ext_cap_enable /= "PF3_PRS_EXT_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_prs_ext_cap_outstanding_capacity_check : if pf3_prs_ext_cap_outstanding_capacity /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pasid_cap_enable_check : if pf0_pasid_cap_enable /= "PF0_PASID_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pasid_cap_execute_permission_supported_check : if pf0_pasid_cap_execute_permission_supported /= "PF0_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pasid_cap_max_pasid_width_check : if pf0_pasid_cap_max_pasid_width /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pasid_cap_privileged_mode_supported_check : if pf0_pasid_cap_privileged_mode_supported /= "PF0_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pasid_cap_enable_check : if pf1_pasid_cap_enable /= "PF1_PASID_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pasid_cap_execute_permission_supported_check : if pf1_pasid_cap_execute_permission_supported /= "PF1_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pasid_cap_max_pasid_width_check : if pf1_pasid_cap_max_pasid_width /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pasid_cap_privileged_mode_supported_check : if pf1_pasid_cap_privileged_mode_supported /= "PF1_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pasid_cap_enable_check : if pf2_pasid_cap_enable /= "PF2_PASID_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pasid_cap_execute_permission_supported_check : if pf2_pasid_cap_execute_permission_supported /= "PF2_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pasid_cap_max_pasid_width_check : if pf2_pasid_cap_max_pasid_width /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pasid_cap_privileged_mode_supported_check : if pf2_pasid_cap_privileged_mode_supported /= "PF2_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pasid_cap_enable_check : if pf3_pasid_cap_enable /= "PF3_PASID_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pasid_cap_execute_permission_supported_check : if pf3_pasid_cap_execute_permission_supported /= "PF3_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pasid_cap_max_pasid_width_check : if pf3_pasid_cap_max_pasid_width /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pasid_cap_privileged_mode_supported_check : if pf3_pasid_cap_privileged_mode_supported /= "PF3_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sn_cap_enable_check : if pf0_sn_cap_enable /= "PF0_SN_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sn_cap_enable_check : if pf1_sn_cap_enable /= "PF1_SN_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sn_cap_enable_check : if pf2_sn_cap_enable /= "PF2_SN_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sn_cap_enable_check : if pf3_sn_cap_enable /= "PF3_SN_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_ep_l0s_accpt_latency_check : if pf0_pcie_cap_ep_l0s_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_ep_l1_accpt_latency_check : if pf0_pcie_cap_ep_l1_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_l0s_exit_latency_commclk_dis_check : if pf0_pcie_cap_l0s_exit_latency_commclk_dis /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_l1_exit_latency_commclk_dis_check : if pf0_pcie_cap_l1_exit_latency_commclk_dis /= 7 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_ep_l0s_accpt_latency_check : if pf1_pcie_cap_ep_l0s_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_ep_l1_accpt_latency_check : if pf1_pcie_cap_ep_l1_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_l0s_exit_latency_commclk_dis_check : if pf1_pcie_cap_l0s_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_l1_exit_latency_commclk_dis_check : if pf1_pcie_cap_l1_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_ep_l0s_accpt_latency_check : if pf2_pcie_cap_ep_l0s_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_ep_l1_accpt_latency_check : if pf2_pcie_cap_ep_l1_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_l0s_exit_latency_commclk_dis_check : if pf2_pcie_cap_l0s_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_l1_exit_latency_commclk_dis_check : if pf2_pcie_cap_l1_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_ep_l0s_accpt_latency_check : if pf3_pcie_cap_ep_l0s_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_ep_l1_accpt_latency_check : if pf3_pcie_cap_ep_l1_accpt_latency /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_l0s_exit_latency_commclk_dis_check : if pf3_pcie_cap_l0s_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_l1_exit_latency_commclk_dis_check : if pf3_pcie_cap_l1_exit_latency_commclk_dis /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	aspm_support_check : if aspm_support /= "ASPM_SUPPORT_L0S_L1" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	dbi_ro_wr_disable_check : if dbi_ro_wr_disable /= "DBI_RO_WR_DISABLE_ENABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_gen3_eq_pset_req_vec_check : if pf0_gen3_eq_pset_req_vec /= 292 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_gen3_eq_pset_req_vec_atg4_check : if pf0_gen3_eq_pset_req_vec_atg4 /= 352 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_flr_cap_check : if pf0_pcie_cap_flr_cap /= "PF0_PCIE_CAP_FLR_CAP_NOT_CAPABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_flr_cap_check : if pf1_pcie_cap_flr_cap /= "PF1_PCIE_CAP_FLR_CAP_NOT_CAPABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_flr_cap_check : if pf2_pcie_cap_flr_cap /= "PF2_PCIE_CAP_FLR_CAP_NOT_CAPABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_flr_cap_check : if pf3_pcie_cap_flr_cap /= "PF3_PCIE_CAP_FLR_CAP_NOT_CAPABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_port_num_check : if pf0_pcie_cap_port_num /= 1 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_port_num_check : if pf1_pcie_cap_port_num /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_port_num_check : if pf2_pcie_cap_port_num /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_port_num_check : if pf3_pcie_cap_port_num /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_slot_clk_config_check : if pf0_pcie_cap_slot_clk_config /= "true" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_slot_clk_config_check : if pf1_pcie_cap_slot_clk_config /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_slot_clk_config_check : if pf2_pcie_cap_slot_clk_config /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_slot_clk_config_check : if pf3_pcie_cap_slot_clk_config /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_ltr_cap_enable_check : if pf0_ltr_cap_enable /= "PF0_LTR_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_slot_imp_check : if pf0_pcie_slot_imp /= "PF0_PCIE_SLOT_IMP_NOT_IMPLEMENTED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_slot_power_limit_scale_check : if pf0_pcie_cap_slot_power_limit_scale /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_slot_power_limit_value_check : if pf0_pcie_cap_slot_power_limit_value /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_phy_slot_num_check : if pf0_pcie_cap_phy_slot_num /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_hot_plug_capable_check : if pf0_pcie_cap_hot_plug_capable /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pcie_cap_ext_tag_en_check : if pf0_pcie_cap_ext_tag_en /= "true" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pcie_cap_ext_tag_en_check : if pf1_pcie_cap_ext_tag_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pcie_cap_ext_tag_en_check : if pf2_pcie_cap_ext_tag_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pcie_cap_ext_tag_en_check : if pf3_pcie_cap_ext_tag_en /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	cfg_ptm_auto_update_signal_check : if cfg_ptm_auto_update_signal /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	ptm_autoupdate_check : if ptm_autoupdate /= "PTM_AUTOUPDATE_AUTOUPDATE_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	ptm_enable_check : if ptm_enable /= "PTM_ENABLE_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_ats_cap_enable_check : if pf0_ats_cap_enable /= "PF0_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_exvf_ats_cap_enable_check : if pf0_exvf_ats_cap_enable /= "PF0_EXVF_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_ats_cap_invalidate_q_depth_check : if pf0_ats_cap_invalidate_q_depth /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_ats_exvf_align_request_check : if pf0_ats_exvf_align_request /= "PF0_ATS_EXVF_ALIGN_REQUEST_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_ats_cap_enable_check : if pf1_ats_cap_enable /= "PF1_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_exvf_ats_cap_enable_check : if pf1_exvf_ats_cap_enable /= "PF1_EXVF_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_ats_cap_invalidate_q_depth_check : if pf1_ats_cap_invalidate_q_depth /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_ats_exvf_align_request_check : if pf1_ats_exvf_align_request /= "PF1_ATS_EXVF_ALIGN_REQUEST_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_ats_cap_enable_check : if pf2_ats_cap_enable /= "PF2_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_exvf_ats_cap_enable_check : if pf2_exvf_ats_cap_enable /= "PF2_EXVF_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_ats_cap_invalidate_q_depth_check : if pf2_ats_cap_invalidate_q_depth /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_ats_exvf_align_request_check : if pf2_ats_exvf_align_request /= "PF2_ATS_EXVF_ALIGN_REQUEST_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_ats_cap_enable_check : if pf3_ats_cap_enable /= "PF3_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_exvf_ats_cap_enable_check : if pf3_exvf_ats_cap_enable /= "PF3_EXVF_ATS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_ats_cap_invalidate_q_depth_check : if pf3_ats_cap_invalidate_q_depth /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_ats_exvf_align_request_check : if pf3_ats_exvf_align_request /= "PF3_ATS_EXVF_ALIGN_REQUEST_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_cap_enable_check : if pf0_tph_cap_enable /= "PF0_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_int_vec_check : if pf0_tph_req_cap_int_vec /= "PF0_TPH_REQ_CAP_INT_VEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_int_vec_vfcomm_cs2_check : if pf0_tph_req_cap_int_vec_vfcomm_cs2 /= "PF0_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_st_table_loc_0_vfcomm_cs2_check : if pf0_tph_req_cap_st_table_loc_0_vfcomm_cs2 /= "PF0_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_st_table_loc_1_check : if pf0_tph_req_cap_st_table_loc_1 /= "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_st_table_loc_1_vfcomm_cs2_check : if pf0_tph_req_cap_st_table_loc_1_vfcomm_cs2 /= "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_st_table_size_check : if pf0_tph_req_cap_st_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_cap_st_table_size_vfcomm_cs2_check : if pf0_tph_req_cap_st_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_device_spec_check : if pf0_tph_req_device_spec /= "PF0_TPH_REQ_DEVICE_SPEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_tph_req_device_spec_vfcomm_cs2_check : if pf0_tph_req_device_spec_vfcomm_cs2 /= "PF0_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_exvf_tph_cap_enable_check : if pf0_exvf_tph_cap_enable /= "PF0_EXVF_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablelocation_pf0_check : if exvf_tph_sttablelocation_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablesize_pf0_check : if exvf_tph_sttablesize_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_cap_enable_check : if pf1_tph_cap_enable /= "PF1_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_int_vec_check : if pf1_tph_req_cap_int_vec /= "PF1_TPH_REQ_CAP_INT_VEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_int_vec_vfcomm_cs2_check : if pf1_tph_req_cap_int_vec_vfcomm_cs2 /= "PF1_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_st_table_loc_0_vfcomm_cs2_check : if pf1_tph_req_cap_st_table_loc_0_vfcomm_cs2 /= "PF1_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_st_table_loc_1_check : if pf1_tph_req_cap_st_table_loc_1 /= "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_st_table_loc_1_vfcomm_cs2_check : if pf1_tph_req_cap_st_table_loc_1_vfcomm_cs2 /= "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_st_table_size_check : if pf1_tph_req_cap_st_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_cap_st_table_size_vfcomm_cs2_check : if pf1_tph_req_cap_st_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_device_spec_check : if pf1_tph_req_device_spec /= "PF1_TPH_REQ_DEVICE_SPEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_tph_req_device_spec_vfcomm_cs2_check : if pf1_tph_req_device_spec_vfcomm_cs2 /= "PF1_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_exvf_tph_cap_enable_check : if pf1_exvf_tph_cap_enable /= "PF1_EXVF_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablelocation_pf1_check : if exvf_tph_sttablelocation_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablesize_pf1_check : if exvf_tph_sttablesize_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_cap_enable_check : if pf2_tph_cap_enable /= "PF2_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_int_vec_check : if pf2_tph_req_cap_int_vec /= "PF2_TPH_REQ_CAP_INT_VEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_int_vec_vfcomm_cs2_check : if pf2_tph_req_cap_int_vec_vfcomm_cs2 /= "PF2_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_st_table_loc_0_vfcomm_cs2_check : if pf2_tph_req_cap_st_table_loc_0_vfcomm_cs2 /= "PF2_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_st_table_loc_1_check : if pf2_tph_req_cap_st_table_loc_1 /= "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_st_table_loc_1_vfcomm_cs2_check : if pf2_tph_req_cap_st_table_loc_1_vfcomm_cs2 /= "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_st_table_size_check : if pf2_tph_req_cap_st_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_cap_st_table_size_vfcomm_cs2_check : if pf2_tph_req_cap_st_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_device_spec_check : if pf2_tph_req_device_spec /= "PF2_TPH_REQ_DEVICE_SPEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_tph_req_device_spec_vfcomm_cs2_check : if pf2_tph_req_device_spec_vfcomm_cs2 /= "PF2_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_exvf_tph_cap_enable_check : if pf2_exvf_tph_cap_enable /= "PF2_EXVF_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablelocation_pf2_check : if exvf_tph_sttablelocation_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablesize_pf2_check : if exvf_tph_sttablesize_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_cap_enable_check : if pf3_tph_cap_enable /= "PF3_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_int_vec_check : if pf3_tph_req_cap_int_vec /= "PF3_TPH_REQ_CAP_INT_VEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_int_vec_vfcomm_cs2_check : if pf3_tph_req_cap_int_vec_vfcomm_cs2 /= "PF3_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_st_table_loc_0_vfcomm_cs2_check : if pf3_tph_req_cap_st_table_loc_0_vfcomm_cs2 /= "PF3_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_st_table_loc_1_check : if pf3_tph_req_cap_st_table_loc_1 /= "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_st_table_loc_1_vfcomm_cs2_check : if pf3_tph_req_cap_st_table_loc_1_vfcomm_cs2 /= "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_st_table_size_check : if pf3_tph_req_cap_st_table_size /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_cap_st_table_size_vfcomm_cs2_check : if pf3_tph_req_cap_st_table_size_vfcomm_cs2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_device_spec_check : if pf3_tph_req_device_spec /= "PF3_TPH_REQ_DEVICE_SPEC_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_tph_req_device_spec_vfcomm_cs2_check : if pf3_tph_req_device_spec_vfcomm_cs2 /= "PF3_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_exvf_tph_cap_enable_check : if pf3_exvf_tph_cap_enable /= "PF3_EXVF_TPH_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablelocation_pf3_check : if exvf_tph_sttablelocation_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_tph_sttablesize_pf3_check : if exvf_tph_sttablesize_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_enable_check : if pf0_acs_cap_enable /= "PF0_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_exvf_acs_cap_enable_check : if pf0_exvf_acs_cap_enable /= "PF0_EXVF_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_src_valid_check : if pf0_acs_cap_acs_src_valid /= "PF0_ACS_CAP_ACS_SRC_VALID_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_at_block_check : if pf0_acs_cap_acs_at_block /= "PF0_ACS_CAP_ACS_AT_BLOCK_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_p2p_req_redirect_check : if pf0_acs_cap_acs_p2p_req_redirect /= "PF0_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_p2p_cpl_redirect_check : if pf0_acs_cap_acs_p2p_cpl_redirect /= "PF0_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_usp_forwarding_check : if pf0_acs_cap_acs_usp_forwarding /= "PF0_ACS_CAP_ACS_USP_FORWARDING_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_p2p_egress_control_check : if pf0_acs_cap_acs_p2p_egress_control /= "PF0_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_egress_ctrl_size_check : if pf0_acs_cap_acs_egress_ctrl_size /= 8 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_acs_cap_acs_direct_translated_p2p_check : if pf0_acs_cap_acs_direct_translated_p2p /= "PF0_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_enable_check : if pf1_acs_cap_enable /= "PF1_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_exvf_acs_cap_enable_check : if pf1_exvf_acs_cap_enable /= "PF1_EXVF_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_src_valid_check : if pf1_acs_cap_acs_src_valid /= "PF1_ACS_CAP_ACS_SRC_VALID_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_at_block_check : if pf1_acs_cap_acs_at_block /= "PF1_ACS_CAP_ACS_AT_BLOCK_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_p2p_req_redirect_check : if pf1_acs_cap_acs_p2p_req_redirect /= "PF1_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_p2p_cpl_redirect_check : if pf1_acs_cap_acs_p2p_cpl_redirect /= "PF1_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_usp_forwarding_check : if pf1_acs_cap_acs_usp_forwarding /= "PF1_ACS_CAP_ACS_USP_FORWARDING_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_p2p_egress_control_check : if pf1_acs_cap_acs_p2p_egress_control /= "PF1_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_egress_ctrl_size_check : if pf1_acs_cap_acs_egress_ctrl_size /= 8 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_acs_cap_acs_direct_translated_p2p_check : if pf1_acs_cap_acs_direct_translated_p2p /= "PF1_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_enable_check : if pf2_acs_cap_enable /= "PF2_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_exvf_acs_cap_enable_check : if pf2_exvf_acs_cap_enable /= "PF2_EXVF_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_src_valid_check : if pf2_acs_cap_acs_src_valid /= "PF2_ACS_CAP_ACS_SRC_VALID_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_at_block_check : if pf2_acs_cap_acs_at_block /= "PF2_ACS_CAP_ACS_AT_BLOCK_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_p2p_req_redirect_check : if pf2_acs_cap_acs_p2p_req_redirect /= "PF2_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_p2p_cpl_redirect_check : if pf2_acs_cap_acs_p2p_cpl_redirect /= "PF2_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_usp_forwarding_check : if pf2_acs_cap_acs_usp_forwarding /= "PF2_ACS_CAP_ACS_USP_FORWARDING_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_p2p_egress_control_check : if pf2_acs_cap_acs_p2p_egress_control /= "PF2_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_egress_ctrl_size_check : if pf2_acs_cap_acs_egress_ctrl_size /= 8 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_acs_cap_acs_direct_translated_p2p_check : if pf2_acs_cap_acs_direct_translated_p2p /= "PF2_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_enable_check : if pf3_acs_cap_enable /= "PF3_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_exvf_acs_cap_enable_check : if pf3_exvf_acs_cap_enable /= "PF3_EXVF_ACS_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_src_valid_check : if pf3_acs_cap_acs_src_valid /= "PF3_ACS_CAP_ACS_SRC_VALID_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_at_block_check : if pf3_acs_cap_acs_at_block /= "PF3_ACS_CAP_ACS_AT_BLOCK_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_p2p_req_redirect_check : if pf3_acs_cap_acs_p2p_req_redirect /= "PF3_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_p2p_cpl_redirect_check : if pf3_acs_cap_acs_p2p_cpl_redirect /= "PF3_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_usp_forwarding_check : if pf3_acs_cap_acs_usp_forwarding /= "PF3_ACS_CAP_ACS_USP_FORWARDING_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_p2p_egress_control_check : if pf3_acs_cap_acs_p2p_egress_control /= "PF3_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_egress_ctrl_size_check : if pf3_acs_cap_acs_egress_ctrl_size /= 8 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_acs_cap_acs_direct_translated_p2p_check : if pf3_acs_cap_acs_direct_translated_p2p /= "PF3_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_virtio_en_check : if pf0_virtio_en /= "PF0_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_virtio_en_check : if pf1_virtio_en /= "PF1_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_virtio_en_check : if pf2_virtio_en /= "PF2_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_virtio_en_check : if pf3_virtio_en /= "PF3_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_exvf_virtio_en_check : if pf0_exvf_virtio_en /= "PF0_EXVF_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_exvf_virtio_en_check : if pf1_exvf_virtio_en /= "PF1_EXVF_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_exvf_virtio_en_check : if pf2_exvf_virtio_en /= "PF2_EXVF_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_exvf_virtio_en_check : if pf3_exvf_virtio_en /= "PF3_EXVF_VIRTIO_EN_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_device_id_check : if pf0_pci_type0_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_vendor_id_check : if pf0_pci_type0_vendor_id /= 4466 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_revision_id_check : if pf0_revision_id /= 1 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_base_class_code_check : if pf0_base_class_code /= 255 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_subclass_code_check : if pf0_subclass_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_program_interface_check : if pf0_program_interface /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_subsys_vendor_id_check : if pf0_subsys_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_subsys_dev_id_check : if pf0_subsys_dev_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_device_id_check : if pf0_sriov_vf_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_subsysid_pf0_check : if exvf_subsysid_pf0 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_vendor_id_check : if pf1_pci_type0_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_device_id_check : if pf1_pci_type0_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_revision_id_check : if pf1_revision_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_base_class_code_check : if pf1_base_class_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_subclass_code_check : if pf1_subclass_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_program_interface_check : if pf1_program_interface /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_subsys_vendor_id_check : if pf1_subsys_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_subsys_dev_id_check : if pf1_subsys_dev_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_device_id_check : if pf1_sriov_vf_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_subsysid_pf1_check : if exvf_subsysid_pf1 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_vendor_id_check : if pf2_pci_type0_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_device_id_check : if pf2_pci_type0_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_revision_id_check : if pf2_revision_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_base_class_code_check : if pf2_base_class_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_subclass_code_check : if pf2_subclass_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_program_interface_check : if pf2_program_interface /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_subsys_vendor_id_check : if pf2_subsys_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_subsys_dev_id_check : if pf2_subsys_dev_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_device_id_check : if pf2_sriov_vf_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_subsysid_pf2_check : if exvf_subsysid_pf2 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_vendor_id_check : if pf3_pci_type0_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_device_id_check : if pf3_pci_type0_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_revision_id_check : if pf3_revision_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_base_class_code_check : if pf3_base_class_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_subclass_code_check : if pf3_subclass_code /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_program_interface_check : if pf3_program_interface /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_subsys_vendor_id_check : if pf3_subsys_vendor_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_subsys_dev_id_check : if pf3_subsys_dev_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_device_id_check : if pf3_sriov_vf_device_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	exvf_subsysid_pf3_check : if exvf_subsysid_pf3 /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	vsec_select_check : if vsec_select /= "false" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_user_vsec_cap_enable_check : if pf0_user_vsec_cap_enable /= "PF0_USER_VSEC_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_user_vsec_cap_enable_check : if pf1_user_vsec_cap_enable /= "PF1_USER_VSEC_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_user_vsec_cap_enable_check : if pf2_user_vsec_cap_enable /= "PF2_USER_VSEC_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_user_vsec_cap_enable_check : if pf3_user_vsec_cap_enable /= "PF3_USER_VSEC_CAP_ENABLE_DISABLED" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	vsec_next_offset_check : if vsec_next_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_user_vsec_offset_check : if pf1_user_vsec_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_user_vsec_offset_check : if pf2_user_vsec_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_user_vsec_offset_check : if pf3_user_vsec_offset /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	cvp_vendor_specific_header_id_check : if cvp_vendor_specific_header_id /= 0 generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	drop_vendor0_msg_check : if drop_vendor0_msg /= "FALSE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	drop_vendor1_msg_check : if drop_vendor1_msg /= "FALSE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	num_of_lanes_check : if num_of_lanes /= "NUM_OF_LANES_NUM_4" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_int_pin_check : if pf0_int_pin /= "PF0_INT_PIN_NO_INT" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_int_pin_check : if pf1_int_pin /= "PF1_INT_PIN_NO_INT" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_int_pin_check : if pf2_int_pin /= "PF2_INT_PIN_NO_INT" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_int_pin_check : if pf3_int_pin /= "PF3_INT_PIN_NO_INT" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	dtk_mode_en_check : if dtk_mode_en /= "DTK_MODE_EN_ENABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	ecrc_strip_check : if ecrc_strip /= "ECRC_STRIP_ENABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_port_logic_fast_link_mode_check : if pf0_port_logic_fast_link_mode /= "PF0_PORT_LOGIC_FAST_LINK_MODE_DISABLE" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_prefetch_decode_check : if pf0_prefetch_decode /= "PF0_PREFETCH_DECODE_PREF32" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	sys_clk_hz_check : if sys_clk_hz /= "00010001111000011010001100000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pclk_clk_hz_check : if pclk_clk_hz /= "00011101110011010110010100000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sn_ser_num_reg_1_dw_check : if pf0_sn_ser_num_reg_1_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sn_ser_num_reg_1_dw_check : if pf1_sn_ser_num_reg_1_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sn_ser_num_reg_1_dw_check : if pf2_sn_ser_num_reg_1_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sn_ser_num_reg_1_dw_check : if pf3_sn_ser_num_reg_1_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sn_ser_num_reg_2_dw_check : if pf0_sn_ser_num_reg_2_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sn_ser_num_reg_2_dw_check : if pf1_sn_ser_num_reg_2_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sn_ser_num_reg_2_dw_check : if pf2_sn_ser_num_reg_2_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sn_ser_num_reg_2_dw_check : if pf3_sn_ser_num_reg_2_dw /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar0_mask_31_1_check : if pf0_pci_type0_bar0_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar1_mask_31_0_check : if pf0_pci_type0_bar1_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar2_mask_31_1_check : if pf0_pci_type0_bar2_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar3_mask_31_0_check : if pf0_pci_type0_bar3_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar4_mask_31_1_check : if pf0_pci_type0_bar4_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_pci_type0_bar5_mask_31_0_check : if pf0_pci_type0_bar5_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar0_mask_31_1_check : if pf1_pci_type0_bar0_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar1_mask_31_0_check : if pf1_pci_type0_bar1_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar2_mask_31_1_check : if pf1_pci_type0_bar2_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar3_mask_31_0_check : if pf1_pci_type0_bar3_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar4_mask_31_1_check : if pf1_pci_type0_bar4_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_pci_type0_bar5_mask_31_0_check : if pf1_pci_type0_bar5_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar0_mask_31_1_check : if pf2_pci_type0_bar0_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar1_mask_31_0_check : if pf2_pci_type0_bar1_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar2_mask_31_1_check : if pf2_pci_type0_bar2_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar3_mask_31_0_check : if pf2_pci_type0_bar3_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar4_mask_31_1_check : if pf2_pci_type0_bar4_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_pci_type0_bar5_mask_31_0_check : if pf2_pci_type0_bar5_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar0_mask_31_1_check : if pf3_pci_type0_bar0_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar1_mask_31_0_check : if pf3_pci_type0_bar1_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar2_mask_31_1_check : if pf3_pci_type0_bar2_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar3_mask_31_0_check : if pf3_pci_type0_bar3_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar4_mask_31_1_check : if pf3_pci_type0_bar4_mask_31_1 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_pci_type0_bar5_mask_31_0_check : if pf3_pci_type0_bar5_mask_31_0 /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar0_mask_check : if pf0_sriov_vf_bar0_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar1_mask_check : if pf0_sriov_vf_bar1_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar2_mask_check : if pf0_sriov_vf_bar2_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar3_mask_check : if pf0_sriov_vf_bar3_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar4_mask_check : if pf0_sriov_vf_bar4_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf0_sriov_vf_bar5_mask_check : if pf0_sriov_vf_bar5_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar0_mask_check : if pf1_sriov_vf_bar0_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar1_mask_check : if pf1_sriov_vf_bar1_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar2_mask_check : if pf1_sriov_vf_bar2_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar3_mask_check : if pf1_sriov_vf_bar3_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar4_mask_check : if pf1_sriov_vf_bar4_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf1_sriov_vf_bar5_mask_check : if pf1_sriov_vf_bar5_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar0_mask_check : if pf2_sriov_vf_bar0_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar1_mask_check : if pf2_sriov_vf_bar1_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar2_mask_check : if pf2_sriov_vf_bar2_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar3_mask_check : if pf2_sriov_vf_bar3_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar4_mask_check : if pf2_sriov_vf_bar4_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf2_sriov_vf_bar5_mask_check : if pf2_sriov_vf_bar5_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar0_mask_check : if pf3_sriov_vf_bar0_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar1_mask_check : if pf3_sriov_vf_bar1_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar2_mask_check : if pf3_sriov_vf_bar2_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar3_mask_check : if pf3_sriov_vf_bar3_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar4_mask_check : if pf3_sriov_vf_bar4_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pf3_sriov_vf_bar5_mask_check : if pf3_sriov_vf_bar5_mask /= "00000000000000000000000000000000" generate
		assert false report "Supplied generics do not match expected generics" severity Failure;
	end generate;

	pcie_phip_hal_ctrltop : component gts_axi_streaming_phip_hal_2100_lai7rjq_cmp
		generic map (
			pcie_parity_bypass                         => "true",
			rxbuf_limit_bypass                         => 7,
			maxpayload_size                            => "MAXPAYLOAD_SIZE_MAX_PAYLOAD_512",
			pldclk_rate                                => "PLDCLK_RATE_FAST",
			port_type                                  => "PORT_TYPE_RP",
			sris_enable                                => "SRIS_ENABLE_DISABLED",
			sris_mode                                  => "false",
			sim_mode                                   => "SIM_MODE_DISABLE_VSIM_MODE",
			sup_mode                                   => "SUP_MODE_USER_MODE",
			cvp_enable                                 => "CVP_ENABLE_DISABLED",
			cii_monitor_en                             => "CII_MONITOR_EN_DISABLE",
			pf0_cap_link_surprise_down_err_cap         => "PF0_CAP_LINK_SURPRISE_DOWN_ERR_CAP_DISABLE",
			link_rate                                  => "LINK_RATE_GEN3",
			link_width                                 => "LINK_WIDTH_X4",
			pf0_dsp_16g_tx_preset0                     => 7,
			pf0_dsp_16g_tx_preset1                     => 7,
			pf0_dsp_16g_tx_preset2                     => 7,
			pf0_dsp_16g_tx_preset3                     => 7,
			pf0_dsp_16g_tx_preset4                     => 0,
			pf0_dsp_16g_tx_preset5                     => 0,
			pf0_dsp_16g_tx_preset6                     => 0,
			pf0_dsp_16g_tx_preset7                     => 0,
			pf0_dsp_16g_tx_preset8                     => 0,
			pf0_dsp_16g_tx_preset9                     => 0,
			pf0_dsp_16g_tx_preset10                    => 0,
			pf0_dsp_16g_tx_preset11                    => 0,
			pf0_dsp_16g_tx_preset12                    => 0,
			pf0_dsp_16g_tx_preset13                    => 0,
			pf0_dsp_16g_tx_preset14                    => 0,
			pf0_dsp_16g_tx_preset15                    => 0,
			pf0_dsp_tx_preset0                         => 9,
			pf0_dsp_tx_preset1                         => 9,
			pf0_dsp_tx_preset2                         => 9,
			pf0_dsp_tx_preset3                         => 9,
			pf0_dsp_tx_preset4                         => 0,
			pf0_dsp_tx_preset5                         => 0,
			pf0_dsp_tx_preset6                         => 0,
			pf0_dsp_tx_preset7                         => 0,
			pf0_dsp_tx_preset8                         => 0,
			pf0_dsp_tx_preset9                         => 0,
			pf0_dsp_tx_preset10                        => 0,
			pf0_dsp_tx_preset11                        => 0,
			pf0_dsp_tx_preset12                        => 0,
			pf0_dsp_tx_preset13                        => 0,
			pf0_dsp_tx_preset14                        => 0,
			pf0_dsp_tx_preset15                        => 0,
			pf0_usp_16g_tx_preset0                     => 7,
			pf0_usp_16g_tx_preset1                     => 7,
			pf0_usp_16g_tx_preset2                     => 7,
			pf0_usp_16g_tx_preset3                     => 7,
			pf0_usp_16g_tx_preset4                     => 0,
			pf0_usp_16g_tx_preset5                     => 0,
			pf0_usp_16g_tx_preset6                     => 0,
			pf0_usp_16g_tx_preset7                     => 0,
			pf0_usp_16g_tx_preset8                     => 0,
			pf0_usp_16g_tx_preset9                     => 0,
			pf0_usp_16g_tx_preset10                    => 0,
			pf0_usp_16g_tx_preset11                    => 0,
			pf0_usp_16g_tx_preset12                    => 0,
			pf0_usp_16g_tx_preset13                    => 0,
			pf0_usp_16g_tx_preset14                    => 0,
			pf0_usp_16g_tx_preset15                    => 0,
			pf0_usp_tx_preset0                         => 9,
			pf0_usp_tx_preset1                         => 9,
			pf0_usp_tx_preset2                         => 9,
			pf0_usp_tx_preset3                         => 9,
			pf0_usp_tx_preset4                         => 0,
			pf0_usp_tx_preset5                         => 0,
			pf0_usp_tx_preset6                         => 0,
			pf0_usp_tx_preset7                         => 0,
			pf0_usp_tx_preset8                         => 0,
			pf0_usp_tx_preset9                         => 0,
			pf0_usp_tx_preset10                        => 0,
			pf0_usp_tx_preset11                        => 0,
			pf0_usp_tx_preset12                        => 0,
			pf0_usp_tx_preset13                        => 0,
			pf0_usp_tx_preset14                        => 0,
			pf0_usp_tx_preset15                        => 0,
			pf0_pci_type0_bar0_enabled                 => "PF0_PCI_TYPE0_BAR0_ENABLED_DISABLED",
			pf0_bar0_prefetch                          => "false",
			pf0_bar0_type                              => "PF0_BAR0_TYPE_BAR_MEM32",
			pf0_pci_type0_bar1_enabled                 => "PF0_PCI_TYPE0_BAR1_ENABLED_DISABLED",
			pf0_bar1_prefetch                          => "false",
			pf0_pci_type0_bar2_enabled                 => "PF0_PCI_TYPE0_BAR2_ENABLED_DISABLED",
			pf0_bar2_prefetch                          => "false",
			pf0_bar2_type                              => "PF0_BAR2_TYPE_BAR_MEM32",
			pf0_pci_type0_bar3_enabled                 => "PF0_PCI_TYPE0_BAR3_ENABLED_DISABLED",
			pf0_bar3_prefetch                          => "false",
			pf0_pci_type0_bar4_enabled                 => "PF0_PCI_TYPE0_BAR4_ENABLED_DISABLED",
			pf0_bar4_prefetch                          => "false",
			pf0_bar4_type                              => "PF0_BAR4_TYPE_BAR_MEM32",
			pf0_pci_type0_bar5_enabled                 => "PF0_PCI_TYPE0_BAR5_ENABLED_DISABLED",
			pf0_bar5_prefetch                          => "false",
			pf0_rom_bar_enable                         => "PF0_ROM_BAR_ENABLE_DISABLED",
			pf0_rom_mask                               => 0,
			pf0_rom_bar_enabled                        => "PF0_ROM_BAR_ENABLED_DISABLED",
			pf0_rp_rom_bar_enabled                     => "PF0_RP_ROM_BAR_ENABLED_DISABLED",
			pf0_rp_rom_mask                            => 0,
			pf0_sriov_vf_bar0_enabled                  => "PF0_SRIOV_VF_BAR0_ENABLED_DISABLED",
			pf0_sriov_vf_bar0_prefetch                 => "false",
			pf0_sriov_vf_bar0_type                     => "PF0_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32",
			pf0_sriov_vf_bar1_enabled                  => "PF0_SRIOV_VF_BAR1_ENABLED_DISABLED",
			pf0_sriov_vf_bar1_prefetch                 => "false",
			pf0_sriov_vf_bar2_enabled                  => "PF0_SRIOV_VF_BAR2_ENABLED_DISABLED",
			pf0_sriov_vf_bar2_prefetch                 => "false",
			pf0_sriov_vf_bar2_type                     => "PF0_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32",
			pf0_sriov_vf_bar3_enabled                  => "PF0_SRIOV_VF_BAR3_ENABLED_DISABLED",
			pf0_sriov_vf_bar3_prefetch                 => "false",
			pf0_sriov_vf_bar4_enabled                  => "PF0_SRIOV_VF_BAR4_ENABLED_DISABLED",
			pf0_sriov_vf_bar4_prefetch                 => "false",
			pf0_sriov_vf_bar4_type                     => "PF0_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32",
			pf0_sriov_vf_bar5_enabled                  => "PF0_SRIOV_VF_BAR5_ENABLED_DISABLED",
			pf0_sriov_vf_bar5_prefetch                 => "false",
			pf1_pci_type0_bar0_enabled                 => "PF1_PCI_TYPE0_BAR0_ENABLED_DISABLED",
			pf1_bar0_prefetch                          => "false",
			pf1_bar0_type                              => "PF1_BAR0_TYPE_BAR_MEM32",
			pf1_pci_type0_bar1_enabled                 => "PF1_PCI_TYPE0_BAR1_ENABLED_DISABLED",
			pf1_bar1_prefetch                          => "false",
			pf1_pci_type0_bar2_enabled                 => "PF1_PCI_TYPE0_BAR2_ENABLED_DISABLED",
			pf1_bar2_prefetch                          => "false",
			pf1_bar2_type                              => "PF1_BAR2_TYPE_BAR_MEM32",
			pf1_pci_type0_bar3_enabled                 => "PF1_PCI_TYPE0_BAR3_ENABLED_DISABLED",
			pf1_bar3_prefetch                          => "false",
			pf1_pci_type0_bar4_enabled                 => "PF1_PCI_TYPE0_BAR4_ENABLED_DISABLED",
			pf1_bar4_prefetch                          => "false",
			pf1_bar4_type                              => "PF1_BAR4_TYPE_BAR_MEM32",
			pf1_pci_type0_bar5_enabled                 => "PF1_PCI_TYPE0_BAR5_ENABLED_DISABLED",
			pf1_bar5_prefetch                          => "false",
			pf1_rom_bar_enable                         => "PF1_ROM_BAR_ENABLE_DISABLED",
			pf1_rom_mask                               => 0,
			pf1_rom_bar_enabled                        => "PF1_ROM_BAR_ENABLED_DISABLED",
			pf1_sriov_vf_bar0_enabled                  => "PF1_SRIOV_VF_BAR0_ENABLED_DISABLED",
			pf1_sriov_vf_bar0_prefetch                 => "false",
			pf1_sriov_vf_bar0_type                     => "PF1_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32",
			pf1_sriov_vf_bar1_enabled                  => "PF1_SRIOV_VF_BAR1_ENABLED_DISABLED",
			pf1_sriov_vf_bar1_prefetch                 => "false",
			pf1_sriov_vf_bar2_enabled                  => "PF1_SRIOV_VF_BAR2_ENABLED_DISABLED",
			pf1_sriov_vf_bar2_prefetch                 => "false",
			pf1_sriov_vf_bar2_type                     => "PF1_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32",
			pf1_sriov_vf_bar3_enabled                  => "PF1_SRIOV_VF_BAR3_ENABLED_DISABLED",
			pf1_sriov_vf_bar3_prefetch                 => "false",
			pf1_sriov_vf_bar4_enabled                  => "PF1_SRIOV_VF_BAR4_ENABLED_DISABLED",
			pf1_sriov_vf_bar4_prefetch                 => "false",
			pf1_sriov_vf_bar4_type                     => "PF1_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32",
			pf1_sriov_vf_bar5_enabled                  => "PF1_SRIOV_VF_BAR5_ENABLED_DISABLED",
			pf1_sriov_vf_bar5_prefetch                 => "false",
			pf2_pci_type0_bar0_enabled                 => "PF2_PCI_TYPE0_BAR0_ENABLED_DISABLED",
			pf2_bar0_prefetch                          => "false",
			pf2_bar0_type                              => "PF2_BAR0_TYPE_BAR_MEM32",
			pf2_pci_type0_bar1_enabled                 => "PF2_PCI_TYPE0_BAR1_ENABLED_DISABLED",
			pf2_bar1_prefetch                          => "false",
			pf2_pci_type0_bar2_enabled                 => "PF2_PCI_TYPE0_BAR2_ENABLED_DISABLED",
			pf2_bar2_prefetch                          => "false",
			pf2_bar2_type                              => "PF2_BAR2_TYPE_BAR_MEM32",
			pf2_pci_type0_bar3_enabled                 => "PF2_PCI_TYPE0_BAR3_ENABLED_DISABLED",
			pf2_bar3_prefetch                          => "false",
			pf2_pci_type0_bar4_enabled                 => "PF2_PCI_TYPE0_BAR4_ENABLED_DISABLED",
			pf2_bar4_prefetch                          => "false",
			pf2_bar4_type                              => "PF2_BAR4_TYPE_BAR_MEM32",
			pf2_pci_type0_bar5_enabled                 => "PF2_PCI_TYPE0_BAR5_ENABLED_DISABLED",
			pf2_bar5_prefetch                          => "false",
			pf2_rom_bar_enable                         => "PF2_ROM_BAR_ENABLE_DISABLED",
			pf2_rom_mask                               => 0,
			pf2_rom_bar_enabled                        => "PF2_ROM_BAR_ENABLED_DISABLED",
			pf2_sriov_vf_bar0_enabled                  => "PF2_SRIOV_VF_BAR0_ENABLED_DISABLED",
			pf2_sriov_vf_bar0_prefetch                 => "false",
			pf2_sriov_vf_bar0_type                     => "PF2_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32",
			pf2_sriov_vf_bar1_enabled                  => "PF2_SRIOV_VF_BAR1_ENABLED_DISABLED",
			pf2_sriov_vf_bar1_prefetch                 => "false",
			pf2_sriov_vf_bar2_enabled                  => "PF2_SRIOV_VF_BAR2_ENABLED_DISABLED",
			pf2_sriov_vf_bar2_prefetch                 => "false",
			pf2_sriov_vf_bar2_type                     => "PF2_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32",
			pf2_sriov_vf_bar3_enabled                  => "PF2_SRIOV_VF_BAR3_ENABLED_DISABLED",
			pf2_sriov_vf_bar3_prefetch                 => "false",
			pf2_sriov_vf_bar4_enabled                  => "PF2_SRIOV_VF_BAR4_ENABLED_DISABLED",
			pf2_sriov_vf_bar4_prefetch                 => "false",
			pf2_sriov_vf_bar4_type                     => "PF2_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32",
			pf2_sriov_vf_bar5_enabled                  => "PF2_SRIOV_VF_BAR5_ENABLED_DISABLED",
			pf2_sriov_vf_bar5_prefetch                 => "false",
			pf3_pci_type0_bar0_enabled                 => "PF3_PCI_TYPE0_BAR0_ENABLED_DISABLED",
			pf3_bar0_prefetch                          => "false",
			pf3_bar0_type                              => "PF3_BAR0_TYPE_BAR_MEM32",
			pf3_pci_type0_bar1_enabled                 => "PF3_PCI_TYPE0_BAR1_ENABLED_DISABLED",
			pf3_bar1_prefetch                          => "false",
			pf3_pci_type0_bar2_enabled                 => "PF3_PCI_TYPE0_BAR2_ENABLED_DISABLED",
			pf3_bar2_prefetch                          => "false",
			pf3_bar2_type                              => "PF3_BAR2_TYPE_BAR_MEM32",
			pf3_pci_type0_bar3_enabled                 => "PF3_PCI_TYPE0_BAR3_ENABLED_DISABLED",
			pf3_bar3_prefetch                          => "false",
			pf3_pci_type0_bar4_enabled                 => "PF3_PCI_TYPE0_BAR4_ENABLED_DISABLED",
			pf3_bar4_prefetch                          => "false",
			pf3_bar4_type                              => "PF3_BAR4_TYPE_BAR_MEM32",
			pf3_pci_type0_bar5_enabled                 => "PF3_PCI_TYPE0_BAR5_ENABLED_DISABLED",
			pf3_bar5_prefetch                          => "false",
			pf3_rom_bar_enable                         => "PF3_ROM_BAR_ENABLE_DISABLED",
			pf3_rom_mask                               => 0,
			pf3_rom_bar_enabled                        => "PF3_ROM_BAR_ENABLED_DISABLED",
			pf3_sriov_vf_bar0_enabled                  => "PF3_SRIOV_VF_BAR0_ENABLED_DISABLED",
			pf3_sriov_vf_bar0_prefetch                 => "false",
			pf3_sriov_vf_bar0_type                     => "PF3_SRIOV_VF_BAR0_TYPE_SRIOV_VF_BAR_MEM32",
			pf3_sriov_vf_bar1_enabled                  => "PF3_SRIOV_VF_BAR1_ENABLED_DISABLED",
			pf3_sriov_vf_bar1_prefetch                 => "false",
			pf3_sriov_vf_bar2_enabled                  => "PF3_SRIOV_VF_BAR2_ENABLED_DISABLED",
			pf3_sriov_vf_bar2_prefetch                 => "false",
			pf3_sriov_vf_bar2_type                     => "PF3_SRIOV_VF_BAR2_TYPE_SRIOV_VF_BAR_MEM32",
			pf3_sriov_vf_bar3_enabled                  => "PF3_SRIOV_VF_BAR3_ENABLED_DISABLED",
			pf3_sriov_vf_bar3_prefetch                 => "false",
			pf3_sriov_vf_bar4_enabled                  => "PF3_SRIOV_VF_BAR4_ENABLED_DISABLED",
			pf3_sriov_vf_bar4_prefetch                 => "false",
			pf3_sriov_vf_bar4_type                     => "PF3_SRIOV_VF_BAR4_TYPE_SRIOV_VF_BAR_MEM32",
			pf3_sriov_vf_bar5_enabled                  => "PF3_SRIOV_VF_BAR5_ENABLED_DISABLED",
			pf3_sriov_vf_bar5_prefetch                 => "false",
			pf1_enable                                 => "PF1_ENABLE_DISABLED",
			pf2_enable                                 => "PF2_ENABLE_DISABLED",
			pf3_enable                                 => "PF3_ENABLE_DISABLED",
			pf0_sriov_enable                           => "PF0_SRIOV_ENABLE_DISABLED",
			pf1_sriov_enable                           => "PF1_SRIOV_ENABLE_DISABLED",
			pf2_sriov_enable                           => "PF2_SRIOV_ENABLE_DISABLED",
			pf3_sriov_enable                           => "PF3_SRIOV_ENABLE_DISABLED",
			pf0_sriov_cap_sup_page_size                => 0,
			pf1_sriov_cap_sup_page_size                => 0,
			pf2_sriov_cap_sup_page_size                => 0,
			pf3_sriov_cap_sup_page_size                => 0,
			pf0_sriov_num_vf                           => 0,
			pf1_sriov_num_vf                           => 0,
			pf2_sriov_num_vf                           => 0,
			pf3_sriov_num_vf                           => 0,
			pf0_msi_enable                             => "PF0_MSI_ENABLE_DISABLED",
			pf0_pci_msi_ext_data_cap                   => "false",
			pf0_pci_msi_ext_data_en                    => "false",
			pf0_pci_msi_64_bit_addr_cap                => "false",
			pf0_pci_msi_multiple_msg_cap               => "PF0_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1",
			pf0_msix_enable                            => "PF0_MSIX_ENABLE_DISABLED",
			pf0_pci_msix_table_size                    => 0,
			pf0_pci_msix_table_offset                  => 0,
			pf0_pci_msix_bir                           => 0,
			pf0_pci_msix_pba                           => 0,
			pf0_pci_msix_pba_offset                    => 0,
			pf0_pci_msix_table_size_vfcomm_cs2         => 0,
			pf0_exvf_msix_cap_enable                   => "PF0_EXVF_MSIX_CAP_ENABLE_DISABLED",
			exvf_msix_tablesize_pf0                    => 0,
			exvf_msixtable_offset_pf0                  => 0,
			exvf_msixtable_bir_pf0                     => 0,
			exvf_msixpba_offset_pf0                    => 0,
			exvf_msixpba_bir_pf0                       => 0,
			pf1_msi_enable                             => "PF1_MSI_ENABLE_DISABLED",
			pf1_pci_msi_ext_data_cap                   => "false",
			pf1_pci_msi_ext_data_en                    => "false",
			pf1_pci_msi_64_bit_addr_cap                => "false",
			pf1_pci_msi_multiple_msg_cap               => "PF1_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1",
			pf1_msix_enable                            => "PF1_MSIX_ENABLE_DISABLED",
			pf1_pci_msix_table_size                    => 0,
			pf1_pci_msix_table_offset                  => 0,
			pf1_pci_msix_bir                           => 0,
			pf1_pci_msix_pba                           => 0,
			pf1_pci_msix_pba_offset                    => 0,
			pf1_pci_msix_table_size_vfcomm_cs2         => 0,
			pf1_exvf_msix_cap_enable                   => "PF1_EXVF_MSIX_CAP_ENABLE_DISABLED",
			exvf_msix_tablesize_pf1                    => 0,
			exvf_msixtable_offset_pf1                  => 0,
			exvf_msixtable_bir_pf1                     => 0,
			exvf_msixpba_offset_pf1                    => 0,
			exvf_msixpba_bir_pf1                       => 0,
			pf2_msi_enable                             => "PF2_MSI_ENABLE_DISABLED",
			pf2_pci_msi_ext_data_cap                   => "false",
			pf2_pci_msi_ext_data_en                    => "false",
			pf2_pci_msi_64_bit_addr_cap                => "false",
			pf2_pci_msi_multiple_msg_cap               => "PF2_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1",
			pf2_msix_enable                            => "PF2_MSIX_ENABLE_DISABLED",
			pf2_pci_msix_bir                           => 0,
			pf2_pci_msix_pba                           => 0,
			pf2_pci_msix_pba_offset                    => 0,
			pf2_pci_msix_table_offset                  => 0,
			pf2_pci_msix_table_size                    => 0,
			pf2_pci_msix_table_size_vfcomm_cs2         => 0,
			pf2_exvf_msix_cap_enable                   => "PF2_EXVF_MSIX_CAP_ENABLE_DISABLED",
			exvf_msix_tablesize_pf2                    => 0,
			exvf_msixtable_offset_pf2                  => 0,
			exvf_msixtable_bir_pf2                     => 0,
			exvf_msixpba_offset_pf2                    => 0,
			exvf_msixpba_bir_pf2                       => 0,
			pf3_msi_enable                             => "PF3_MSI_ENABLE_DISABLED",
			pf3_pci_msi_ext_data_cap                   => "false",
			pf3_pci_msi_ext_data_en                    => "false",
			pf3_pci_msi_64_bit_addr_cap                => "false",
			pf3_pci_msi_multiple_msg_cap               => "PF3_PCI_MSI_MULTIPLE_MSG_CAP_MSI_VEC_1",
			pf3_msix_enable                            => "PF3_MSIX_ENABLE_DISABLED",
			pf3_pci_msix_bir                           => 0,
			pf3_pci_msix_pba                           => 0,
			pf3_pci_msix_pba_offset                    => 0,
			pf3_pci_msix_table_offset                  => 0,
			pf3_pci_msix_table_size                    => 0,
			pf3_pci_msix_table_size_vfcomm_cs2         => 0,
			pf3_exvf_msix_cap_enable                   => "PF3_EXVF_MSIX_CAP_ENABLE_DISABLED",
			exvf_msix_tablesize_pf3                    => 0,
			exvf_msixtable_offset_pf3                  => 0,
			exvf_msixtable_bir_pf3                     => 0,
			exvf_msixpba_offset_pf3                    => 0,
			exvf_msixpba_bir_pf3                       => 0,
			pf0_prs_ext_cap_enable                     => "PF0_PRS_EXT_CAP_ENABLE_DISABLED",
			pf0_prs_ext_cap_outstanding_capacity       => 0,
			pf1_prs_ext_cap_enable                     => "PF1_PRS_EXT_CAP_ENABLE_DISABLED",
			pf1_prs_ext_cap_outstanding_capacity       => 0,
			pf2_prs_ext_cap_enable                     => "PF2_PRS_EXT_CAP_ENABLE_DISABLED",
			pf2_prs_ext_cap_outstanding_capacity       => 0,
			pf3_prs_ext_cap_enable                     => "PF3_PRS_EXT_CAP_ENABLE_DISABLED",
			pf3_prs_ext_cap_outstanding_capacity       => 0,
			pf0_pasid_cap_enable                       => "PF0_PASID_CAP_ENABLE_DISABLED",
			pf0_pasid_cap_execute_permission_supported => "PF0_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED",
			pf0_pasid_cap_max_pasid_width              => 0,
			pf0_pasid_cap_privileged_mode_supported    => "PF0_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED",
			pf1_pasid_cap_enable                       => "PF1_PASID_CAP_ENABLE_DISABLED",
			pf1_pasid_cap_execute_permission_supported => "PF1_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED",
			pf1_pasid_cap_max_pasid_width              => 0,
			pf1_pasid_cap_privileged_mode_supported    => "PF1_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED",
			pf2_pasid_cap_enable                       => "PF2_PASID_CAP_ENABLE_DISABLED",
			pf2_pasid_cap_execute_permission_supported => "PF2_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED",
			pf2_pasid_cap_max_pasid_width              => 0,
			pf2_pasid_cap_privileged_mode_supported    => "PF2_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED",
			pf3_pasid_cap_enable                       => "PF3_PASID_CAP_ENABLE_DISABLED",
			pf3_pasid_cap_execute_permission_supported => "PF3_PASID_CAP_EXECUTE_PERMISSION_SUPPORTED_DISABLED",
			pf3_pasid_cap_max_pasid_width              => 0,
			pf3_pasid_cap_privileged_mode_supported    => "PF3_PASID_CAP_PRIVILEGED_MODE_SUPPORTED_DISABLED",
			pf0_sn_cap_enable                          => "PF0_SN_CAP_ENABLE_DISABLED",
			pf1_sn_cap_enable                          => "PF1_SN_CAP_ENABLE_DISABLED",
			pf2_sn_cap_enable                          => "PF2_SN_CAP_ENABLE_DISABLED",
			pf3_sn_cap_enable                          => "PF3_SN_CAP_ENABLE_DISABLED",
			pf0_pcie_cap_ep_l0s_accpt_latency          => 0,
			pf0_pcie_cap_ep_l1_accpt_latency           => 0,
			pf0_pcie_cap_l0s_exit_latency_commclk_dis  => 7,
			pf0_pcie_cap_l1_exit_latency_commclk_dis   => 7,
			pf1_pcie_cap_ep_l0s_accpt_latency          => 0,
			pf1_pcie_cap_ep_l1_accpt_latency           => 0,
			pf1_pcie_cap_l0s_exit_latency_commclk_dis  => 0,
			pf1_pcie_cap_l1_exit_latency_commclk_dis   => 0,
			pf2_pcie_cap_ep_l0s_accpt_latency          => 0,
			pf2_pcie_cap_ep_l1_accpt_latency           => 0,
			pf2_pcie_cap_l0s_exit_latency_commclk_dis  => 0,
			pf2_pcie_cap_l1_exit_latency_commclk_dis   => 0,
			pf3_pcie_cap_ep_l0s_accpt_latency          => 0,
			pf3_pcie_cap_ep_l1_accpt_latency           => 0,
			pf3_pcie_cap_l0s_exit_latency_commclk_dis  => 0,
			pf3_pcie_cap_l1_exit_latency_commclk_dis   => 0,
			aspm_support                               => "ASPM_SUPPORT_L0S_L1",
			dbi_ro_wr_disable                          => "DBI_RO_WR_DISABLE_ENABLE",
			pf0_gen3_eq_pset_req_vec                   => 292,
			pf0_gen3_eq_pset_req_vec_atg4              => 352,
			pf0_pcie_cap_flr_cap                       => "PF0_PCIE_CAP_FLR_CAP_NOT_CAPABLE",
			pf1_pcie_cap_flr_cap                       => "PF1_PCIE_CAP_FLR_CAP_NOT_CAPABLE",
			pf2_pcie_cap_flr_cap                       => "PF2_PCIE_CAP_FLR_CAP_NOT_CAPABLE",
			pf3_pcie_cap_flr_cap                       => "PF3_PCIE_CAP_FLR_CAP_NOT_CAPABLE",
			pf0_pcie_cap_port_num                      => 1,
			pf1_pcie_cap_port_num                      => 0,
			pf2_pcie_cap_port_num                      => 0,
			pf3_pcie_cap_port_num                      => 0,
			pf0_pcie_cap_slot_clk_config               => "true",
			pf1_pcie_cap_slot_clk_config               => "false",
			pf2_pcie_cap_slot_clk_config               => "false",
			pf3_pcie_cap_slot_clk_config               => "false",
			pf0_ltr_cap_enable                         => "PF0_LTR_CAP_ENABLE_DISABLED",
			pf0_pcie_slot_imp                          => "PF0_PCIE_SLOT_IMP_NOT_IMPLEMENTED",
			pf0_pcie_cap_slot_power_limit_scale        => 0,
			pf0_pcie_cap_slot_power_limit_value        => 0,
			pf0_pcie_cap_phy_slot_num                  => 0,
			pf0_pcie_cap_hot_plug_capable              => "false",
			pf0_pcie_cap_ext_tag_en                    => "true",
			pf1_pcie_cap_ext_tag_en                    => "false",
			pf2_pcie_cap_ext_tag_en                    => "false",
			pf3_pcie_cap_ext_tag_en                    => "false",
			cfg_ptm_auto_update_signal                 => "false",
			ptm_autoupdate                             => "PTM_AUTOUPDATE_AUTOUPDATE_DISABLE",
			ptm_enable                                 => "PTM_ENABLE_DISABLE",
			pf0_ats_cap_enable                         => "PF0_ATS_CAP_ENABLE_DISABLED",
			pf0_exvf_ats_cap_enable                    => "PF0_EXVF_ATS_CAP_ENABLE_DISABLED",
			pf0_ats_cap_invalidate_q_depth             => 0,
			pf0_ats_exvf_align_request                 => "PF0_ATS_EXVF_ALIGN_REQUEST_DISABLE",
			pf1_ats_cap_enable                         => "PF1_ATS_CAP_ENABLE_DISABLED",
			pf1_exvf_ats_cap_enable                    => "PF1_EXVF_ATS_CAP_ENABLE_DISABLED",
			pf1_ats_cap_invalidate_q_depth             => 0,
			pf1_ats_exvf_align_request                 => "PF1_ATS_EXVF_ALIGN_REQUEST_DISABLE",
			pf2_ats_cap_enable                         => "PF2_ATS_CAP_ENABLE_DISABLED",
			pf2_exvf_ats_cap_enable                    => "PF2_EXVF_ATS_CAP_ENABLE_DISABLED",
			pf2_ats_cap_invalidate_q_depth             => 0,
			pf2_ats_exvf_align_request                 => "PF2_ATS_EXVF_ALIGN_REQUEST_DISABLE",
			pf3_ats_cap_enable                         => "PF3_ATS_CAP_ENABLE_DISABLED",
			pf3_exvf_ats_cap_enable                    => "PF3_EXVF_ATS_CAP_ENABLE_DISABLED",
			pf3_ats_cap_invalidate_q_depth             => 0,
			pf3_ats_exvf_align_request                 => "PF3_ATS_EXVF_ALIGN_REQUEST_DISABLE",
			pf0_tph_cap_enable                         => "PF0_TPH_CAP_ENABLE_DISABLED",
			pf0_tph_req_cap_int_vec                    => "PF0_TPH_REQ_CAP_INT_VEC_DISABLED",
			pf0_tph_req_cap_int_vec_vfcomm_cs2         => "PF0_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED",
			pf0_tph_req_cap_st_table_loc_0_vfcomm_cs2  => "PF0_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF",
			pf0_tph_req_cap_st_table_loc_1             => "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE",
			pf0_tph_req_cap_st_table_loc_1_vfcomm_cs2  => "PF0_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF",
			pf0_tph_req_cap_st_table_size              => 0,
			pf0_tph_req_cap_st_table_size_vfcomm_cs2   => 0,
			pf0_tph_req_device_spec                    => "PF0_TPH_REQ_DEVICE_SPEC_DISABLED",
			pf0_tph_req_device_spec_vfcomm_cs2         => "PF0_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED",
			pf0_exvf_tph_cap_enable                    => "PF0_EXVF_TPH_CAP_ENABLE_DISABLED",
			exvf_tph_sttablelocation_pf0               => 0,
			exvf_tph_sttablesize_pf0                   => 0,
			pf1_tph_cap_enable                         => "PF1_TPH_CAP_ENABLE_DISABLED",
			pf1_tph_req_cap_int_vec                    => "PF1_TPH_REQ_CAP_INT_VEC_DISABLED",
			pf1_tph_req_cap_int_vec_vfcomm_cs2         => "PF1_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED",
			pf1_tph_req_cap_st_table_loc_0_vfcomm_cs2  => "PF1_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF",
			pf1_tph_req_cap_st_table_loc_1             => "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE",
			pf1_tph_req_cap_st_table_loc_1_vfcomm_cs2  => "PF1_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF",
			pf1_tph_req_cap_st_table_size              => 0,
			pf1_tph_req_cap_st_table_size_vfcomm_cs2   => 0,
			pf1_tph_req_device_spec                    => "PF1_TPH_REQ_DEVICE_SPEC_DISABLED",
			pf1_tph_req_device_spec_vfcomm_cs2         => "PF1_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED",
			pf1_exvf_tph_cap_enable                    => "PF1_EXVF_TPH_CAP_ENABLE_DISABLED",
			exvf_tph_sttablelocation_pf1               => 0,
			exvf_tph_sttablesize_pf1                   => 0,
			pf2_tph_cap_enable                         => "PF2_TPH_CAP_ENABLE_DISABLED",
			pf2_tph_req_cap_int_vec                    => "PF2_TPH_REQ_CAP_INT_VEC_DISABLED",
			pf2_tph_req_cap_int_vec_vfcomm_cs2         => "PF2_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED",
			pf2_tph_req_cap_st_table_loc_0_vfcomm_cs2  => "PF2_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF",
			pf2_tph_req_cap_st_table_loc_1             => "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE",
			pf2_tph_req_cap_st_table_loc_1_vfcomm_cs2  => "PF2_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF",
			pf2_tph_req_cap_st_table_size              => 0,
			pf2_tph_req_cap_st_table_size_vfcomm_cs2   => 0,
			pf2_tph_req_device_spec                    => "PF2_TPH_REQ_DEVICE_SPEC_DISABLED",
			pf2_tph_req_device_spec_vfcomm_cs2         => "PF2_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED",
			pf2_exvf_tph_cap_enable                    => "PF2_EXVF_TPH_CAP_ENABLE_DISABLED",
			exvf_tph_sttablelocation_pf2               => 0,
			exvf_tph_sttablesize_pf2                   => 0,
			pf3_tph_cap_enable                         => "PF3_TPH_CAP_ENABLE_DISABLED",
			pf3_tph_req_cap_int_vec                    => "PF3_TPH_REQ_CAP_INT_VEC_DISABLED",
			pf3_tph_req_cap_int_vec_vfcomm_cs2         => "PF3_TPH_REQ_CAP_INT_VEC_VFCOMM_CS2_DISABLED",
			pf3_tph_req_cap_st_table_loc_0_vfcomm_cs2  => "PF3_TPH_REQ_CAP_ST_TABLE_LOC_0_VFCOMM_CS2_NOT_IN_TPH_STRUCT_VF",
			pf3_tph_req_cap_st_table_loc_1             => "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_NOT_IN_MSIX_TABLE",
			pf3_tph_req_cap_st_table_loc_1_vfcomm_cs2  => "PF3_TPH_REQ_CAP_ST_TABLE_LOC_1_VFCOMM_CS2_NOT_IN_MSIX_TABLE_VF",
			pf3_tph_req_cap_st_table_size              => 0,
			pf3_tph_req_cap_st_table_size_vfcomm_cs2   => 0,
			pf3_tph_req_device_spec                    => "PF3_TPH_REQ_DEVICE_SPEC_DISABLED",
			pf3_tph_req_device_spec_vfcomm_cs2         => "PF3_TPH_REQ_DEVICE_SPEC_VFCOMM_CS2_DISABLED",
			pf3_exvf_tph_cap_enable                    => "PF3_EXVF_TPH_CAP_ENABLE_DISABLED",
			exvf_tph_sttablelocation_pf3               => 0,
			exvf_tph_sttablesize_pf3                   => 0,
			pf0_acs_cap_enable                         => "PF0_ACS_CAP_ENABLE_DISABLED",
			pf0_exvf_acs_cap_enable                    => "PF0_EXVF_ACS_CAP_ENABLE_DISABLED",
			pf0_acs_cap_acs_src_valid                  => "PF0_ACS_CAP_ACS_SRC_VALID_DISABLED",
			pf0_acs_cap_acs_at_block                   => "PF0_ACS_CAP_ACS_AT_BLOCK_DISABLED",
			pf0_acs_cap_acs_p2p_req_redirect           => "PF0_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED",
			pf0_acs_cap_acs_p2p_cpl_redirect           => "PF0_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED",
			pf0_acs_cap_acs_usp_forwarding             => "PF0_ACS_CAP_ACS_USP_FORWARDING_DISABLED",
			pf0_acs_cap_acs_p2p_egress_control         => "PF0_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED",
			pf0_acs_cap_acs_egress_ctrl_size           => 8,
			pf0_acs_cap_acs_direct_translated_p2p      => "PF0_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED",
			pf1_acs_cap_enable                         => "PF1_ACS_CAP_ENABLE_DISABLED",
			pf1_exvf_acs_cap_enable                    => "PF1_EXVF_ACS_CAP_ENABLE_DISABLED",
			pf1_acs_cap_acs_src_valid                  => "PF1_ACS_CAP_ACS_SRC_VALID_DISABLED",
			pf1_acs_cap_acs_at_block                   => "PF1_ACS_CAP_ACS_AT_BLOCK_DISABLED",
			pf1_acs_cap_acs_p2p_req_redirect           => "PF1_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED",
			pf1_acs_cap_acs_p2p_cpl_redirect           => "PF1_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED",
			pf1_acs_cap_acs_usp_forwarding             => "PF1_ACS_CAP_ACS_USP_FORWARDING_DISABLED",
			pf1_acs_cap_acs_p2p_egress_control         => "PF1_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED",
			pf1_acs_cap_acs_egress_ctrl_size           => 8,
			pf1_acs_cap_acs_direct_translated_p2p      => "PF1_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED",
			pf2_acs_cap_enable                         => "PF2_ACS_CAP_ENABLE_DISABLED",
			pf2_exvf_acs_cap_enable                    => "PF2_EXVF_ACS_CAP_ENABLE_DISABLED",
			pf2_acs_cap_acs_src_valid                  => "PF2_ACS_CAP_ACS_SRC_VALID_DISABLED",
			pf2_acs_cap_acs_at_block                   => "PF2_ACS_CAP_ACS_AT_BLOCK_DISABLED",
			pf2_acs_cap_acs_p2p_req_redirect           => "PF2_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED",
			pf2_acs_cap_acs_p2p_cpl_redirect           => "PF2_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED",
			pf2_acs_cap_acs_usp_forwarding             => "PF2_ACS_CAP_ACS_USP_FORWARDING_DISABLED",
			pf2_acs_cap_acs_p2p_egress_control         => "PF2_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED",
			pf2_acs_cap_acs_egress_ctrl_size           => 8,
			pf2_acs_cap_acs_direct_translated_p2p      => "PF2_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED",
			pf3_acs_cap_enable                         => "PF3_ACS_CAP_ENABLE_DISABLED",
			pf3_exvf_acs_cap_enable                    => "PF3_EXVF_ACS_CAP_ENABLE_DISABLED",
			pf3_acs_cap_acs_src_valid                  => "PF3_ACS_CAP_ACS_SRC_VALID_DISABLED",
			pf3_acs_cap_acs_at_block                   => "PF3_ACS_CAP_ACS_AT_BLOCK_DISABLED",
			pf3_acs_cap_acs_p2p_req_redirect           => "PF3_ACS_CAP_ACS_P2P_REQ_REDIRECT_DISABLED",
			pf3_acs_cap_acs_p2p_cpl_redirect           => "PF3_ACS_CAP_ACS_P2P_CPL_REDIRECT_DISABLED",
			pf3_acs_cap_acs_usp_forwarding             => "PF3_ACS_CAP_ACS_USP_FORWARDING_DISABLED",
			pf3_acs_cap_acs_p2p_egress_control         => "PF3_ACS_CAP_ACS_P2P_EGRESS_CONTROL_DISABLED",
			pf3_acs_cap_acs_egress_ctrl_size           => 8,
			pf3_acs_cap_acs_direct_translated_p2p      => "PF3_ACS_CAP_ACS_DIRECT_TRANSLATED_P2P_DISABLED",
			pf0_virtio_en                              => "PF0_VIRTIO_EN_DISABLED",
			pf1_virtio_en                              => "PF1_VIRTIO_EN_DISABLED",
			pf2_virtio_en                              => "PF2_VIRTIO_EN_DISABLED",
			pf3_virtio_en                              => "PF3_VIRTIO_EN_DISABLED",
			pf0_exvf_virtio_en                         => "PF0_EXVF_VIRTIO_EN_DISABLED",
			pf1_exvf_virtio_en                         => "PF1_EXVF_VIRTIO_EN_DISABLED",
			pf2_exvf_virtio_en                         => "PF2_EXVF_VIRTIO_EN_DISABLED",
			pf3_exvf_virtio_en                         => "PF3_EXVF_VIRTIO_EN_DISABLED",
			pf0_pci_type0_device_id                    => 0,
			pf0_pci_type0_vendor_id                    => 4466,
			pf0_revision_id                            => 1,
			pf0_base_class_code                        => 255,
			pf0_subclass_code                          => 0,
			pf0_program_interface                      => 0,
			pf0_subsys_vendor_id                       => 0,
			pf0_subsys_dev_id                          => 0,
			pf0_sriov_vf_device_id                     => 0,
			exvf_subsysid_pf0                          => 0,
			pf1_pci_type0_vendor_id                    => 0,
			pf1_pci_type0_device_id                    => 0,
			pf1_revision_id                            => 0,
			pf1_base_class_code                        => 0,
			pf1_subclass_code                          => 0,
			pf1_program_interface                      => 0,
			pf1_subsys_vendor_id                       => 0,
			pf1_subsys_dev_id                          => 0,
			pf1_sriov_vf_device_id                     => 0,
			exvf_subsysid_pf1                          => 0,
			pf2_pci_type0_vendor_id                    => 0,
			pf2_pci_type0_device_id                    => 0,
			pf2_revision_id                            => 0,
			pf2_base_class_code                        => 0,
			pf2_subclass_code                          => 0,
			pf2_program_interface                      => 0,
			pf2_subsys_vendor_id                       => 0,
			pf2_subsys_dev_id                          => 0,
			pf2_sriov_vf_device_id                     => 0,
			exvf_subsysid_pf2                          => 0,
			pf3_pci_type0_vendor_id                    => 0,
			pf3_pci_type0_device_id                    => 0,
			pf3_revision_id                            => 0,
			pf3_base_class_code                        => 0,
			pf3_subclass_code                          => 0,
			pf3_program_interface                      => 0,
			pf3_subsys_vendor_id                       => 0,
			pf3_subsys_dev_id                          => 0,
			pf3_sriov_vf_device_id                     => 0,
			exvf_subsysid_pf3                          => 0,
			vsec_select                                => "false",
			pf0_user_vsec_cap_enable                   => "PF0_USER_VSEC_CAP_ENABLE_DISABLED",
			pf1_user_vsec_cap_enable                   => "PF1_USER_VSEC_CAP_ENABLE_DISABLED",
			pf2_user_vsec_cap_enable                   => "PF2_USER_VSEC_CAP_ENABLE_DISABLED",
			pf3_user_vsec_cap_enable                   => "PF3_USER_VSEC_CAP_ENABLE_DISABLED",
			vsec_next_offset                           => 0,
			pf1_user_vsec_offset                       => 0,
			pf2_user_vsec_offset                       => 0,
			pf3_user_vsec_offset                       => 0,
			cvp_vendor_specific_header_id              => 0,
			drop_vendor0_msg                           => "FALSE",
			drop_vendor1_msg                           => "FALSE",
			num_of_lanes                               => "NUM_OF_LANES_NUM_4",
			pf0_int_pin                                => "PF0_INT_PIN_NO_INT",
			pf1_int_pin                                => "PF1_INT_PIN_NO_INT",
			pf2_int_pin                                => "PF2_INT_PIN_NO_INT",
			pf3_int_pin                                => "PF3_INT_PIN_NO_INT",
			dtk_mode_en                                => "DTK_MODE_EN_ENABLE",
			ecrc_strip                                 => "ECRC_STRIP_ENABLE",
			pf0_port_logic_fast_link_mode              => "PF0_PORT_LOGIC_FAST_LINK_MODE_DISABLE",
			pf0_prefetch_decode                        => "PF0_PREFETCH_DECODE_PREF32",
			sys_clk_hz                                 => "00010001111000011010001100000000",
			pclk_clk_hz                                => "00011101110011010110010100000000",
			pf0_sn_ser_num_reg_1_dw                    => "00000000000000000000000000000000",
			pf1_sn_ser_num_reg_1_dw                    => "00000000000000000000000000000000",
			pf2_sn_ser_num_reg_1_dw                    => "00000000000000000000000000000000",
			pf3_sn_ser_num_reg_1_dw                    => "00000000000000000000000000000000",
			pf0_sn_ser_num_reg_2_dw                    => "00000000000000000000000000000000",
			pf1_sn_ser_num_reg_2_dw                    => "00000000000000000000000000000000",
			pf2_sn_ser_num_reg_2_dw                    => "00000000000000000000000000000000",
			pf3_sn_ser_num_reg_2_dw                    => "00000000000000000000000000000000",
			pf0_pci_type0_bar0_mask_31_1               => "00000000000000000000000000000000",
			pf0_pci_type0_bar1_mask_31_0               => "00000000000000000000000000000000",
			pf0_pci_type0_bar2_mask_31_1               => "00000000000000000000000000000000",
			pf0_pci_type0_bar3_mask_31_0               => "00000000000000000000000000000000",
			pf0_pci_type0_bar4_mask_31_1               => "00000000000000000000000000000000",
			pf0_pci_type0_bar5_mask_31_0               => "00000000000000000000000000000000",
			pf1_pci_type0_bar0_mask_31_1               => "00000000000000000000000000000000",
			pf1_pci_type0_bar1_mask_31_0               => "00000000000000000000000000000000",
			pf1_pci_type0_bar2_mask_31_1               => "00000000000000000000000000000000",
			pf1_pci_type0_bar3_mask_31_0               => "00000000000000000000000000000000",
			pf1_pci_type0_bar4_mask_31_1               => "00000000000000000000000000000000",
			pf1_pci_type0_bar5_mask_31_0               => "00000000000000000000000000000000",
			pf2_pci_type0_bar0_mask_31_1               => "00000000000000000000000000000000",
			pf2_pci_type0_bar1_mask_31_0               => "00000000000000000000000000000000",
			pf2_pci_type0_bar2_mask_31_1               => "00000000000000000000000000000000",
			pf2_pci_type0_bar3_mask_31_0               => "00000000000000000000000000000000",
			pf2_pci_type0_bar4_mask_31_1               => "00000000000000000000000000000000",
			pf2_pci_type0_bar5_mask_31_0               => "00000000000000000000000000000000",
			pf3_pci_type0_bar0_mask_31_1               => "00000000000000000000000000000000",
			pf3_pci_type0_bar1_mask_31_0               => "00000000000000000000000000000000",
			pf3_pci_type0_bar2_mask_31_1               => "00000000000000000000000000000000",
			pf3_pci_type0_bar3_mask_31_0               => "00000000000000000000000000000000",
			pf3_pci_type0_bar4_mask_31_1               => "00000000000000000000000000000000",
			pf3_pci_type0_bar5_mask_31_0               => "00000000000000000000000000000000",
			pf0_sriov_vf_bar0_mask                     => "00000000000000000000000000000000",
			pf0_sriov_vf_bar1_mask                     => "00000000000000000000000000000000",
			pf0_sriov_vf_bar2_mask                     => "00000000000000000000000000000000",
			pf0_sriov_vf_bar3_mask                     => "00000000000000000000000000000000",
			pf0_sriov_vf_bar4_mask                     => "00000000000000000000000000000000",
			pf0_sriov_vf_bar5_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar0_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar1_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar2_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar3_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar4_mask                     => "00000000000000000000000000000000",
			pf1_sriov_vf_bar5_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar0_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar1_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar2_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar3_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar4_mask                     => "00000000000000000000000000000000",
			pf2_sriov_vf_bar5_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar0_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar1_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar2_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar3_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar4_mask                     => "00000000000000000000000000000000",
			pf3_sriov_vf_bar5_mask                     => "00000000000000000000000000000000"
		)
		port map (
			o_pcs0_pipe_rst_n                           => o_pcs0_pipe_rst_n,                                                                  -- phip_hal.o_pcs0_pipe_rst_n
			i_rxpipe0_dirfeedback                       => i_rxpipe0_dirfeedback,                                                              --         .i_rxpipe0_dirfeedback
			i_rxpipe0_linkevaluationfeedbackfiguremerit => i_rxpipe0_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe0_linkevaluationfeedbackfiguremerit
			i_rxpipe0_localfs                           => i_rxpipe0_localfs,                                                                  --         .i_rxpipe0_localfs
			i_rxpipe0_locallf                           => i_rxpipe0_locallf,                                                                  --         .i_rxpipe0_locallf
			i_rxpipe0_localtxcoefficientsvalid          => i_rxpipe0_localtxcoefficientsvalid,                                                 --         .i_rxpipe0_localtxcoefficientsvalid
			i_rxpipe0_localtxpresetcoefficients         => i_rxpipe0_localtxpresetcoefficients,                                                --         .i_rxpipe0_localtxpresetcoefficients
			i_rxpipe0_p2m_bus                           => i_rxpipe0_p2m_bus,                                                                  --         .i_rxpipe0_p2m_bus
			i_rxpipe0_pclkchangeok                      => i_rxpipe0_pclkchangeok,                                                             --         .i_rxpipe0_pclkchangeok
			i_rxpipe0_phystatus                         => i_rxpipe0_phystatus,                                                                --         .i_rxpipe0_phystatus
			i_rxpipe0_rxdata                            => i_rxpipe0_rxdata,                                                                   --         .i_rxpipe0_rxdata
			i_rxpipe0_rxdatak                           => i_rxpipe0_rxdatak,                                                                  --         .i_rxpipe0_rxdatak
			i_rxpipe0_rxdatavalid                       => i_rxpipe0_rxdatavalid,                                                              --         .i_rxpipe0_rxdatavalid
			i_rxpipe0_rxelecidlea                       => i_rxpipe0_rxelecidlea,                                                              --         .i_rxpipe0_rxelecidlea
			i_rxpipe0_rxstandbystatus                   => i_rxpipe0_rxstandbystatus,                                                          --         .i_rxpipe0_rxstandbystatus
			i_rxpipe0_rxstartblock                      => i_rxpipe0_rxstartblock,                                                             --         .i_rxpipe0_rxstartblock
			i_rxpipe0_rxstatus                          => i_rxpipe0_rxstatus,                                                                 --         .i_rxpipe0_rxstatus
			i_rxpipe0_rxsyncheader                      => i_rxpipe0_rxsyncheader,                                                             --         .i_rxpipe0_rxsyncheader
			i_rxpipe0_rxvalid                           => i_rxpipe0_rxvalid,                                                                  --         .i_rxpipe0_rxvalid
			o_txpipe0_asyncpowerchangeack               => o_txpipe0_asyncpowerchangeack,                                                      --         .o_txpipe0_asyncpowerchangeack
			o_txpipe0_blockaligncontrol                 => o_txpipe0_blockaligncontrol,                                                        --         .o_txpipe0_blockaligncontrol
			o_txpipe0_cfg_hw_auto_sp_dis                => o_txpipe0_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe0_cfg_hw_auto_sp_dis
			o_txpipe0_dirchange                         => o_txpipe0_dirchange,                                                                --         .o_txpipe0_dirchange
			o_txpipe0_ebuf_mode                         => o_txpipe0_ebuf_mode,                                                                --         .o_txpipe0_ebuf_mode
			o_txpipe0_encodedecodebypass                => o_txpipe0_encodedecodebypass,                                                       --         .o_txpipe0_encodedecodebypass
			o_txpipe0_fs                                => o_txpipe0_fs,                                                                       --         .o_txpipe0_fs
			o_txpipe0_getlocalpresetcoefficients        => o_txpipe0_getlocalpresetcoefficients,                                               --         .o_txpipe0_getlocalpresetcoefficients
			o_txpipe0_invalidrequest                    => o_txpipe0_invalidrequest,                                                           --         .o_txpipe0_invalidrequest
			o_txpipe0_lf                                => o_txpipe0_lf,                                                                       --         .o_txpipe0_lf
			o_txpipe0_localpresetindex                  => o_txpipe0_localpresetindex,                                                         --         .o_txpipe0_localpresetindex
			o_txpipe0_lowpin_nt                         => o_txpipe0_lowpin_nt,                                                                --         .o_txpipe0_lowpin_nt
			o_txpipe0_m2p_bus                           => o_txpipe0_m2p_bus,                                                                  --         .o_txpipe0_m2p_bus
			o_txpipe0_pclk_rate                         => o_txpipe0_pclk_rate,                                                                --         .o_txpipe0_pclk_rate
			o_txpipe0_pclkchangeack                     => o_txpipe0_pclkchangeack,                                                            --         .o_txpipe0_pclkchangeack
			o_txpipe0_phy_mode_nt                       => o_txpipe0_phy_mode_nt,                                                              --         .o_txpipe0_phy_mode_nt
			o_txpipe0_powerdown                         => o_txpipe0_powerdown,                                                                --         .o_txpipe0_powerdown
			o_txpipe0_rate                              => o_txpipe0_rate,                                                                     --         .o_txpipe0_rate
			o_txpipe0_rxelecidle_disable_a              => o_txpipe0_rxelecidle_disable_a,                                                     --         .o_txpipe0_rxelecidle_disable_a
			o_txpipe0_rxeqclr                           => o_txpipe0_rxeqclr,                                                                  --         .o_txpipe0_rxeqclr
			o_txpipe0_rxeqeval                          => o_txpipe0_rxeqeval,                                                                 --         .o_txpipe0_rxeqeval
			o_txpipe0_rxeqinprogress                    => o_txpipe0_rxeqinprogress,                                                           --         .o_txpipe0_rxeqinprogress
			o_txpipe0_rxeqtraining                      => o_txpipe0_rxeqtraining,                                                             --         .o_txpipe0_rxeqtraining
			o_txpipe0_rxpolarity                        => o_txpipe0_rxpolarity,                                                               --         .o_txpipe0_rxpolarity
			o_txpipe0_rxpresethint                      => o_txpipe0_rxpresethint,                                                             --         .o_txpipe0_rxpresethint
			o_txpipe0_rxstandby                         => o_txpipe0_rxstandby,                                                                --         .o_txpipe0_rxstandby
			o_txpipe0_rxtermination                     => o_txpipe0_rxtermination,                                                            --         .o_txpipe0_rxtermination
			o_txpipe0_srisenable                        => o_txpipe0_srisenable,                                                               --         .o_txpipe0_srisenable
			o_txpipe0_txcmnmode_disable_a               => o_txpipe0_txcmnmode_disable_a,                                                      --         .o_txpipe0_txcmnmode_disable_a
			o_txpipe0_txcompliance                      => o_txpipe0_txcompliance,                                                             --         .o_txpipe0_txcompliance
			o_txpipe0_txdata                            => o_txpipe0_txdata,                                                                   --         .o_txpipe0_txdata
			o_txpipe0_txdatak                           => o_txpipe0_txdatak,                                                                  --         .o_txpipe0_txdatak
			o_txpipe0_txdatavalid                       => o_txpipe0_txdatavalid,                                                              --         .o_txpipe0_txdatavalid
			o_txpipe0_txdeemph                          => o_txpipe0_txdeemph,                                                                 --         .o_txpipe0_txdeemph
			o_txpipe0_txdtctrx_lb                       => o_txpipe0_txdtctrx_lb,                                                              --         .o_txpipe0_txdtctrx_lb
			o_txpipe0_txelecidle                        => o_txpipe0_txelecidle,                                                               --         .o_txpipe0_txelecidle
			o_txpipe0_txmargin                          => o_txpipe0_txmargin,                                                                 --         .o_txpipe0_txmargin
			o_txpipe0_txoneszeros                       => o_txpipe0_txoneszeros,                                                              --         .o_txpipe0_txoneszeros
			o_txpipe0_txstartblock                      => o_txpipe0_txstartblock,                                                             --         .o_txpipe0_txstartblock
			o_txpipe0_txswing                           => o_txpipe0_txswing,                                                                  --         .o_txpipe0_txswing
			o_txpipe0_txsyncheader                      => o_txpipe0_txsyncheader,                                                             --         .o_txpipe0_txsyncheader
			o_txpipe0_width                             => o_txpipe0_width,                                                                    --         .o_txpipe0_width
			o_pcs1_pipe_rst_n                           => o_pcs1_pipe_rst_n,                                                                  --         .o_pcs1_pipe_rst_n
			i_rxpipe1_dirfeedback                       => i_rxpipe1_dirfeedback,                                                              --         .i_rxpipe1_dirfeedback
			i_rxpipe1_linkevaluationfeedbackfiguremerit => i_rxpipe1_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe1_linkevaluationfeedbackfiguremerit
			i_rxpipe1_localfs                           => i_rxpipe1_localfs,                                                                  --         .i_rxpipe1_localfs
			i_rxpipe1_locallf                           => i_rxpipe1_locallf,                                                                  --         .i_rxpipe1_locallf
			i_rxpipe1_localtxcoefficientsvalid          => i_rxpipe1_localtxcoefficientsvalid,                                                 --         .i_rxpipe1_localtxcoefficientsvalid
			i_rxpipe1_localtxpresetcoefficients         => i_rxpipe1_localtxpresetcoefficients,                                                --         .i_rxpipe1_localtxpresetcoefficients
			i_rxpipe1_p2m_bus                           => i_rxpipe1_p2m_bus,                                                                  --         .i_rxpipe1_p2m_bus
			i_rxpipe1_pclkchangeok                      => i_rxpipe1_pclkchangeok,                                                             --         .i_rxpipe1_pclkchangeok
			i_rxpipe1_phystatus                         => i_rxpipe1_phystatus,                                                                --         .i_rxpipe1_phystatus
			i_rxpipe1_rxdata                            => i_rxpipe1_rxdata,                                                                   --         .i_rxpipe1_rxdata
			i_rxpipe1_rxdatak                           => i_rxpipe1_rxdatak,                                                                  --         .i_rxpipe1_rxdatak
			i_rxpipe1_rxdatavalid                       => i_rxpipe1_rxdatavalid,                                                              --         .i_rxpipe1_rxdatavalid
			i_rxpipe1_rxelecidlea                       => i_rxpipe1_rxelecidlea,                                                              --         .i_rxpipe1_rxelecidlea
			i_rxpipe1_rxstandbystatus                   => i_rxpipe1_rxstandbystatus,                                                          --         .i_rxpipe1_rxstandbystatus
			i_rxpipe1_rxstartblock                      => i_rxpipe1_rxstartblock,                                                             --         .i_rxpipe1_rxstartblock
			i_rxpipe1_rxstatus                          => i_rxpipe1_rxstatus,                                                                 --         .i_rxpipe1_rxstatus
			i_rxpipe1_rxsyncheader                      => i_rxpipe1_rxsyncheader,                                                             --         .i_rxpipe1_rxsyncheader
			i_rxpipe1_rxvalid                           => i_rxpipe1_rxvalid,                                                                  --         .i_rxpipe1_rxvalid
			o_txpipe1_asyncpowerchangeack               => o_txpipe1_asyncpowerchangeack,                                                      --         .o_txpipe1_asyncpowerchangeack
			o_txpipe1_blockaligncontrol                 => o_txpipe1_blockaligncontrol,                                                        --         .o_txpipe1_blockaligncontrol
			o_txpipe1_cfg_hw_auto_sp_dis                => o_txpipe1_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe1_cfg_hw_auto_sp_dis
			o_txpipe1_dirchange                         => o_txpipe1_dirchange,                                                                --         .o_txpipe1_dirchange
			o_txpipe1_ebuf_mode                         => o_txpipe1_ebuf_mode,                                                                --         .o_txpipe1_ebuf_mode
			o_txpipe1_encodedecodebypass                => o_txpipe1_encodedecodebypass,                                                       --         .o_txpipe1_encodedecodebypass
			o_txpipe1_fs                                => o_txpipe1_fs,                                                                       --         .o_txpipe1_fs
			o_txpipe1_getlocalpresetcoefficients        => o_txpipe1_getlocalpresetcoefficients,                                               --         .o_txpipe1_getlocalpresetcoefficients
			o_txpipe1_invalidrequest                    => o_txpipe1_invalidrequest,                                                           --         .o_txpipe1_invalidrequest
			o_txpipe1_lf                                => o_txpipe1_lf,                                                                       --         .o_txpipe1_lf
			o_txpipe1_localpresetindex                  => o_txpipe1_localpresetindex,                                                         --         .o_txpipe1_localpresetindex
			o_txpipe1_lowpin_nt                         => o_txpipe1_lowpin_nt,                                                                --         .o_txpipe1_lowpin_nt
			o_txpipe1_m2p_bus                           => o_txpipe1_m2p_bus,                                                                  --         .o_txpipe1_m2p_bus
			o_txpipe1_pclk_rate                         => o_txpipe1_pclk_rate,                                                                --         .o_txpipe1_pclk_rate
			o_txpipe1_pclkchangeack                     => o_txpipe1_pclkchangeack,                                                            --         .o_txpipe1_pclkchangeack
			o_txpipe1_phy_mode_nt                       => o_txpipe1_phy_mode_nt,                                                              --         .o_txpipe1_phy_mode_nt
			o_txpipe1_powerdown                         => o_txpipe1_powerdown,                                                                --         .o_txpipe1_powerdown
			o_txpipe1_rate                              => o_txpipe1_rate,                                                                     --         .o_txpipe1_rate
			o_txpipe1_rxelecidle_disable_a              => o_txpipe1_rxelecidle_disable_a,                                                     --         .o_txpipe1_rxelecidle_disable_a
			o_txpipe1_rxeqclr                           => o_txpipe1_rxeqclr,                                                                  --         .o_txpipe1_rxeqclr
			o_txpipe1_rxeqeval                          => o_txpipe1_rxeqeval,                                                                 --         .o_txpipe1_rxeqeval
			o_txpipe1_rxeqinprogress                    => o_txpipe1_rxeqinprogress,                                                           --         .o_txpipe1_rxeqinprogress
			o_txpipe1_rxeqtraining                      => o_txpipe1_rxeqtraining,                                                             --         .o_txpipe1_rxeqtraining
			o_txpipe1_rxpolarity                        => o_txpipe1_rxpolarity,                                                               --         .o_txpipe1_rxpolarity
			o_txpipe1_rxpresethint                      => o_txpipe1_rxpresethint,                                                             --         .o_txpipe1_rxpresethint
			o_txpipe1_rxstandby                         => o_txpipe1_rxstandby,                                                                --         .o_txpipe1_rxstandby
			o_txpipe1_rxtermination                     => o_txpipe1_rxtermination,                                                            --         .o_txpipe1_rxtermination
			o_txpipe1_srisenable                        => o_txpipe1_srisenable,                                                               --         .o_txpipe1_srisenable
			o_txpipe1_txcmnmode_disable_a               => o_txpipe1_txcmnmode_disable_a,                                                      --         .o_txpipe1_txcmnmode_disable_a
			o_txpipe1_txcompliance                      => o_txpipe1_txcompliance,                                                             --         .o_txpipe1_txcompliance
			o_txpipe1_txdata                            => o_txpipe1_txdata,                                                                   --         .o_txpipe1_txdata
			o_txpipe1_txdatak                           => o_txpipe1_txdatak,                                                                  --         .o_txpipe1_txdatak
			o_txpipe1_txdatavalid                       => o_txpipe1_txdatavalid,                                                              --         .o_txpipe1_txdatavalid
			o_txpipe1_txdeemph                          => o_txpipe1_txdeemph,                                                                 --         .o_txpipe1_txdeemph
			o_txpipe1_txdtctrx_lb                       => o_txpipe1_txdtctrx_lb,                                                              --         .o_txpipe1_txdtctrx_lb
			o_txpipe1_txelecidle                        => o_txpipe1_txelecidle,                                                               --         .o_txpipe1_txelecidle
			o_txpipe1_txmargin                          => o_txpipe1_txmargin,                                                                 --         .o_txpipe1_txmargin
			o_txpipe1_txoneszeros                       => o_txpipe1_txoneszeros,                                                              --         .o_txpipe1_txoneszeros
			o_txpipe1_txstartblock                      => o_txpipe1_txstartblock,                                                             --         .o_txpipe1_txstartblock
			o_txpipe1_txswing                           => o_txpipe1_txswing,                                                                  --         .o_txpipe1_txswing
			o_txpipe1_txsyncheader                      => o_txpipe1_txsyncheader,                                                             --         .o_txpipe1_txsyncheader
			o_txpipe1_width                             => o_txpipe1_width,                                                                    --         .o_txpipe1_width
			o_pcs2_pipe_rst_n                           => o_pcs2_pipe_rst_n,                                                                  --         .o_pcs2_pipe_rst_n
			i_rxpipe2_dirfeedback                       => i_rxpipe2_dirfeedback,                                                              --         .i_rxpipe2_dirfeedback
			i_rxpipe2_linkevaluationfeedbackfiguremerit => i_rxpipe2_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe2_linkevaluationfeedbackfiguremerit
			i_rxpipe2_localfs                           => i_rxpipe2_localfs,                                                                  --         .i_rxpipe2_localfs
			i_rxpipe2_locallf                           => i_rxpipe2_locallf,                                                                  --         .i_rxpipe2_locallf
			i_rxpipe2_localtxcoefficientsvalid          => i_rxpipe2_localtxcoefficientsvalid,                                                 --         .i_rxpipe2_localtxcoefficientsvalid
			i_rxpipe2_localtxpresetcoefficients         => i_rxpipe2_localtxpresetcoefficients,                                                --         .i_rxpipe2_localtxpresetcoefficients
			i_rxpipe2_p2m_bus                           => i_rxpipe2_p2m_bus,                                                                  --         .i_rxpipe2_p2m_bus
			i_rxpipe2_pclkchangeok                      => i_rxpipe2_pclkchangeok,                                                             --         .i_rxpipe2_pclkchangeok
			i_rxpipe2_phystatus                         => i_rxpipe2_phystatus,                                                                --         .i_rxpipe2_phystatus
			i_rxpipe2_rxdata                            => i_rxpipe2_rxdata,                                                                   --         .i_rxpipe2_rxdata
			i_rxpipe2_rxdatak                           => i_rxpipe2_rxdatak,                                                                  --         .i_rxpipe2_rxdatak
			i_rxpipe2_rxdatavalid                       => i_rxpipe2_rxdatavalid,                                                              --         .i_rxpipe2_rxdatavalid
			i_rxpipe2_rxelecidlea                       => i_rxpipe2_rxelecidlea,                                                              --         .i_rxpipe2_rxelecidlea
			i_rxpipe2_rxstandbystatus                   => i_rxpipe2_rxstandbystatus,                                                          --         .i_rxpipe2_rxstandbystatus
			i_rxpipe2_rxstartblock                      => i_rxpipe2_rxstartblock,                                                             --         .i_rxpipe2_rxstartblock
			i_rxpipe2_rxstatus                          => i_rxpipe2_rxstatus,                                                                 --         .i_rxpipe2_rxstatus
			i_rxpipe2_rxsyncheader                      => i_rxpipe2_rxsyncheader,                                                             --         .i_rxpipe2_rxsyncheader
			i_rxpipe2_rxvalid                           => i_rxpipe2_rxvalid,                                                                  --         .i_rxpipe2_rxvalid
			o_txpipe2_asyncpowerchangeack               => o_txpipe2_asyncpowerchangeack,                                                      --         .o_txpipe2_asyncpowerchangeack
			o_txpipe2_blockaligncontrol                 => o_txpipe2_blockaligncontrol,                                                        --         .o_txpipe2_blockaligncontrol
			o_txpipe2_cfg_hw_auto_sp_dis                => o_txpipe2_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe2_cfg_hw_auto_sp_dis
			o_txpipe2_dirchange                         => o_txpipe2_dirchange,                                                                --         .o_txpipe2_dirchange
			o_txpipe2_ebuf_mode                         => o_txpipe2_ebuf_mode,                                                                --         .o_txpipe2_ebuf_mode
			o_txpipe2_encodedecodebypass                => o_txpipe2_encodedecodebypass,                                                       --         .o_txpipe2_encodedecodebypass
			o_txpipe2_fs                                => o_txpipe2_fs,                                                                       --         .o_txpipe2_fs
			o_txpipe2_getlocalpresetcoefficients        => o_txpipe2_getlocalpresetcoefficients,                                               --         .o_txpipe2_getlocalpresetcoefficients
			o_txpipe2_invalidrequest                    => o_txpipe2_invalidrequest,                                                           --         .o_txpipe2_invalidrequest
			o_txpipe2_lf                                => o_txpipe2_lf,                                                                       --         .o_txpipe2_lf
			o_txpipe2_localpresetindex                  => o_txpipe2_localpresetindex,                                                         --         .o_txpipe2_localpresetindex
			o_txpipe2_lowpin_nt                         => o_txpipe2_lowpin_nt,                                                                --         .o_txpipe2_lowpin_nt
			o_txpipe2_m2p_bus                           => o_txpipe2_m2p_bus,                                                                  --         .o_txpipe2_m2p_bus
			o_txpipe2_pclk_rate                         => o_txpipe2_pclk_rate,                                                                --         .o_txpipe2_pclk_rate
			o_txpipe2_pclkchangeack                     => o_txpipe2_pclkchangeack,                                                            --         .o_txpipe2_pclkchangeack
			o_txpipe2_phy_mode_nt                       => o_txpipe2_phy_mode_nt,                                                              --         .o_txpipe2_phy_mode_nt
			o_txpipe2_powerdown                         => o_txpipe2_powerdown,                                                                --         .o_txpipe2_powerdown
			o_txpipe2_rate                              => o_txpipe2_rate,                                                                     --         .o_txpipe2_rate
			o_txpipe2_rxelecidle_disable_a              => o_txpipe2_rxelecidle_disable_a,                                                     --         .o_txpipe2_rxelecidle_disable_a
			o_txpipe2_rxeqclr                           => o_txpipe2_rxeqclr,                                                                  --         .o_txpipe2_rxeqclr
			o_txpipe2_rxeqeval                          => o_txpipe2_rxeqeval,                                                                 --         .o_txpipe2_rxeqeval
			o_txpipe2_rxeqinprogress                    => o_txpipe2_rxeqinprogress,                                                           --         .o_txpipe2_rxeqinprogress
			o_txpipe2_rxeqtraining                      => o_txpipe2_rxeqtraining,                                                             --         .o_txpipe2_rxeqtraining
			o_txpipe2_rxpolarity                        => o_txpipe2_rxpolarity,                                                               --         .o_txpipe2_rxpolarity
			o_txpipe2_rxpresethint                      => o_txpipe2_rxpresethint,                                                             --         .o_txpipe2_rxpresethint
			o_txpipe2_rxstandby                         => o_txpipe2_rxstandby,                                                                --         .o_txpipe2_rxstandby
			o_txpipe2_rxtermination                     => o_txpipe2_rxtermination,                                                            --         .o_txpipe2_rxtermination
			o_txpipe2_srisenable                        => o_txpipe2_srisenable,                                                               --         .o_txpipe2_srisenable
			o_txpipe2_txcmnmode_disable_a               => o_txpipe2_txcmnmode_disable_a,                                                      --         .o_txpipe2_txcmnmode_disable_a
			o_txpipe2_txcompliance                      => o_txpipe2_txcompliance,                                                             --         .o_txpipe2_txcompliance
			o_txpipe2_txdata                            => o_txpipe2_txdata,                                                                   --         .o_txpipe2_txdata
			o_txpipe2_txdatak                           => o_txpipe2_txdatak,                                                                  --         .o_txpipe2_txdatak
			o_txpipe2_txdatavalid                       => o_txpipe2_txdatavalid,                                                              --         .o_txpipe2_txdatavalid
			o_txpipe2_txdeemph                          => o_txpipe2_txdeemph,                                                                 --         .o_txpipe2_txdeemph
			o_txpipe2_txdtctrx_lb                       => o_txpipe2_txdtctrx_lb,                                                              --         .o_txpipe2_txdtctrx_lb
			o_txpipe2_txelecidle                        => o_txpipe2_txelecidle,                                                               --         .o_txpipe2_txelecidle
			o_txpipe2_txmargin                          => o_txpipe2_txmargin,                                                                 --         .o_txpipe2_txmargin
			o_txpipe2_txoneszeros                       => o_txpipe2_txoneszeros,                                                              --         .o_txpipe2_txoneszeros
			o_txpipe2_txstartblock                      => o_txpipe2_txstartblock,                                                             --         .o_txpipe2_txstartblock
			o_txpipe2_txswing                           => o_txpipe2_txswing,                                                                  --         .o_txpipe2_txswing
			o_txpipe2_txsyncheader                      => o_txpipe2_txsyncheader,                                                             --         .o_txpipe2_txsyncheader
			o_txpipe2_width                             => o_txpipe2_width,                                                                    --         .o_txpipe2_width
			o_pcs3_pipe_rst_n                           => o_pcs3_pipe_rst_n,                                                                  --         .o_pcs3_pipe_rst_n
			i_rxpipe3_dirfeedback                       => i_rxpipe3_dirfeedback,                                                              --         .i_rxpipe3_dirfeedback
			i_rxpipe3_linkevaluationfeedbackfiguremerit => i_rxpipe3_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe3_linkevaluationfeedbackfiguremerit
			i_rxpipe3_localfs                           => i_rxpipe3_localfs,                                                                  --         .i_rxpipe3_localfs
			i_rxpipe3_locallf                           => i_rxpipe3_locallf,                                                                  --         .i_rxpipe3_locallf
			i_rxpipe3_localtxcoefficientsvalid          => i_rxpipe3_localtxcoefficientsvalid,                                                 --         .i_rxpipe3_localtxcoefficientsvalid
			i_rxpipe3_localtxpresetcoefficients         => i_rxpipe3_localtxpresetcoefficients,                                                --         .i_rxpipe3_localtxpresetcoefficients
			i_rxpipe3_p2m_bus                           => i_rxpipe3_p2m_bus,                                                                  --         .i_rxpipe3_p2m_bus
			i_rxpipe3_pclkchangeok                      => i_rxpipe3_pclkchangeok,                                                             --         .i_rxpipe3_pclkchangeok
			i_rxpipe3_phystatus                         => i_rxpipe3_phystatus,                                                                --         .i_rxpipe3_phystatus
			i_rxpipe3_rxdata                            => i_rxpipe3_rxdata,                                                                   --         .i_rxpipe3_rxdata
			i_rxpipe3_rxdatak                           => i_rxpipe3_rxdatak,                                                                  --         .i_rxpipe3_rxdatak
			i_rxpipe3_rxdatavalid                       => i_rxpipe3_rxdatavalid,                                                              --         .i_rxpipe3_rxdatavalid
			i_rxpipe3_rxelecidlea                       => i_rxpipe3_rxelecidlea,                                                              --         .i_rxpipe3_rxelecidlea
			i_rxpipe3_rxstandbystatus                   => i_rxpipe3_rxstandbystatus,                                                          --         .i_rxpipe3_rxstandbystatus
			i_rxpipe3_rxstartblock                      => i_rxpipe3_rxstartblock,                                                             --         .i_rxpipe3_rxstartblock
			i_rxpipe3_rxstatus                          => i_rxpipe3_rxstatus,                                                                 --         .i_rxpipe3_rxstatus
			i_rxpipe3_rxsyncheader                      => i_rxpipe3_rxsyncheader,                                                             --         .i_rxpipe3_rxsyncheader
			i_rxpipe3_rxvalid                           => i_rxpipe3_rxvalid,                                                                  --         .i_rxpipe3_rxvalid
			o_txpipe3_asyncpowerchangeack               => o_txpipe3_asyncpowerchangeack,                                                      --         .o_txpipe3_asyncpowerchangeack
			o_txpipe3_blockaligncontrol                 => o_txpipe3_blockaligncontrol,                                                        --         .o_txpipe3_blockaligncontrol
			o_txpipe3_cfg_hw_auto_sp_dis                => o_txpipe3_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe3_cfg_hw_auto_sp_dis
			o_txpipe3_dirchange                         => o_txpipe3_dirchange,                                                                --         .o_txpipe3_dirchange
			o_txpipe3_ebuf_mode                         => o_txpipe3_ebuf_mode,                                                                --         .o_txpipe3_ebuf_mode
			o_txpipe3_encodedecodebypass                => o_txpipe3_encodedecodebypass,                                                       --         .o_txpipe3_encodedecodebypass
			o_txpipe3_fs                                => o_txpipe3_fs,                                                                       --         .o_txpipe3_fs
			o_txpipe3_getlocalpresetcoefficients        => o_txpipe3_getlocalpresetcoefficients,                                               --         .o_txpipe3_getlocalpresetcoefficients
			o_txpipe3_invalidrequest                    => o_txpipe3_invalidrequest,                                                           --         .o_txpipe3_invalidrequest
			o_txpipe3_lf                                => o_txpipe3_lf,                                                                       --         .o_txpipe3_lf
			o_txpipe3_localpresetindex                  => o_txpipe3_localpresetindex,                                                         --         .o_txpipe3_localpresetindex
			o_txpipe3_lowpin_nt                         => o_txpipe3_lowpin_nt,                                                                --         .o_txpipe3_lowpin_nt
			o_txpipe3_m2p_bus                           => o_txpipe3_m2p_bus,                                                                  --         .o_txpipe3_m2p_bus
			o_txpipe3_pclk_rate                         => o_txpipe3_pclk_rate,                                                                --         .o_txpipe3_pclk_rate
			o_txpipe3_pclkchangeack                     => o_txpipe3_pclkchangeack,                                                            --         .o_txpipe3_pclkchangeack
			o_txpipe3_phy_mode_nt                       => o_txpipe3_phy_mode_nt,                                                              --         .o_txpipe3_phy_mode_nt
			o_txpipe3_powerdown                         => o_txpipe3_powerdown,                                                                --         .o_txpipe3_powerdown
			o_txpipe3_rate                              => o_txpipe3_rate,                                                                     --         .o_txpipe3_rate
			o_txpipe3_rxelecidle_disable_a              => o_txpipe3_rxelecidle_disable_a,                                                     --         .o_txpipe3_rxelecidle_disable_a
			o_txpipe3_rxeqclr                           => o_txpipe3_rxeqclr,                                                                  --         .o_txpipe3_rxeqclr
			o_txpipe3_rxeqeval                          => o_txpipe3_rxeqeval,                                                                 --         .o_txpipe3_rxeqeval
			o_txpipe3_rxeqinprogress                    => o_txpipe3_rxeqinprogress,                                                           --         .o_txpipe3_rxeqinprogress
			o_txpipe3_rxeqtraining                      => o_txpipe3_rxeqtraining,                                                             --         .o_txpipe3_rxeqtraining
			o_txpipe3_rxpolarity                        => o_txpipe3_rxpolarity,                                                               --         .o_txpipe3_rxpolarity
			o_txpipe3_rxpresethint                      => o_txpipe3_rxpresethint,                                                             --         .o_txpipe3_rxpresethint
			o_txpipe3_rxstandby                         => o_txpipe3_rxstandby,                                                                --         .o_txpipe3_rxstandby
			o_txpipe3_rxtermination                     => o_txpipe3_rxtermination,                                                            --         .o_txpipe3_rxtermination
			o_txpipe3_srisenable                        => o_txpipe3_srisenable,                                                               --         .o_txpipe3_srisenable
			o_txpipe3_txcmnmode_disable_a               => o_txpipe3_txcmnmode_disable_a,                                                      --         .o_txpipe3_txcmnmode_disable_a
			o_txpipe3_txcompliance                      => o_txpipe3_txcompliance,                                                             --         .o_txpipe3_txcompliance
			o_txpipe3_txdata                            => o_txpipe3_txdata,                                                                   --         .o_txpipe3_txdata
			o_txpipe3_txdatak                           => o_txpipe3_txdatak,                                                                  --         .o_txpipe3_txdatak
			o_txpipe3_txdatavalid                       => o_txpipe3_txdatavalid,                                                              --         .o_txpipe3_txdatavalid
			o_txpipe3_txdeemph                          => o_txpipe3_txdeemph,                                                                 --         .o_txpipe3_txdeemph
			o_txpipe3_txdtctrx_lb                       => o_txpipe3_txdtctrx_lb,                                                              --         .o_txpipe3_txdtctrx_lb
			o_txpipe3_txelecidle                        => o_txpipe3_txelecidle,                                                               --         .o_txpipe3_txelecidle
			o_txpipe3_txmargin                          => o_txpipe3_txmargin,                                                                 --         .o_txpipe3_txmargin
			o_txpipe3_txoneszeros                       => o_txpipe3_txoneszeros,                                                              --         .o_txpipe3_txoneszeros
			o_txpipe3_txstartblock                      => o_txpipe3_txstartblock,                                                             --         .o_txpipe3_txstartblock
			o_txpipe3_txswing                           => o_txpipe3_txswing,                                                                  --         .o_txpipe3_txswing
			o_txpipe3_txsyncheader                      => o_txpipe3_txsyncheader,                                                             --         .o_txpipe3_txsyncheader
			o_txpipe3_width                             => o_txpipe3_width,                                                                    --         .o_txpipe3_width
			o_pcs4_pipe_rst_n                           => o_pcs4_pipe_rst_n,                                                                  --         .o_pcs4_pipe_rst_n
			i_rxpipe4_dirfeedback                       => i_rxpipe4_dirfeedback,                                                              --         .i_rxpipe4_dirfeedback
			i_rxpipe4_linkevaluationfeedbackfiguremerit => i_rxpipe4_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe4_linkevaluationfeedbackfiguremerit
			i_rxpipe4_localfs                           => i_rxpipe4_localfs,                                                                  --         .i_rxpipe4_localfs
			i_rxpipe4_locallf                           => i_rxpipe4_locallf,                                                                  --         .i_rxpipe4_locallf
			i_rxpipe4_localtxcoefficientsvalid          => i_rxpipe4_localtxcoefficientsvalid,                                                 --         .i_rxpipe4_localtxcoefficientsvalid
			i_rxpipe4_localtxpresetcoefficients         => i_rxpipe4_localtxpresetcoefficients,                                                --         .i_rxpipe4_localtxpresetcoefficients
			i_rxpipe4_p2m_bus                           => i_rxpipe4_p2m_bus,                                                                  --         .i_rxpipe4_p2m_bus
			i_rxpipe4_pclkchangeok                      => i_rxpipe4_pclkchangeok,                                                             --         .i_rxpipe4_pclkchangeok
			i_rxpipe4_phystatus                         => i_rxpipe4_phystatus,                                                                --         .i_rxpipe4_phystatus
			i_rxpipe4_rxdata                            => i_rxpipe4_rxdata,                                                                   --         .i_rxpipe4_rxdata
			i_rxpipe4_rxdatak                           => i_rxpipe4_rxdatak,                                                                  --         .i_rxpipe4_rxdatak
			i_rxpipe4_rxdatavalid                       => i_rxpipe4_rxdatavalid,                                                              --         .i_rxpipe4_rxdatavalid
			i_rxpipe4_rxelecidlea                       => i_rxpipe4_rxelecidlea,                                                              --         .i_rxpipe4_rxelecidlea
			i_rxpipe4_rxstandbystatus                   => i_rxpipe4_rxstandbystatus,                                                          --         .i_rxpipe4_rxstandbystatus
			i_rxpipe4_rxstartblock                      => i_rxpipe4_rxstartblock,                                                             --         .i_rxpipe4_rxstartblock
			i_rxpipe4_rxstatus                          => i_rxpipe4_rxstatus,                                                                 --         .i_rxpipe4_rxstatus
			i_rxpipe4_rxsyncheader                      => i_rxpipe4_rxsyncheader,                                                             --         .i_rxpipe4_rxsyncheader
			i_rxpipe4_rxvalid                           => i_rxpipe4_rxvalid,                                                                  --         .i_rxpipe4_rxvalid
			o_txpipe4_asyncpowerchangeack               => o_txpipe4_asyncpowerchangeack,                                                      --         .o_txpipe4_asyncpowerchangeack
			o_txpipe4_blockaligncontrol                 => o_txpipe4_blockaligncontrol,                                                        --         .o_txpipe4_blockaligncontrol
			o_txpipe4_cfg_hw_auto_sp_dis                => o_txpipe4_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe4_cfg_hw_auto_sp_dis
			o_txpipe4_dirchange                         => o_txpipe4_dirchange,                                                                --         .o_txpipe4_dirchange
			o_txpipe4_ebuf_mode                         => o_txpipe4_ebuf_mode,                                                                --         .o_txpipe4_ebuf_mode
			o_txpipe4_encodedecodebypass                => o_txpipe4_encodedecodebypass,                                                       --         .o_txpipe4_encodedecodebypass
			o_txpipe4_fs                                => o_txpipe4_fs,                                                                       --         .o_txpipe4_fs
			o_txpipe4_getlocalpresetcoefficients        => o_txpipe4_getlocalpresetcoefficients,                                               --         .o_txpipe4_getlocalpresetcoefficients
			o_txpipe4_invalidrequest                    => o_txpipe4_invalidrequest,                                                           --         .o_txpipe4_invalidrequest
			o_txpipe4_lf                                => o_txpipe4_lf,                                                                       --         .o_txpipe4_lf
			o_txpipe4_localpresetindex                  => o_txpipe4_localpresetindex,                                                         --         .o_txpipe4_localpresetindex
			o_txpipe4_lowpin_nt                         => o_txpipe4_lowpin_nt,                                                                --         .o_txpipe4_lowpin_nt
			o_txpipe4_m2p_bus                           => o_txpipe4_m2p_bus,                                                                  --         .o_txpipe4_m2p_bus
			o_txpipe4_pclk_rate                         => o_txpipe4_pclk_rate,                                                                --         .o_txpipe4_pclk_rate
			o_txpipe4_pclkchangeack                     => o_txpipe4_pclkchangeack,                                                            --         .o_txpipe4_pclkchangeack
			o_txpipe4_phy_mode_nt                       => o_txpipe4_phy_mode_nt,                                                              --         .o_txpipe4_phy_mode_nt
			o_txpipe4_powerdown                         => o_txpipe4_powerdown,                                                                --         .o_txpipe4_powerdown
			o_txpipe4_rate                              => o_txpipe4_rate,                                                                     --         .o_txpipe4_rate
			o_txpipe4_rxelecidle_disable_a              => o_txpipe4_rxelecidle_disable_a,                                                     --         .o_txpipe4_rxelecidle_disable_a
			o_txpipe4_rxeqclr                           => o_txpipe4_rxeqclr,                                                                  --         .o_txpipe4_rxeqclr
			o_txpipe4_rxeqeval                          => o_txpipe4_rxeqeval,                                                                 --         .o_txpipe4_rxeqeval
			o_txpipe4_rxeqinprogress                    => o_txpipe4_rxeqinprogress,                                                           --         .o_txpipe4_rxeqinprogress
			o_txpipe4_rxeqtraining                      => o_txpipe4_rxeqtraining,                                                             --         .o_txpipe4_rxeqtraining
			o_txpipe4_rxpolarity                        => o_txpipe4_rxpolarity,                                                               --         .o_txpipe4_rxpolarity
			o_txpipe4_rxpresethint                      => o_txpipe4_rxpresethint,                                                             --         .o_txpipe4_rxpresethint
			o_txpipe4_rxstandby                         => o_txpipe4_rxstandby,                                                                --         .o_txpipe4_rxstandby
			o_txpipe4_rxtermination                     => o_txpipe4_rxtermination,                                                            --         .o_txpipe4_rxtermination
			o_txpipe4_srisenable                        => o_txpipe4_srisenable,                                                               --         .o_txpipe4_srisenable
			o_txpipe4_txcmnmode_disable_a               => o_txpipe4_txcmnmode_disable_a,                                                      --         .o_txpipe4_txcmnmode_disable_a
			o_txpipe4_txcompliance                      => o_txpipe4_txcompliance,                                                             --         .o_txpipe4_txcompliance
			o_txpipe4_txdata                            => o_txpipe4_txdata,                                                                   --         .o_txpipe4_txdata
			o_txpipe4_txdatak                           => o_txpipe4_txdatak,                                                                  --         .o_txpipe4_txdatak
			o_txpipe4_txdatavalid                       => o_txpipe4_txdatavalid,                                                              --         .o_txpipe4_txdatavalid
			o_txpipe4_txdeemph                          => o_txpipe4_txdeemph,                                                                 --         .o_txpipe4_txdeemph
			o_txpipe4_txdtctrx_lb                       => o_txpipe4_txdtctrx_lb,                                                              --         .o_txpipe4_txdtctrx_lb
			o_txpipe4_txelecidle                        => o_txpipe4_txelecidle,                                                               --         .o_txpipe4_txelecidle
			o_txpipe4_txmargin                          => o_txpipe4_txmargin,                                                                 --         .o_txpipe4_txmargin
			o_txpipe4_txoneszeros                       => o_txpipe4_txoneszeros,                                                              --         .o_txpipe4_txoneszeros
			o_txpipe4_txstartblock                      => o_txpipe4_txstartblock,                                                             --         .o_txpipe4_txstartblock
			o_txpipe4_txswing                           => o_txpipe4_txswing,                                                                  --         .o_txpipe4_txswing
			o_txpipe4_txsyncheader                      => o_txpipe4_txsyncheader,                                                             --         .o_txpipe4_txsyncheader
			o_txpipe4_width                             => o_txpipe4_width,                                                                    --         .o_txpipe4_width
			o_pcs5_pipe_rst_n                           => o_pcs5_pipe_rst_n,                                                                  --         .o_pcs5_pipe_rst_n
			i_rxpipe5_dirfeedback                       => i_rxpipe5_dirfeedback,                                                              --         .i_rxpipe5_dirfeedback
			i_rxpipe5_linkevaluationfeedbackfiguremerit => i_rxpipe5_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe5_linkevaluationfeedbackfiguremerit
			i_rxpipe5_localfs                           => i_rxpipe5_localfs,                                                                  --         .i_rxpipe5_localfs
			i_rxpipe5_locallf                           => i_rxpipe5_locallf,                                                                  --         .i_rxpipe5_locallf
			i_rxpipe5_localtxcoefficientsvalid          => i_rxpipe5_localtxcoefficientsvalid,                                                 --         .i_rxpipe5_localtxcoefficientsvalid
			i_rxpipe5_localtxpresetcoefficients         => i_rxpipe5_localtxpresetcoefficients,                                                --         .i_rxpipe5_localtxpresetcoefficients
			i_rxpipe5_p2m_bus                           => i_rxpipe5_p2m_bus,                                                                  --         .i_rxpipe5_p2m_bus
			i_rxpipe5_pclkchangeok                      => i_rxpipe5_pclkchangeok,                                                             --         .i_rxpipe5_pclkchangeok
			i_rxpipe5_phystatus                         => i_rxpipe5_phystatus,                                                                --         .i_rxpipe5_phystatus
			i_rxpipe5_rxdata                            => i_rxpipe5_rxdata,                                                                   --         .i_rxpipe5_rxdata
			i_rxpipe5_rxdatak                           => i_rxpipe5_rxdatak,                                                                  --         .i_rxpipe5_rxdatak
			i_rxpipe5_rxdatavalid                       => i_rxpipe5_rxdatavalid,                                                              --         .i_rxpipe5_rxdatavalid
			i_rxpipe5_rxelecidlea                       => i_rxpipe5_rxelecidlea,                                                              --         .i_rxpipe5_rxelecidlea
			i_rxpipe5_rxstandbystatus                   => i_rxpipe5_rxstandbystatus,                                                          --         .i_rxpipe5_rxstandbystatus
			i_rxpipe5_rxstartblock                      => i_rxpipe5_rxstartblock,                                                             --         .i_rxpipe5_rxstartblock
			i_rxpipe5_rxstatus                          => i_rxpipe5_rxstatus,                                                                 --         .i_rxpipe5_rxstatus
			i_rxpipe5_rxsyncheader                      => i_rxpipe5_rxsyncheader,                                                             --         .i_rxpipe5_rxsyncheader
			i_rxpipe5_rxvalid                           => i_rxpipe5_rxvalid,                                                                  --         .i_rxpipe5_rxvalid
			o_txpipe5_asyncpowerchangeack               => o_txpipe5_asyncpowerchangeack,                                                      --         .o_txpipe5_asyncpowerchangeack
			o_txpipe5_blockaligncontrol                 => o_txpipe5_blockaligncontrol,                                                        --         .o_txpipe5_blockaligncontrol
			o_txpipe5_cfg_hw_auto_sp_dis                => o_txpipe5_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe5_cfg_hw_auto_sp_dis
			o_txpipe5_dirchange                         => o_txpipe5_dirchange,                                                                --         .o_txpipe5_dirchange
			o_txpipe5_ebuf_mode                         => o_txpipe5_ebuf_mode,                                                                --         .o_txpipe5_ebuf_mode
			o_txpipe5_encodedecodebypass                => o_txpipe5_encodedecodebypass,                                                       --         .o_txpipe5_encodedecodebypass
			o_txpipe5_fs                                => o_txpipe5_fs,                                                                       --         .o_txpipe5_fs
			o_txpipe5_getlocalpresetcoefficients        => o_txpipe5_getlocalpresetcoefficients,                                               --         .o_txpipe5_getlocalpresetcoefficients
			o_txpipe5_invalidrequest                    => o_txpipe5_invalidrequest,                                                           --         .o_txpipe5_invalidrequest
			o_txpipe5_lf                                => o_txpipe5_lf,                                                                       --         .o_txpipe5_lf
			o_txpipe5_localpresetindex                  => o_txpipe5_localpresetindex,                                                         --         .o_txpipe5_localpresetindex
			o_txpipe5_lowpin_nt                         => o_txpipe5_lowpin_nt,                                                                --         .o_txpipe5_lowpin_nt
			o_txpipe5_m2p_bus                           => o_txpipe5_m2p_bus,                                                                  --         .o_txpipe5_m2p_bus
			o_txpipe5_pclk_rate                         => o_txpipe5_pclk_rate,                                                                --         .o_txpipe5_pclk_rate
			o_txpipe5_pclkchangeack                     => o_txpipe5_pclkchangeack,                                                            --         .o_txpipe5_pclkchangeack
			o_txpipe5_phy_mode_nt                       => o_txpipe5_phy_mode_nt,                                                              --         .o_txpipe5_phy_mode_nt
			o_txpipe5_powerdown                         => o_txpipe5_powerdown,                                                                --         .o_txpipe5_powerdown
			o_txpipe5_rate                              => o_txpipe5_rate,                                                                     --         .o_txpipe5_rate
			o_txpipe5_rxelecidle_disable_a              => o_txpipe5_rxelecidle_disable_a,                                                     --         .o_txpipe5_rxelecidle_disable_a
			o_txpipe5_rxeqclr                           => o_txpipe5_rxeqclr,                                                                  --         .o_txpipe5_rxeqclr
			o_txpipe5_rxeqeval                          => o_txpipe5_rxeqeval,                                                                 --         .o_txpipe5_rxeqeval
			o_txpipe5_rxeqinprogress                    => o_txpipe5_rxeqinprogress,                                                           --         .o_txpipe5_rxeqinprogress
			o_txpipe5_rxeqtraining                      => o_txpipe5_rxeqtraining,                                                             --         .o_txpipe5_rxeqtraining
			o_txpipe5_rxpolarity                        => o_txpipe5_rxpolarity,                                                               --         .o_txpipe5_rxpolarity
			o_txpipe5_rxpresethint                      => o_txpipe5_rxpresethint,                                                             --         .o_txpipe5_rxpresethint
			o_txpipe5_rxstandby                         => o_txpipe5_rxstandby,                                                                --         .o_txpipe5_rxstandby
			o_txpipe5_rxtermination                     => o_txpipe5_rxtermination,                                                            --         .o_txpipe5_rxtermination
			o_txpipe5_srisenable                        => o_txpipe5_srisenable,                                                               --         .o_txpipe5_srisenable
			o_txpipe5_txcmnmode_disable_a               => o_txpipe5_txcmnmode_disable_a,                                                      --         .o_txpipe5_txcmnmode_disable_a
			o_txpipe5_txcompliance                      => o_txpipe5_txcompliance,                                                             --         .o_txpipe5_txcompliance
			o_txpipe5_txdata                            => o_txpipe5_txdata,                                                                   --         .o_txpipe5_txdata
			o_txpipe5_txdatak                           => o_txpipe5_txdatak,                                                                  --         .o_txpipe5_txdatak
			o_txpipe5_txdatavalid                       => o_txpipe5_txdatavalid,                                                              --         .o_txpipe5_txdatavalid
			o_txpipe5_txdeemph                          => o_txpipe5_txdeemph,                                                                 --         .o_txpipe5_txdeemph
			o_txpipe5_txdtctrx_lb                       => o_txpipe5_txdtctrx_lb,                                                              --         .o_txpipe5_txdtctrx_lb
			o_txpipe5_txelecidle                        => o_txpipe5_txelecidle,                                                               --         .o_txpipe5_txelecidle
			o_txpipe5_txmargin                          => o_txpipe5_txmargin,                                                                 --         .o_txpipe5_txmargin
			o_txpipe5_txoneszeros                       => o_txpipe5_txoneszeros,                                                              --         .o_txpipe5_txoneszeros
			o_txpipe5_txstartblock                      => o_txpipe5_txstartblock,                                                             --         .o_txpipe5_txstartblock
			o_txpipe5_txswing                           => o_txpipe5_txswing,                                                                  --         .o_txpipe5_txswing
			o_txpipe5_txsyncheader                      => o_txpipe5_txsyncheader,                                                             --         .o_txpipe5_txsyncheader
			o_txpipe5_width                             => o_txpipe5_width,                                                                    --         .o_txpipe5_width
			o_pcs6_pipe_rst_n                           => o_pcs6_pipe_rst_n,                                                                  --         .o_pcs6_pipe_rst_n
			i_rxpipe6_dirfeedback                       => i_rxpipe6_dirfeedback,                                                              --         .i_rxpipe6_dirfeedback
			i_rxpipe6_linkevaluationfeedbackfiguremerit => i_rxpipe6_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe6_linkevaluationfeedbackfiguremerit
			i_rxpipe6_localfs                           => i_rxpipe6_localfs,                                                                  --         .i_rxpipe6_localfs
			i_rxpipe6_locallf                           => i_rxpipe6_locallf,                                                                  --         .i_rxpipe6_locallf
			i_rxpipe6_localtxcoefficientsvalid          => i_rxpipe6_localtxcoefficientsvalid,                                                 --         .i_rxpipe6_localtxcoefficientsvalid
			i_rxpipe6_localtxpresetcoefficients         => i_rxpipe6_localtxpresetcoefficients,                                                --         .i_rxpipe6_localtxpresetcoefficients
			i_rxpipe6_p2m_bus                           => i_rxpipe6_p2m_bus,                                                                  --         .i_rxpipe6_p2m_bus
			i_rxpipe6_pclkchangeok                      => i_rxpipe6_pclkchangeok,                                                             --         .i_rxpipe6_pclkchangeok
			i_rxpipe6_phystatus                         => i_rxpipe6_phystatus,                                                                --         .i_rxpipe6_phystatus
			i_rxpipe6_rxdata                            => i_rxpipe6_rxdata,                                                                   --         .i_rxpipe6_rxdata
			i_rxpipe6_rxdatak                           => i_rxpipe6_rxdatak,                                                                  --         .i_rxpipe6_rxdatak
			i_rxpipe6_rxdatavalid                       => i_rxpipe6_rxdatavalid,                                                              --         .i_rxpipe6_rxdatavalid
			i_rxpipe6_rxelecidlea                       => i_rxpipe6_rxelecidlea,                                                              --         .i_rxpipe6_rxelecidlea
			i_rxpipe6_rxstandbystatus                   => i_rxpipe6_rxstandbystatus,                                                          --         .i_rxpipe6_rxstandbystatus
			i_rxpipe6_rxstartblock                      => i_rxpipe6_rxstartblock,                                                             --         .i_rxpipe6_rxstartblock
			i_rxpipe6_rxstatus                          => i_rxpipe6_rxstatus,                                                                 --         .i_rxpipe6_rxstatus
			i_rxpipe6_rxsyncheader                      => i_rxpipe6_rxsyncheader,                                                             --         .i_rxpipe6_rxsyncheader
			i_rxpipe6_rxvalid                           => i_rxpipe6_rxvalid,                                                                  --         .i_rxpipe6_rxvalid
			o_txpipe6_asyncpowerchangeack               => o_txpipe6_asyncpowerchangeack,                                                      --         .o_txpipe6_asyncpowerchangeack
			o_txpipe6_blockaligncontrol                 => o_txpipe6_blockaligncontrol,                                                        --         .o_txpipe6_blockaligncontrol
			o_txpipe6_cfg_hw_auto_sp_dis                => o_txpipe6_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe6_cfg_hw_auto_sp_dis
			o_txpipe6_dirchange                         => o_txpipe6_dirchange,                                                                --         .o_txpipe6_dirchange
			o_txpipe6_ebuf_mode                         => o_txpipe6_ebuf_mode,                                                                --         .o_txpipe6_ebuf_mode
			o_txpipe6_encodedecodebypass                => o_txpipe6_encodedecodebypass,                                                       --         .o_txpipe6_encodedecodebypass
			o_txpipe6_fs                                => o_txpipe6_fs,                                                                       --         .o_txpipe6_fs
			o_txpipe6_getlocalpresetcoefficients        => o_txpipe6_getlocalpresetcoefficients,                                               --         .o_txpipe6_getlocalpresetcoefficients
			o_txpipe6_invalidrequest                    => o_txpipe6_invalidrequest,                                                           --         .o_txpipe6_invalidrequest
			o_txpipe6_lf                                => o_txpipe6_lf,                                                                       --         .o_txpipe6_lf
			o_txpipe6_localpresetindex                  => o_txpipe6_localpresetindex,                                                         --         .o_txpipe6_localpresetindex
			o_txpipe6_lowpin_nt                         => o_txpipe6_lowpin_nt,                                                                --         .o_txpipe6_lowpin_nt
			o_txpipe6_m2p_bus                           => o_txpipe6_m2p_bus,                                                                  --         .o_txpipe6_m2p_bus
			o_txpipe6_pclk_rate                         => o_txpipe6_pclk_rate,                                                                --         .o_txpipe6_pclk_rate
			o_txpipe6_pclkchangeack                     => o_txpipe6_pclkchangeack,                                                            --         .o_txpipe6_pclkchangeack
			o_txpipe6_phy_mode_nt                       => o_txpipe6_phy_mode_nt,                                                              --         .o_txpipe6_phy_mode_nt
			o_txpipe6_powerdown                         => o_txpipe6_powerdown,                                                                --         .o_txpipe6_powerdown
			o_txpipe6_rate                              => o_txpipe6_rate,                                                                     --         .o_txpipe6_rate
			o_txpipe6_rxelecidle_disable_a              => o_txpipe6_rxelecidle_disable_a,                                                     --         .o_txpipe6_rxelecidle_disable_a
			o_txpipe6_rxeqclr                           => o_txpipe6_rxeqclr,                                                                  --         .o_txpipe6_rxeqclr
			o_txpipe6_rxeqeval                          => o_txpipe6_rxeqeval,                                                                 --         .o_txpipe6_rxeqeval
			o_txpipe6_rxeqinprogress                    => o_txpipe6_rxeqinprogress,                                                           --         .o_txpipe6_rxeqinprogress
			o_txpipe6_rxeqtraining                      => o_txpipe6_rxeqtraining,                                                             --         .o_txpipe6_rxeqtraining
			o_txpipe6_rxpolarity                        => o_txpipe6_rxpolarity,                                                               --         .o_txpipe6_rxpolarity
			o_txpipe6_rxpresethint                      => o_txpipe6_rxpresethint,                                                             --         .o_txpipe6_rxpresethint
			o_txpipe6_rxstandby                         => o_txpipe6_rxstandby,                                                                --         .o_txpipe6_rxstandby
			o_txpipe6_rxtermination                     => o_txpipe6_rxtermination,                                                            --         .o_txpipe6_rxtermination
			o_txpipe6_srisenable                        => o_txpipe6_srisenable,                                                               --         .o_txpipe6_srisenable
			o_txpipe6_txcmnmode_disable_a               => o_txpipe6_txcmnmode_disable_a,                                                      --         .o_txpipe6_txcmnmode_disable_a
			o_txpipe6_txcompliance                      => o_txpipe6_txcompliance,                                                             --         .o_txpipe6_txcompliance
			o_txpipe6_txdata                            => o_txpipe6_txdata,                                                                   --         .o_txpipe6_txdata
			o_txpipe6_txdatak                           => o_txpipe6_txdatak,                                                                  --         .o_txpipe6_txdatak
			o_txpipe6_txdatavalid                       => o_txpipe6_txdatavalid,                                                              --         .o_txpipe6_txdatavalid
			o_txpipe6_txdeemph                          => o_txpipe6_txdeemph,                                                                 --         .o_txpipe6_txdeemph
			o_txpipe6_txdtctrx_lb                       => o_txpipe6_txdtctrx_lb,                                                              --         .o_txpipe6_txdtctrx_lb
			o_txpipe6_txelecidle                        => o_txpipe6_txelecidle,                                                               --         .o_txpipe6_txelecidle
			o_txpipe6_txmargin                          => o_txpipe6_txmargin,                                                                 --         .o_txpipe6_txmargin
			o_txpipe6_txoneszeros                       => o_txpipe6_txoneszeros,                                                              --         .o_txpipe6_txoneszeros
			o_txpipe6_txstartblock                      => o_txpipe6_txstartblock,                                                             --         .o_txpipe6_txstartblock
			o_txpipe6_txswing                           => o_txpipe6_txswing,                                                                  --         .o_txpipe6_txswing
			o_txpipe6_txsyncheader                      => o_txpipe6_txsyncheader,                                                             --         .o_txpipe6_txsyncheader
			o_txpipe6_width                             => o_txpipe6_width,                                                                    --         .o_txpipe6_width
			o_pcs7_pipe_rst_n                           => o_pcs7_pipe_rst_n,                                                                  --         .o_pcs7_pipe_rst_n
			i_rxpipe7_dirfeedback                       => i_rxpipe7_dirfeedback,                                                              --         .i_rxpipe7_dirfeedback
			i_rxpipe7_linkevaluationfeedbackfiguremerit => i_rxpipe7_linkevaluationfeedbackfiguremerit,                                        --         .i_rxpipe7_linkevaluationfeedbackfiguremerit
			i_rxpipe7_localfs                           => i_rxpipe7_localfs,                                                                  --         .i_rxpipe7_localfs
			i_rxpipe7_locallf                           => i_rxpipe7_locallf,                                                                  --         .i_rxpipe7_locallf
			i_rxpipe7_localtxcoefficientsvalid          => i_rxpipe7_localtxcoefficientsvalid,                                                 --         .i_rxpipe7_localtxcoefficientsvalid
			i_rxpipe7_localtxpresetcoefficients         => i_rxpipe7_localtxpresetcoefficients,                                                --         .i_rxpipe7_localtxpresetcoefficients
			i_rxpipe7_p2m_bus                           => i_rxpipe7_p2m_bus,                                                                  --         .i_rxpipe7_p2m_bus
			i_rxpipe7_pclkchangeok                      => i_rxpipe7_pclkchangeok,                                                             --         .i_rxpipe7_pclkchangeok
			i_rxpipe7_phystatus                         => i_rxpipe7_phystatus,                                                                --         .i_rxpipe7_phystatus
			i_rxpipe7_rxdata                            => i_rxpipe7_rxdata,                                                                   --         .i_rxpipe7_rxdata
			i_rxpipe7_rxdatak                           => i_rxpipe7_rxdatak,                                                                  --         .i_rxpipe7_rxdatak
			i_rxpipe7_rxdatavalid                       => i_rxpipe7_rxdatavalid,                                                              --         .i_rxpipe7_rxdatavalid
			i_rxpipe7_rxelecidlea                       => i_rxpipe7_rxelecidlea,                                                              --         .i_rxpipe7_rxelecidlea
			i_rxpipe7_rxstandbystatus                   => i_rxpipe7_rxstandbystatus,                                                          --         .i_rxpipe7_rxstandbystatus
			i_rxpipe7_rxstartblock                      => i_rxpipe7_rxstartblock,                                                             --         .i_rxpipe7_rxstartblock
			i_rxpipe7_rxstatus                          => i_rxpipe7_rxstatus,                                                                 --         .i_rxpipe7_rxstatus
			i_rxpipe7_rxsyncheader                      => i_rxpipe7_rxsyncheader,                                                             --         .i_rxpipe7_rxsyncheader
			i_rxpipe7_rxvalid                           => i_rxpipe7_rxvalid,                                                                  --         .i_rxpipe7_rxvalid
			o_txpipe7_asyncpowerchangeack               => o_txpipe7_asyncpowerchangeack,                                                      --         .o_txpipe7_asyncpowerchangeack
			o_txpipe7_blockaligncontrol                 => o_txpipe7_blockaligncontrol,                                                        --         .o_txpipe7_blockaligncontrol
			o_txpipe7_cfg_hw_auto_sp_dis                => o_txpipe7_cfg_hw_auto_sp_dis,                                                       --         .o_txpipe7_cfg_hw_auto_sp_dis
			o_txpipe7_dirchange                         => o_txpipe7_dirchange,                                                                --         .o_txpipe7_dirchange
			o_txpipe7_ebuf_mode                         => o_txpipe7_ebuf_mode,                                                                --         .o_txpipe7_ebuf_mode
			o_txpipe7_encodedecodebypass                => o_txpipe7_encodedecodebypass,                                                       --         .o_txpipe7_encodedecodebypass
			o_txpipe7_fs                                => o_txpipe7_fs,                                                                       --         .o_txpipe7_fs
			o_txpipe7_getlocalpresetcoefficients        => o_txpipe7_getlocalpresetcoefficients,                                               --         .o_txpipe7_getlocalpresetcoefficients
			o_txpipe7_invalidrequest                    => o_txpipe7_invalidrequest,                                                           --         .o_txpipe7_invalidrequest
			o_txpipe7_lf                                => o_txpipe7_lf,                                                                       --         .o_txpipe7_lf
			o_txpipe7_localpresetindex                  => o_txpipe7_localpresetindex,                                                         --         .o_txpipe7_localpresetindex
			o_txpipe7_lowpin_nt                         => o_txpipe7_lowpin_nt,                                                                --         .o_txpipe7_lowpin_nt
			o_txpipe7_m2p_bus                           => o_txpipe7_m2p_bus,                                                                  --         .o_txpipe7_m2p_bus
			o_txpipe7_pclk_rate                         => o_txpipe7_pclk_rate,                                                                --         .o_txpipe7_pclk_rate
			o_txpipe7_pclkchangeack                     => o_txpipe7_pclkchangeack,                                                            --         .o_txpipe7_pclkchangeack
			o_txpipe7_phy_mode_nt                       => o_txpipe7_phy_mode_nt,                                                              --         .o_txpipe7_phy_mode_nt
			o_txpipe7_powerdown                         => o_txpipe7_powerdown,                                                                --         .o_txpipe7_powerdown
			o_txpipe7_rate                              => o_txpipe7_rate,                                                                     --         .o_txpipe7_rate
			o_txpipe7_rxelecidle_disable_a              => o_txpipe7_rxelecidle_disable_a,                                                     --         .o_txpipe7_rxelecidle_disable_a
			o_txpipe7_rxeqclr                           => o_txpipe7_rxeqclr,                                                                  --         .o_txpipe7_rxeqclr
			o_txpipe7_rxeqeval                          => o_txpipe7_rxeqeval,                                                                 --         .o_txpipe7_rxeqeval
			o_txpipe7_rxeqinprogress                    => o_txpipe7_rxeqinprogress,                                                           --         .o_txpipe7_rxeqinprogress
			o_txpipe7_rxeqtraining                      => o_txpipe7_rxeqtraining,                                                             --         .o_txpipe7_rxeqtraining
			o_txpipe7_rxpolarity                        => o_txpipe7_rxpolarity,                                                               --         .o_txpipe7_rxpolarity
			o_txpipe7_rxpresethint                      => o_txpipe7_rxpresethint,                                                             --         .o_txpipe7_rxpresethint
			o_txpipe7_rxstandby                         => o_txpipe7_rxstandby,                                                                --         .o_txpipe7_rxstandby
			o_txpipe7_rxtermination                     => o_txpipe7_rxtermination,                                                            --         .o_txpipe7_rxtermination
			o_txpipe7_srisenable                        => o_txpipe7_srisenable,                                                               --         .o_txpipe7_srisenable
			o_txpipe7_txcmnmode_disable_a               => o_txpipe7_txcmnmode_disable_a,                                                      --         .o_txpipe7_txcmnmode_disable_a
			o_txpipe7_txcompliance                      => o_txpipe7_txcompliance,                                                             --         .o_txpipe7_txcompliance
			o_txpipe7_txdata                            => o_txpipe7_txdata,                                                                   --         .o_txpipe7_txdata
			o_txpipe7_txdatak                           => o_txpipe7_txdatak,                                                                  --         .o_txpipe7_txdatak
			o_txpipe7_txdatavalid                       => o_txpipe7_txdatavalid,                                                              --         .o_txpipe7_txdatavalid
			o_txpipe7_txdeemph                          => o_txpipe7_txdeemph,                                                                 --         .o_txpipe7_txdeemph
			o_txpipe7_txdtctrx_lb                       => o_txpipe7_txdtctrx_lb,                                                              --         .o_txpipe7_txdtctrx_lb
			o_txpipe7_txelecidle                        => o_txpipe7_txelecidle,                                                               --         .o_txpipe7_txelecidle
			o_txpipe7_txmargin                          => o_txpipe7_txmargin,                                                                 --         .o_txpipe7_txmargin
			o_txpipe7_txoneszeros                       => o_txpipe7_txoneszeros,                                                              --         .o_txpipe7_txoneszeros
			o_txpipe7_txstartblock                      => o_txpipe7_txstartblock,                                                             --         .o_txpipe7_txstartblock
			o_txpipe7_txswing                           => o_txpipe7_txswing,                                                                  --         .o_txpipe7_txswing
			o_txpipe7_txsyncheader                      => o_txpipe7_txsyncheader,                                                             --         .o_txpipe7_txsyncheader
			o_txpipe7_width                             => o_txpipe7_width,                                                                    --         .o_txpipe7_width
			i_ch0_tx_data                               => i_ch0_tx_data,                                                                      --         .i_ch0_tx_data
			i_ch1_tx_data                               => i_ch1_tx_data,                                                                      --         .i_ch1_tx_data
			i_ch2_tx_data                               => i_ch2_tx_data,                                                                      --         .i_ch2_tx_data
			i_ch3_tx_data                               => i_ch3_tx_data,                                                                      --         .i_ch3_tx_data
			i_ch4_tx_data                               => i_ch4_tx_data,                                                                      --         .i_ch4_tx_data
			o_ch0_rx_data                               => o_ch0_rx_data,                                                                      --         .o_ch0_rx_data
			o_ch1_rx_data                               => o_ch1_rx_data,                                                                      --         .o_ch1_rx_data
			o_ch2_rx_data                               => o_ch2_rx_data,                                                                      --         .o_ch2_rx_data
			o_ch3_rx_data                               => o_ch3_rx_data,                                                                      --         .o_ch3_rx_data
			o_ch4_rx_data                               => o_ch4_rx_data,                                                                      --         .o_ch4_rx_data
			i_ch0_rst_pld_clrhip                        => i_ch0_rst_pld_clrhip,                                                               --         .i_ch0_rst_pld_clrhip
			i_ch0_rst_pld_clrpcs                        => i_ch0_rst_pld_clrpcs,                                                               --         .i_ch0_rst_pld_clrpcs
			i_ch0_rst_pld_perstn                        => i_ch0_rst_pld_perstn,                                                               --         .i_ch0_rst_pld_perstn
			i_ch0_pcie_ctrl_tx_async                    => i_ch0_pcie_ctrl_tx_async,                                                           --         .i_ch0_pcie_ctrl_tx_async
			i_ch0_pcie_ctrl_tx_direct                   => i_ch0_pcie_ctrl_tx_direct,                                                          --         .i_ch0_pcie_ctrl_tx_direct
			o_ch0_pcie_ctrl_rx_async                    => o_ch0_pcie_ctrl_rx_async,                                                           --         .o_ch0_pcie_ctrl_rx_async
			o_ch0_pcie_ctrl_rx_direct                   => o_ch0_pcie_ctrl_rx_direct,                                                          --         .o_ch0_pcie_ctrl_rx_direct
			i_pld_pcie_clk                              => i_pld_pcie_clk,                                                                     --         .i_pld_pcie_clk
			i_pcs0_pclk                                 => i_pcs0_pclk,                                                                        --         .i_pcs0_pclk
			i_pin_perst_n                               => i_pin_perst_n,                                                                      --         .i_pin_perst_n
			i_rst_ch0_flux0_cpi_cmn_busy                => i_rst_ch0_flux0_cpi_cmn_busy,                                                       --         .i_rst_ch0_flux0_cpi_cmn_busy
			i_rst_ch1_flux0_cpi_cmn_busy                => i_rst_ch1_flux0_cpi_cmn_busy,                                                       --         .i_rst_ch1_flux0_cpi_cmn_busy
			i_rst_ch2_flux0_cpi_cmn_busy                => i_rst_ch2_flux0_cpi_cmn_busy,                                                       --         .i_rst_ch2_flux0_cpi_cmn_busy
			i_rst_ch3_flux0_cpi_cmn_busy                => i_rst_ch3_flux0_cpi_cmn_busy,                                                       --         .i_rst_ch3_flux0_cpi_cmn_busy
			i_gbl_ctrl_syspll_locked                    => i_gbl_ctrl_syspll_locked,                                                           --         .i_gbl_ctrl_syspll_locked
			i_ch5_tx_data                               => "00000000000000000000000000000000000000000000000000000000000000000000000000000000", -- (terminated)
			i_ch6_tx_data                               => "00000000000000000000000000000000000000000000000000000000000000000000000000000000", -- (terminated)
			i_ch7_tx_data                               => "00000000000000000000000000000000000000000000000000000000000000000000000000000000", -- (terminated)
			i_ch8_tx_data                               => "00000000000000000000000000000000000000000000000000000000000000000000000000000000", -- (terminated)
			o_ch5_rx_data                               => open,                                                                               -- (terminated)
			o_ch6_rx_data                               => open,                                                                               -- (terminated)
			o_ch7_rx_data                               => open,                                                                               -- (terminated)
			o_ch8_rx_data                               => open                                                                                -- (terminated)
		);

end architecture rtl; -- of gts_axi_streaming_pcie_hal_top_phip_hal_2100_dn3iuli
