module gts_reset_sequencer (
		output wire [0:0] o_pma_cu_clk,                 //                 o_pma_cu_clk.clk,                        PMA control unit clock output, 1 per quad of a shoreline. For example, SPLL is used for QHIP/s across quads then 1 output port to be connected to each quad input.
		input  wire       i_refclk_bus_out,             //             i_refclk_bus_out.refclk_bus_out,             Refclk fail status from 1 QHIP in this shoreline which says if the clkrx refclk failure has occured
		output wire       o_shoreline_refclk_fail_stat  // o_shoreline_refclk_fail_stat.shoreline_refclk_fail_stat, Refclk fail status to the user design which says if the clkrx refclk failure has occured
	);
endmodule

